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path: root/drivers/gpu/drm/msm/msm_gem.c
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Diffstat (limited to 'drivers/gpu/drm/msm/msm_gem.c')
-rw-r--r--drivers/gpu/drm/msm/msm_gem.c34
1 files changed, 24 insertions, 10 deletions
diff --git a/drivers/gpu/drm/msm/msm_gem.c b/drivers/gpu/drm/msm/msm_gem.c
index 6b5a6c8c7658..29eacfa29cfb 100644
--- a/drivers/gpu/drm/msm/msm_gem.c
+++ b/drivers/gpu/drm/msm/msm_gem.c
@@ -40,9 +40,9 @@ static struct page **get_pages(struct drm_gem_object *obj)
40 } 40 }
41 41
42 msm_obj->sgt = drm_prime_pages_to_sg(p, npages); 42 msm_obj->sgt = drm_prime_pages_to_sg(p, npages);
43 if (!msm_obj->sgt) { 43 if (IS_ERR(msm_obj->sgt)) {
44 dev_err(dev->dev, "failed to allocate sgt\n"); 44 dev_err(dev->dev, "failed to allocate sgt\n");
45 return ERR_PTR(-ENOMEM); 45 return ERR_CAST(msm_obj->sgt);
46 } 46 }
47 47
48 msm_obj->pages = p; 48 msm_obj->pages = p;
@@ -159,7 +159,6 @@ out_unlock:
159out: 159out:
160 switch (ret) { 160 switch (ret) {
161 case -EAGAIN: 161 case -EAGAIN:
162 set_need_resched();
163 case 0: 162 case 0:
164 case -ERESTARTSYS: 163 case -ERESTARTSYS:
165 case -EINTR: 164 case -EINTR:
@@ -393,11 +392,14 @@ int msm_gem_queue_inactive_work(struct drm_gem_object *obj,
393} 392}
394 393
395void msm_gem_move_to_active(struct drm_gem_object *obj, 394void msm_gem_move_to_active(struct drm_gem_object *obj,
396 struct msm_gpu *gpu, uint32_t fence) 395 struct msm_gpu *gpu, bool write, uint32_t fence)
397{ 396{
398 struct msm_gem_object *msm_obj = to_msm_bo(obj); 397 struct msm_gem_object *msm_obj = to_msm_bo(obj);
399 msm_obj->gpu = gpu; 398 msm_obj->gpu = gpu;
400 msm_obj->fence = fence; 399 if (write)
400 msm_obj->write_fence = fence;
401 else
402 msm_obj->read_fence = fence;
401 list_del_init(&msm_obj->mm_list); 403 list_del_init(&msm_obj->mm_list);
402 list_add_tail(&msm_obj->mm_list, &gpu->active_list); 404 list_add_tail(&msm_obj->mm_list, &gpu->active_list);
403} 405}
@@ -411,7 +413,8 @@ void msm_gem_move_to_inactive(struct drm_gem_object *obj)
411 WARN_ON(!mutex_is_locked(&dev->struct_mutex)); 413 WARN_ON(!mutex_is_locked(&dev->struct_mutex));
412 414
413 msm_obj->gpu = NULL; 415 msm_obj->gpu = NULL;
414 msm_obj->fence = 0; 416 msm_obj->read_fence = 0;
417 msm_obj->write_fence = 0;
415 list_del_init(&msm_obj->mm_list); 418 list_del_init(&msm_obj->mm_list);
416 list_add_tail(&msm_obj->mm_list, &priv->inactive_list); 419 list_add_tail(&msm_obj->mm_list, &priv->inactive_list);
417 420
@@ -433,8 +436,18 @@ int msm_gem_cpu_prep(struct drm_gem_object *obj, uint32_t op,
433 struct msm_gem_object *msm_obj = to_msm_bo(obj); 436 struct msm_gem_object *msm_obj = to_msm_bo(obj);
434 int ret = 0; 437 int ret = 0;
435 438
436 if (is_active(msm_obj) && !(op & MSM_PREP_NOSYNC)) 439 if (is_active(msm_obj)) {
437 ret = msm_wait_fence_interruptable(dev, msm_obj->fence, timeout); 440 uint32_t fence = 0;
441
442 if (op & MSM_PREP_READ)
443 fence = msm_obj->write_fence;
444 if (op & MSM_PREP_WRITE)
445 fence = max(fence, msm_obj->read_fence);
446 if (op & MSM_PREP_NOSYNC)
447 timeout = NULL;
448
449 ret = msm_wait_fence_interruptable(dev, fence, timeout);
450 }
438 451
439 /* TODO cache maintenance */ 452 /* TODO cache maintenance */
440 453
@@ -455,9 +468,10 @@ void msm_gem_describe(struct drm_gem_object *obj, struct seq_file *m)
455 uint64_t off = drm_vma_node_start(&obj->vma_node); 468 uint64_t off = drm_vma_node_start(&obj->vma_node);
456 469
457 WARN_ON(!mutex_is_locked(&dev->struct_mutex)); 470 WARN_ON(!mutex_is_locked(&dev->struct_mutex));
458 seq_printf(m, "%08x: %c(%d) %2d (%2d) %08llx %p %d\n", 471 seq_printf(m, "%08x: %c(r=%u,w=%u) %2d (%2d) %08llx %p %d\n",
459 msm_obj->flags, is_active(msm_obj) ? 'A' : 'I', 472 msm_obj->flags, is_active(msm_obj) ? 'A' : 'I',
460 msm_obj->fence, obj->name, obj->refcount.refcount.counter, 473 msm_obj->read_fence, msm_obj->write_fence,
474 obj->name, obj->refcount.refcount.counter,
461 off, msm_obj->vaddr, obj->size); 475 off, msm_obj->vaddr, obj->size);
462} 476}
463 477