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Diffstat (limited to 'drivers/gpu/drm/i915')
-rw-r--r--drivers/gpu/drm/i915/i915_drv.c7
-rw-r--r--drivers/gpu/drm/i915/i915_gem.c9
-rw-r--r--drivers/gpu/drm/i915/i915_reg.h1
3 files changed, 15 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 742bd8f738ca..b57efca02901 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -136,6 +136,12 @@ const static struct intel_device_info intel_ironlake_m_info = {
136 .has_hotplug = 1, 136 .has_hotplug = 1,
137}; 137};
138 138
139const static struct intel_device_info intel_sandybridge_d_info = {
140 .is_i965g = 1, .is_i9xx = 1, .need_gfx_hws = 1,
141 .has_pipe_cxsr = 1,
142 .has_hotplug = 1,
143};
144
139const static struct pci_device_id pciidlist[] = { 145const static struct pci_device_id pciidlist[] = {
140 INTEL_VGA_DEVICE(0x3577, &intel_i830_info), 146 INTEL_VGA_DEVICE(0x3577, &intel_i830_info),
141 INTEL_VGA_DEVICE(0x2562, &intel_845g_info), 147 INTEL_VGA_DEVICE(0x2562, &intel_845g_info),
@@ -167,6 +173,7 @@ const static struct pci_device_id pciidlist[] = {
167 INTEL_VGA_DEVICE(0xa011, &intel_pineview_info), 173 INTEL_VGA_DEVICE(0xa011, &intel_pineview_info),
168 INTEL_VGA_DEVICE(0x0042, &intel_ironlake_d_info), 174 INTEL_VGA_DEVICE(0x0042, &intel_ironlake_d_info),
169 INTEL_VGA_DEVICE(0x0046, &intel_ironlake_m_info), 175 INTEL_VGA_DEVICE(0x0046, &intel_ironlake_m_info),
176 INTEL_VGA_DEVICE(0x0102, &intel_sandybridge_d_info),
170 {0, 0, 0} 177 {0, 0, 0}
171}; 178};
172 179
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 715eaac62dbd..c73da4049c81 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -4581,8 +4581,13 @@ i915_gem_init_hws(struct drm_device *dev)
4581 } 4581 }
4582 dev_priv->hws_obj = obj; 4582 dev_priv->hws_obj = obj;
4583 memset(dev_priv->hw_status_page, 0, PAGE_SIZE); 4583 memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
4584 I915_WRITE(HWS_PGA, dev_priv->status_gfx_addr); 4584 if (IS_GEN6(dev)) {
4585 I915_READ(HWS_PGA); /* posting read */ 4585 I915_WRITE(HWS_PGA_GEN6, dev_priv->status_gfx_addr);
4586 I915_READ(HWS_PGA_GEN6); /* posting read */
4587 } else {
4588 I915_WRITE(HWS_PGA, dev_priv->status_gfx_addr);
4589 I915_READ(HWS_PGA); /* posting read */
4590 }
4586 DRM_DEBUG_DRIVER("hws offset: 0x%08x\n", dev_priv->status_gfx_addr); 4591 DRM_DEBUG_DRIVER("hws offset: 0x%08x\n", dev_priv->status_gfx_addr);
4587 4592
4588 return 0; 4593 return 0;
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 1232229450e7..2a312b674a72 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -269,6 +269,7 @@
269#define INSTDONE1 0x0207c /* 965+ only */ 269#define INSTDONE1 0x0207c /* 965+ only */
270#define ACTHD_I965 0x02074 270#define ACTHD_I965 0x02074
271#define HWS_PGA 0x02080 271#define HWS_PGA 0x02080
272#define HWS_PGA_GEN6 0x04080
272#define HWS_ADDRESS_MASK 0xfffff000 273#define HWS_ADDRESS_MASK 0xfffff000
273#define HWS_START_ADDRESS_SHIFT 4 274#define HWS_START_ADDRESS_SHIFT 4
274#define PWRCTXA 0x2088 /* 965GM+ only */ 275#define PWRCTXA 0x2088 /* 965GM+ only */