12 files changed, 137 insertions, 51 deletions

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 96e811fe24ca..e8b18e542da4 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -152,12 +152,12 @@ describe_obj(struct seq_file *m, struct drm_i915_gem_object *obj)
                         seq_puts(m, " (pp");
                 else
                         seq_puts(m, " (g");
-                seq_printf(m, "gtt offset: %08lx, size: %08lx, type: %u)",
+                seq_printf(m, "gtt offset: %08llx, size: %08llx, type: %u)",
                            vma->node.start, vma->node.size,
                            vma->ggtt_view.type);
         }
         if (obj->stolen)
-                seq_printf(m, " (stolen: %08lx)", obj->stolen->start);
+                seq_printf(m, " (stolen: %08llx)", obj->stolen->start);
         if (obj->pin_mappable || obj->fault_mappable) {
                 char s[3], *t = s;
                 if (obj->pin_mappable)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 8039cec71fc2..cc6ea53d2b81 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -622,7 +622,7 @@ static int i915_drm_suspend(struct drm_device *dev)
         return 0;
 }
 
-static int i915_drm_suspend_late(struct drm_device *drm_dev)
+static int i915_drm_suspend_late(struct drm_device *drm_dev, bool hibernation)
 {
         struct drm_i915_private *dev_priv = drm_dev->dev_private;
         int ret;
@@ -636,7 +636,17 @@ static int i915_drm_suspend_late(struct drm_device *drm_dev)
         }
 
         pci_disable_device(drm_dev->pdev);
-        pci_set_power_state(drm_dev->pdev, PCI_D3hot);
+        /*
+         * During hibernation on some GEN4 platforms the BIOS may try to access
+         * the device even though it's already in D3 and hang the machine. So
+         * leave the device in D0 on those platforms and hope the BIOS will
+         * power down the device properly. Platforms where this was seen:
+         * Lenovo Thinkpad X301, X61s
+         */
+        if (!(hibernation &&
+              drm_dev->pdev->subsystem_vendor == PCI_VENDOR_ID_LENOVO &&
+              INTEL_INFO(dev_priv)->gen == 4))
+                pci_set_power_state(drm_dev->pdev, PCI_D3hot);
 
         return 0;
 }
@@ -662,7 +672,7 @@ int i915_suspend_legacy(struct drm_device *dev, pm_message_t state)
         if (error)
                 return error;
 
-        return i915_drm_suspend_late(dev);
+        return i915_drm_suspend_late(dev, false);
 }
 
 static int i915_drm_resume(struct drm_device *dev)
@@ -950,7 +960,17 @@ static int i915_pm_suspend_late(struct device *dev)
         if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF)
                 return 0;
 
-        return i915_drm_suspend_late(drm_dev);
+        return i915_drm_suspend_late(drm_dev, false);
+}
+
+static int i915_pm_poweroff_late(struct device *dev)
+{
+        struct drm_device *drm_dev = dev_to_i915(dev)->dev;
+
+        if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF)
+                return 0;
+
+        return i915_drm_suspend_late(drm_dev, true);
 }
 
 static int i915_pm_resume_early(struct device *dev)
@@ -1520,7 +1540,7 @@ static const struct dev_pm_ops i915_pm_ops = {
         .thaw_early = i915_pm_resume_early,
         .thaw = i915_pm_resume,
         .poweroff = i915_pm_suspend,
-        .poweroff_late = i915_pm_suspend_late,
+        .poweroff_late = i915_pm_poweroff_late,
         .restore_early = i915_pm_resume_early,
         .restore = i915_pm_resume,
 
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index f2a825e39646..8727086cf48c 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2114,6 +2114,9 @@ void i915_gem_track_fb(struct drm_i915_gem_object *old,
  * number comparisons on buffer last_read|write_seqno. It also allows an
  * emission time to be associated with the request for tracking how far ahead
  * of the GPU the submission is.
+ *
+ * The requests are reference counted, so upon creation they should have an
+ * initial reference taken using kref_init
  */
 struct drm_i915_gem_request {
         struct kref ref;
@@ -2137,7 +2140,16 @@ struct drm_i915_gem_request {
         /** Position in the ringbuffer of the end of the whole request */
         u32 tail;
 
-        /** Context related to this request */
+        /**
+         * Context related to this request
+         * Contexts are refcounted, so when this request is associated with a
+         * context, we must increment the context's refcount, to guarantee that
+         * it persists while any request is linked to it. Requests themselves
+         * are also refcounted, so the request will only be freed when the last
+         * reference to it is dismissed, and the code in
+         * i915_gem_request_free() will then decrement the refcount on the
+         * context.
+         */
         struct intel_context *ctx;
 
         /** Batch buffer related to this request if any */
@@ -2374,6 +2386,7 @@ struct drm_i915_cmd_table {
                                  (INTEL_DEVID(dev) & 0xFF00) == 0x0C00)
 #define IS_BDW_ULT(dev)         (IS_BROADWELL(dev) && \
                                  ((INTEL_DEVID(dev) & 0xf) == 0x6 ||    \
+                                 (INTEL_DEVID(dev) & 0xf) == 0xb ||     \
                                  (INTEL_DEVID(dev) & 0xf) == 0xe))
 #define IS_BDW_GT3(dev)         (IS_BROADWELL(dev) && \
                                  (INTEL_DEVID(dev) & 0x00F0) == 0x0020)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index c26d36cc4b31..5b205863b659 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2659,8 +2659,7 @@ static void i915_gem_reset_ring_cleanup(struct drm_i915_private *dev_priv,
                 if (submit_req->ctx != ring->default_context)
                         intel_lr_context_unpin(ring, submit_req->ctx);
 
-                i915_gem_context_unreference(submit_req->ctx);
-                kfree(submit_req);
+                i915_gem_request_unreference(submit_req);
         }
 
         /*
@@ -2937,9 +2936,9 @@ i915_gem_wait_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
         req = obj->last_read_req;
 
         /* Do this after OLR check to make sure we make forward progress polling
-         * on this IOCTL with a timeout <=0 (like busy ioctl)
+         * on this IOCTL with a timeout == 0 (like busy ioctl)
          */
-        if (args->timeout_ns <= 0) {
+        if (args->timeout_ns == 0) {
                 ret = -ETIME;
                 goto out;
         }
@@ -2949,7 +2948,8 @@ i915_gem_wait_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
         i915_gem_request_reference(req);
         mutex_unlock(&dev->struct_mutex);
 
-        ret = __i915_wait_request(req, reset_counter, true, &args->timeout_ns,
+        ret = __i915_wait_request(req, reset_counter, true,
+                                  args->timeout_ns > 0 ? &args->timeout_ns : NULL,
                                   file->driver_priv);
         mutex_lock(&dev->struct_mutex);
         i915_gem_request_unreference(req);
@@ -4793,6 +4793,9 @@ i915_gem_init_hw(struct drm_device *dev)
         if (INTEL_INFO(dev)->gen < 6 && !intel_enable_gtt())
                 return -EIO;
 
+        /* Double layer security blanket, see i915_gem_init() */
+        intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
+
         if (dev_priv->ellc_size)
                 I915_WRITE(HSW_IDICR, I915_READ(HSW_IDICR) | IDIHASHMSK(0xf));
 
@@ -4825,7 +4828,7 @@ i915_gem_init_hw(struct drm_device *dev)
         for_each_ring(ring, dev_priv, i) {
                 ret = ring->init_hw(ring);
                 if (ret)
-                        return ret;
+                        goto out;
         }
 
         for (i = 0; i < NUM_L3_SLICES(dev); i++)
@@ -4842,9 +4845,11 @@ i915_gem_init_hw(struct drm_device *dev)
                 DRM_ERROR("Context enable failed %d\n", ret);
                 i915_gem_cleanup_ringbuffer(dev);
 
-                return ret;
+                goto out;
         }
 
+out:
+        intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
         return ret;
 }
 
@@ -4878,6 +4883,14 @@ int i915_gem_init(struct drm_device *dev)
                 dev_priv->gt.stop_ring = intel_logical_ring_stop;
         }
 
+        /* This is just a security blanket to placate dragons.
+         * On some systems, we very sporadically observe that the first TLBs
+         * used by the CS may be stale, despite us poking the TLB reset. If
+         * we hold the forcewake during initialisation these problems
+         * just magically go away.
+         */
+        intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
+
         ret = i915_gem_init_userptr(dev);
         if (ret)
                 goto out_unlock;
@@ -4904,6 +4917,7 @@ int i915_gem_init(struct drm_device *dev)
         }
 
 out_unlock:
+        intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
         mutex_unlock(&dev->struct_mutex);
 
         return ret;
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 746f77fb57a3..dccdc8aad2e2 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -1145,7 +1145,7 @@ static int gen6_ppgtt_init(struct i915_hw_ppgtt *ppgtt)
 
         ppgtt->base.clear_range(&ppgtt->base, 0, ppgtt->base.total, true);
 
-        DRM_DEBUG_DRIVER("Allocated pde space (%ldM) at GTT entry: %lx\n",
+        DRM_DEBUG_DRIVER("Allocated pde space (%lldM) at GTT entry: %llx\n",
                          ppgtt->node.size >> 20,
                          ppgtt->node.start / PAGE_SIZE);
 
@@ -1713,8 +1713,8 @@ void i915_gem_gtt_finish_object(struct drm_i915_gem_object *obj)
 
 static void i915_gtt_color_adjust(struct drm_mm_node *node,
                                   unsigned long color,
-                                  unsigned long *start,
-                                  unsigned long *end)
+                                  u64 *start,
+                                  u64 *end)
 {
         if (node->color != color)
                 *start += 4096;
diff --git a/drivers/gpu/drm/i915/i915_gem_stolen.c b/drivers/gpu/drm/i915/i915_gem_stolen.c
index a2045848bd1a..9c6f93ec886b 100644
--- a/drivers/gpu/drm/i915/i915_gem_stolen.c
+++ b/drivers/gpu/drm/i915/i915_gem_stolen.c
@@ -485,10 +485,8 @@ i915_gem_object_create_stolen_for_preallocated(struct drm_device *dev,
                         stolen_offset, gtt_offset, size);
 
         /* KISS and expect everything to be page-aligned */
-        BUG_ON(stolen_offset & 4095);
-        BUG_ON(size & 4095);
-
-        if (WARN_ON(size == 0))
+        if (WARN_ON(size == 0) || WARN_ON(size & 4095) ||
+            WARN_ON(stolen_offset & 4095))
                 return NULL;
 
         stolen = kzalloc(sizeof(*stolen), GFP_KERNEL);
diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c b/drivers/gpu/drm/i915/i915_gem_tiling.c
index 7a24bd1a51f6..6377b22269ad 100644
--- a/drivers/gpu/drm/i915/i915_gem_tiling.c
+++ b/drivers/gpu/drm/i915/i915_gem_tiling.c
@@ -335,9 +335,10 @@ i915_gem_set_tiling(struct drm_device *dev, void *data,
                 return -EINVAL;
         }
 
+        mutex_lock(&dev->struct_mutex);
         if (i915_gem_obj_is_pinned(obj) || obj->framebuffer_references) {
-                drm_gem_object_unreference_unlocked(&obj->base);
-                return -EBUSY;
+                ret = -EBUSY;
+                goto err;
         }
 
         if (args->tiling_mode == I915_TILING_NONE) {
@@ -369,7 +370,6 @@ i915_gem_set_tiling(struct drm_device *dev, void *data,
                 }
         }
 
-        mutex_lock(&dev->struct_mutex);
         if (args->tiling_mode != obj->tiling_mode ||
             args->stride != obj->stride) {
                 /* We need to rebind the object if its current allocation
@@ -424,6 +424,7 @@ i915_gem_set_tiling(struct drm_device *dev, void *data,
                 obj->bit_17 = NULL;
         }
 
+err:
         drm_gem_object_unreference(&obj->base);
         mutex_unlock(&dev->struct_mutex);
 
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 4145d95902f5..ede5bbbd8a08 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -1892,6 +1892,9 @@ static irqreturn_t valleyview_irq_handler(int irq, void *arg)
         u32 iir, gt_iir, pm_iir;
         irqreturn_t ret = IRQ_NONE;
 
+        if (!intel_irqs_enabled(dev_priv))
+                return IRQ_NONE;
+
         while (true) {
                 /* Find, clear, then process each source of interrupt */
 
@@ -1936,6 +1939,9 @@ static irqreturn_t cherryview_irq_handler(int irq, void *arg)
         u32 master_ctl, iir;
         irqreturn_t ret = IRQ_NONE;
 
+        if (!intel_irqs_enabled(dev_priv))
+                return IRQ_NONE;
+
         for (;;) {
                 master_ctl = I915_READ(GEN8_MASTER_IRQ) & ~GEN8_MASTER_IRQ_CONTROL;
                 iir = I915_READ(VLV_IIR);
@@ -2208,6 +2214,9 @@ static irqreturn_t ironlake_irq_handler(int irq, void *arg)
         u32 de_iir, gt_iir, de_ier, sde_ier = 0;
         irqreturn_t ret = IRQ_NONE;
 
+        if (!intel_irqs_enabled(dev_priv))
+                return IRQ_NONE;
+
         /* We get interrupts on unclaimed registers, so check for this before we
          * do any I915_{READ,WRITE}. */
         intel_uncore_check_errors(dev);
@@ -2279,6 +2288,9 @@ static irqreturn_t gen8_irq_handler(int irq, void *arg)
         enum pipe pipe;
         u32 aux_mask = GEN8_AUX_CHANNEL_A;
 
+        if (!intel_irqs_enabled(dev_priv))
+                return IRQ_NONE;
+
         if (IS_GEN9(dev))
                 aux_mask |=  GEN9_AUX_CHANNEL_B | GEN9_AUX_CHANNEL_C |
                         GEN9_AUX_CHANNEL_D;
@@ -3771,6 +3783,9 @@ static irqreturn_t i8xx_irq_handler(int irq, void *arg)
                 I915_DISPLAY_PLANE_A_FLIP_PENDING_INTERRUPT |
                 I915_DISPLAY_PLANE_B_FLIP_PENDING_INTERRUPT;
 
+        if (!intel_irqs_enabled(dev_priv))
+                return IRQ_NONE;
+
         iir = I915_READ16(IIR);
         if (iir == 0)
                 return IRQ_NONE;
@@ -3951,6 +3966,9 @@ static irqreturn_t i915_irq_handler(int irq, void *arg)
                 I915_DISPLAY_PLANE_B_FLIP_PENDING_INTERRUPT;
         int pipe, ret = IRQ_NONE;
 
+        if (!intel_irqs_enabled(dev_priv))
+                return IRQ_NONE;
+
         iir = I915_READ(IIR);
         do {
                 bool irq_received = (iir & ~flip_mask) != 0;
@@ -4171,6 +4189,9 @@ static irqreturn_t i965_irq_handler(int irq, void *arg)
                 I915_DISPLAY_PLANE_A_FLIP_PENDING_INTERRUPT |
                 I915_DISPLAY_PLANE_B_FLIP_PENDING_INTERRUPT;
 
+        if (!intel_irqs_enabled(dev_priv))
+                return IRQ_NONE;
+
         iir = I915_READ(IIR);
 
         for (;;) {
@@ -4520,6 +4541,7 @@ void intel_runtime_pm_disable_interrupts(struct drm_i915_private *dev_priv)
 {
         dev_priv->dev->driver->irq_uninstall(dev_priv->dev);
         dev_priv->pm.irqs_enabled = false;
+        synchronize_irq(dev_priv->dev->irq);
 }
 
 /**
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 3d220a67f865..9943c20a741d 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -2371,13 +2371,19 @@ intel_alloc_plane_obj(struct intel_crtc *crtc,
         struct drm_device *dev = crtc->base.dev;
         struct drm_i915_gem_object *obj = NULL;
         struct drm_mode_fb_cmd2 mode_cmd = { 0 };
-        u32 base = plane_config->base;
+        u32 base_aligned = round_down(plane_config->base, PAGE_SIZE);
+        u32 size_aligned = round_up(plane_config->base + plane_config->size,
+                                    PAGE_SIZE);
+
+        size_aligned -= base_aligned;
 
         if (plane_config->size == 0)
                 return false;
 
-        obj = i915_gem_object_create_stolen_for_preallocated(dev, base, base,
-                                                             plane_config->size);
+        obj = i915_gem_object_create_stolen_for_preallocated(dev,
+                                                             base_aligned,
+                                                             base_aligned,
+                                                             size_aligned);
         if (!obj)
                 return false;
 
@@ -2725,10 +2731,19 @@ static void skylake_update_primary_plane(struct drm_crtc *crtc,
         case DRM_FORMAT_XRGB8888:
                 plane_ctl |= PLANE_CTL_FORMAT_XRGB_8888;
                 break;
+        case DRM_FORMAT_ARGB8888:
+                plane_ctl |= PLANE_CTL_FORMAT_XRGB_8888;
+                plane_ctl |= PLANE_CTL_ALPHA_SW_PREMULTIPLY;
+                break;
         case DRM_FORMAT_XBGR8888:
                 plane_ctl |= PLANE_CTL_ORDER_RGBX;
                 plane_ctl |= PLANE_CTL_FORMAT_XRGB_8888;
                 break;
+        case DRM_FORMAT_ABGR8888:
+                plane_ctl |= PLANE_CTL_ORDER_RGBX;
+                plane_ctl |= PLANE_CTL_FORMAT_XRGB_8888;
+                plane_ctl |= PLANE_CTL_ALPHA_SW_PREMULTIPLY;
+                break;
         case DRM_FORMAT_XRGB2101010:
                 plane_ctl |= PLANE_CTL_FORMAT_XRGB_2101010;
                 break;
@@ -6627,7 +6642,7 @@ i9xx_get_initial_plane_config(struct intel_crtc *crtc,
         aligned_height = intel_fb_align_height(dev, fb->height,
                                                plane_config->tiling);
 
-        plane_config->size = PAGE_ALIGN(fb->pitches[0] * aligned_height);
+        plane_config->size = fb->pitches[0] * aligned_height;
 
         DRM_DEBUG_KMS("pipe/plane %c/%d with fb: size=%dx%d@%d, offset=%x, pitch %d, size 0x%x\n",
                       pipe_name(pipe), plane, fb->width, fb->height,
@@ -7664,7 +7679,7 @@ skylake_get_initial_plane_config(struct intel_crtc *crtc,
         aligned_height = intel_fb_align_height(dev, fb->height,
                                                plane_config->tiling);
 
-        plane_config->size = ALIGN(fb->pitches[0] * aligned_height, PAGE_SIZE);
+        plane_config->size = fb->pitches[0] * aligned_height;
 
         DRM_DEBUG_KMS("pipe %c with fb: size=%dx%d@%d, offset=%x, pitch %d, size 0x%x\n",
                       pipe_name(pipe), fb->width, fb->height,
@@ -7755,7 +7770,7 @@ ironlake_get_initial_plane_config(struct intel_crtc *crtc,
         aligned_height = intel_fb_align_height(dev, fb->height,
                                                plane_config->tiling);
 
-        plane_config->size = PAGE_ALIGN(fb->pitches[0] * aligned_height);
+        plane_config->size = fb->pitches[0] * aligned_height;
 
         DRM_DEBUG_KMS("pipe %c with fb: size=%dx%d@%d, offset=%x, pitch %d, size 0x%x\n",
                       pipe_name(pipe), fb->width, fb->height,
@@ -8698,6 +8713,7 @@ retry:
                         old->release_fb->funcs->destroy(old->release_fb);
                 goto fail;
         }
+        crtc->primary->crtc = crtc;
 
         /* let the connector get through one full cycle before testing */
         intel_wait_for_vblank(dev, intel_crtc->pipe);
@@ -9700,7 +9716,7 @@ void intel_check_page_flip(struct drm_device *dev, int pipe)
         struct drm_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe];
         struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 
-        WARN_ON(!in_irq());
+        WARN_ON(!in_interrupt());
 
         if (crtc == NULL)
                 return;
@@ -12182,9 +12198,6 @@ intel_check_cursor_plane(struct drm_plane *plane,
                 return -ENOMEM;
         }
 
-        if (fb == crtc->cursor->fb)
-                return 0;
-
         /* we only need to pin inside GTT if cursor is non-phy */
         mutex_lock(&dev->struct_mutex);
         if (!INTEL_INFO(dev)->cursor_needs_physical && obj->tiling_mode) {
@@ -13096,6 +13109,9 @@ static struct intel_quirk intel_quirks[] = {
 
         /* HP Chromebook 14 (Celeron 2955U) */
         { 0x0a06, 0x103c, 0x21ed, quirk_backlight_present },
+
+        /* Dell Chromebook 11 */
+        { 0x0a06, 0x1028, 0x0a35, quirk_backlight_present },
 };
 
 static void intel_init_quirks(struct drm_device *dev)
diff --git a/drivers/gpu/drm/i915/intel_fifo_underrun.c b/drivers/gpu/drm/i915/intel_fifo_underrun.c
index 04e248dd2259..54daa66c6970 100644
--- a/drivers/gpu/drm/i915/intel_fifo_underrun.c
+++ b/drivers/gpu/drm/i915/intel_fifo_underrun.c
@@ -282,16 +282,6 @@ bool intel_set_cpu_fifo_underrun_reporting(struct drm_i915_private *dev_priv,
         return ret;
 }
 
-static bool
-__cpu_fifo_underrun_reporting_enabled(struct drm_i915_private *dev_priv,
-                                      enum pipe pipe)
-{
-        struct drm_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe];
-        struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
-
-        return !intel_crtc->cpu_fifo_underrun_disabled;
-}
-
 /**
  * intel_set_pch_fifo_underrun_reporting - set PCH fifo underrun reporting state
  * @dev_priv: i915 device instance
@@ -352,9 +342,15 @@ bool intel_set_pch_fifo_underrun_reporting(struct drm_i915_private *dev_priv,
 void intel_cpu_fifo_underrun_irq_handler(struct drm_i915_private *dev_priv,
                                          enum pipe pipe)
 {
+        struct drm_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe];
+
+        /* We may be called too early in init, thanks BIOS! */
+        if (crtc == NULL)
+                return;
+
         /* GMCH can't disable fifo underruns, filter them. */
         if (HAS_GMCH_DISPLAY(dev_priv->dev) &&
-            !__cpu_fifo_underrun_reporting_enabled(dev_priv, pipe))
+            to_intel_crtc(crtc)->cpu_fifo_underrun_disabled)
                 return;
 
         if (intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, false))
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 0f358c5999ec..e8d3da9f3373 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -503,18 +503,19 @@ static int execlists_context_queue(struct intel_engine_cs *ring,
                  * If there isn't a request associated with this submission,
                  * create one as a temporary holder.
                  */
-                WARN(1, "execlist context submission without request");
                 request = kzalloc(sizeof(*request), GFP_KERNEL);
                 if (request == NULL)
                         return -ENOMEM;
                 request->ring = ring;
                 request->ctx = to;
+                kref_init(&request->ref);
+                request->uniq = dev_priv->request_uniq++;
+                i915_gem_context_reference(request->ctx);
         } else {
+                i915_gem_request_reference(request);
                 WARN_ON(to != request->ctx);
         }
         request->tail = tail;
-        i915_gem_request_reference(request);
-        i915_gem_context_reference(request->ctx);
 
         intel_runtime_pm_get(dev_priv);
 
@@ -731,7 +732,6 @@ void intel_execlists_retire_requests(struct intel_engine_cs *ring)
                 if (ctx_obj && (ctx != ring->default_context))
                         intel_lr_context_unpin(ring, ctx);
                 intel_runtime_pm_put(dev_priv);
-                i915_gem_context_unreference(ctx);
                 list_del(&req->execlist_link);
                 i915_gem_request_unreference(req);
         }
diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
index c47a3baa53d5..4e8fb891d4ea 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -1048,8 +1048,14 @@ static void intel_uncore_fw_domains_init(struct drm_device *dev)
 
                 /* We need to init first for ECOBUS access and then
                  * determine later if we want to reinit, in case of MT access is
-                 * not working
+                 * not working. In this stage we don't know which flavour this
+                 * ivb is, so it is better to reset also the gen6 fw registers
+                 * before the ecobus check.
                  */
+
+                __raw_i915_write32(dev_priv, FORCEWAKE, 0);
+                __raw_posting_read(dev_priv, ECOBUS);
+
                 fw_domain_init(dev_priv, FW_DOMAIN_ID_RENDER,
                                FORCEWAKE_MT, FORCEWAKE_MT_ACK);