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Diffstat (limited to 'drivers/gpu/drm/i915')
-rw-r--r--drivers/gpu/drm/i915/i915_drv.h1
-rw-r--r--drivers/gpu/drm/i915/i915_reg.h2
-rw-r--r--drivers/gpu/drm/i915/intel_bios.c6
-rw-r--r--drivers/gpu/drm/i915/intel_bios.h4
-rw-r--r--drivers/gpu/drm/i915/intel_pm.c9
5 files changed, 16 insertions, 6 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 9b85fcdb3918..d5dcf7fe1ee9 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -976,6 +976,7 @@ typedef struct drm_i915_private {
976 unsigned int int_crt_support:1; 976 unsigned int int_crt_support:1;
977 unsigned int lvds_use_ssc:1; 977 unsigned int lvds_use_ssc:1;
978 unsigned int display_clock_mode:1; 978 unsigned int display_clock_mode:1;
979 unsigned int fdi_rx_polarity_inverted:1;
979 int lvds_ssc_freq; 980 int lvds_ssc_freq;
980 unsigned int bios_lvds_val; /* initial [PCH_]LVDS reg val in VBIOS */ 981 unsigned int bios_lvds_val; /* initial [PCH_]LVDS reg val in VBIOS */
981 struct { 982 struct {
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 077d40f37b97..fc8a4a940e92 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -3960,7 +3960,7 @@
3960#define _TRANSB_CHICKEN2 0xf1064 3960#define _TRANSB_CHICKEN2 0xf1064
3961#define TRANS_CHICKEN2(pipe) _PIPE(pipe, _TRANSA_CHICKEN2, _TRANSB_CHICKEN2) 3961#define TRANS_CHICKEN2(pipe) _PIPE(pipe, _TRANSA_CHICKEN2, _TRANSB_CHICKEN2)
3962#define TRANS_CHICKEN2_TIMING_OVERRIDE (1<<31) 3962#define TRANS_CHICKEN2_TIMING_OVERRIDE (1<<31)
3963 3963#define TRANS_CHICKEN2_FDI_POLARITY_REVERSED (1<<29)
3964 3964
3965#define SOUTH_CHICKEN1 0xc2000 3965#define SOUTH_CHICKEN1 0xc2000
3966#define FDIA_PHASE_SYNC_SHIFT_OVR 19 3966#define FDIA_PHASE_SYNC_SHIFT_OVR 19
diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
index 194df27c89eb..95070b2124c6 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -351,12 +351,14 @@ parse_general_features(struct drm_i915_private *dev_priv,
351 dev_priv->lvds_ssc_freq = 351 dev_priv->lvds_ssc_freq =
352 intel_bios_ssc_frequency(dev, general->ssc_freq); 352 intel_bios_ssc_frequency(dev, general->ssc_freq);
353 dev_priv->display_clock_mode = general->display_clock_mode; 353 dev_priv->display_clock_mode = general->display_clock_mode;
354 DRM_DEBUG_KMS("BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d\n", 354 dev_priv->fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted;
355 DRM_DEBUG_KMS("BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n",
355 dev_priv->int_tv_support, 356 dev_priv->int_tv_support,
356 dev_priv->int_crt_support, 357 dev_priv->int_crt_support,
357 dev_priv->lvds_use_ssc, 358 dev_priv->lvds_use_ssc,
358 dev_priv->lvds_ssc_freq, 359 dev_priv->lvds_ssc_freq,
359 dev_priv->display_clock_mode); 360 dev_priv->display_clock_mode,
361 dev_priv->fdi_rx_polarity_inverted);
360 } 362 }
361} 363}
362 364
diff --git a/drivers/gpu/drm/i915/intel_bios.h b/drivers/gpu/drm/i915/intel_bios.h
index 36e57f934373..e088d6f0956a 100644
--- a/drivers/gpu/drm/i915/intel_bios.h
+++ b/drivers/gpu/drm/i915/intel_bios.h
@@ -127,7 +127,9 @@ struct bdb_general_features {
127 /* bits 3 */ 127 /* bits 3 */
128 u8 disable_smooth_vision:1; 128 u8 disable_smooth_vision:1;
129 u8 single_dvi:1; 129 u8 single_dvi:1;
130 u8 rsvd9:6; /* finish byte */ 130 u8 rsvd9:1;
131 u8 fdi_rx_polarity_inverted:1;
132 u8 rsvd10:4; /* finish byte */
131 133
132 /* bits 4 */ 134 /* bits 4 */
133 u8 legacy_monitor_detect; 135 u8 legacy_monitor_detect;
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index f747cb036d8c..6f67fa122f81 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3590,6 +3590,7 @@ static void cpt_init_clock_gating(struct drm_device *dev)
3590{ 3590{
3591 struct drm_i915_private *dev_priv = dev->dev_private; 3591 struct drm_i915_private *dev_priv = dev->dev_private;
3592 int pipe; 3592 int pipe;
3593 uint32_t val;
3593 3594
3594 /* 3595 /*
3595 * On Ibex Peak and Cougar Point, we need to disable clock 3596 * On Ibex Peak and Cougar Point, we need to disable clock
@@ -3602,8 +3603,12 @@ static void cpt_init_clock_gating(struct drm_device *dev)
3602 /* The below fixes the weird display corruption, a few pixels shifted 3603 /* The below fixes the weird display corruption, a few pixels shifted
3603 * downward, on (only) LVDS of some HP laptops with IVY. 3604 * downward, on (only) LVDS of some HP laptops with IVY.
3604 */ 3605 */
3605 for_each_pipe(pipe) 3606 for_each_pipe(pipe) {
3606 I915_WRITE(TRANS_CHICKEN2(pipe), TRANS_CHICKEN2_TIMING_OVERRIDE); 3607 val = TRANS_CHICKEN2_TIMING_OVERRIDE;
3608 if (dev_priv->fdi_rx_polarity_inverted)
3609 val |= TRANS_CHICKEN2_FDI_POLARITY_REVERSED;
3610 I915_WRITE(TRANS_CHICKEN2(pipe), val);
3611 }
3607 /* WADP0ClockGatingDisable */ 3612 /* WADP0ClockGatingDisable */
3608 for_each_pipe(pipe) { 3613 for_each_pipe(pipe) {
3609 I915_WRITE(TRANS_CHICKEN1(pipe), 3614 I915_WRITE(TRANS_CHICKEN1(pipe),