2 files changed, 7 insertions, 6 deletions

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 4058eaa19894..2102ff32ee20 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -3672,9 +3672,9 @@
 #define _GAMMA_MODE_B           0x4ac80
 #define GAMMA_MODE(pipe) _PIPE(pipe, _GAMMA_MODE_A, _GAMMA_MODE_B)
 #define GAMMA_MODE_MODE_MASK    (3 << 0)
-#define GAMMA_MODE_MODE_8bit    (0 << 0)
-#define GAMMA_MODE_MODE_10bit   (1 << 0)
-#define GAMMA_MODE_MODE_12bit   (2 << 0)
+#define GAMMA_MODE_MODE_8BIT    (0 << 0)
+#define GAMMA_MODE_MODE_10BIT   (1 << 0)
+#define GAMMA_MODE_MODE_12BIT   (2 << 0)
 #define GAMMA_MODE_MODE_SPLIT   (3 << 0)
 
 /* interrupts */
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index a6b4bee9034c..06b1180c4c16 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5437,13 +5437,11 @@ static void haswell_set_pipeconf(struct drm_crtc *crtc)
         enum transcoder cpu_transcoder = intel_crtc->config.cpu_transcoder;
         uint32_t val;
 
-        val = I915_READ(PIPECONF(cpu_transcoder));
+        val = 0;
 
-        val &= ~(PIPECONF_DITHER_EN | PIPECONF_DITHER_TYPE_MASK);
         if (intel_crtc->config.dither)
                 val |= (PIPECONF_DITHER_EN | PIPECONF_DITHER_TYPE_SP);
 
-        val &= ~PIPECONF_INTERLACE_MASK_HSW;
         if (intel_crtc->config.adjusted_mode.flags & DRM_MODE_FLAG_INTERLACE)
                 val |= PIPECONF_INTERLACED_ILK;
         else
@@ -5451,6 +5449,9 @@ static void haswell_set_pipeconf(struct drm_crtc *crtc)
 
         I915_WRITE(PIPECONF(cpu_transcoder), val);
         POSTING_READ(PIPECONF(cpu_transcoder));
+
+        I915_WRITE(GAMMA_MODE(intel_crtc->pipe), GAMMA_MODE_MODE_8BIT);
+        POSTING_READ(GAMMA_MODE(intel_crtc->pipe));
 }
 
 static bool ironlake_compute_clocks(struct drm_crtc *crtc,