diff options
Diffstat (limited to 'drivers/gpu/drm/i915/intel_ringbuffer.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_ringbuffer.c | 21 |
1 files changed, 3 insertions, 18 deletions
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c index 235d9c4b40ae..ec7175e0dcd8 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.c +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c | |||
@@ -62,18 +62,9 @@ render_ring_flush(struct intel_ring_buffer *ring, | |||
62 | u32 flush_domains) | 62 | u32 flush_domains) |
63 | { | 63 | { |
64 | struct drm_device *dev = ring->dev; | 64 | struct drm_device *dev = ring->dev; |
65 | drm_i915_private_t *dev_priv = dev->dev_private; | ||
66 | u32 cmd; | 65 | u32 cmd; |
67 | int ret; | 66 | int ret; |
68 | 67 | ||
69 | #if WATCH_EXEC | ||
70 | DRM_INFO("%s: invalidate %08x flush %08x\n", __func__, | ||
71 | invalidate_domains, flush_domains); | ||
72 | #endif | ||
73 | |||
74 | trace_i915_gem_request_flush(dev, dev_priv->next_seqno, | ||
75 | invalidate_domains, flush_domains); | ||
76 | |||
77 | if ((invalidate_domains | flush_domains) & I915_GEM_GPU_DOMAINS) { | 68 | if ((invalidate_domains | flush_domains) & I915_GEM_GPU_DOMAINS) { |
78 | /* | 69 | /* |
79 | * read/write caches: | 70 | * read/write caches: |
@@ -122,9 +113,6 @@ render_ring_flush(struct intel_ring_buffer *ring, | |||
122 | (IS_G4X(dev) || IS_GEN5(dev))) | 113 | (IS_G4X(dev) || IS_GEN5(dev))) |
123 | cmd |= MI_INVALIDATE_ISP; | 114 | cmd |= MI_INVALIDATE_ISP; |
124 | 115 | ||
125 | #if WATCH_EXEC | ||
126 | DRM_INFO("%s: queue flush %08x to ring\n", __func__, cmd); | ||
127 | #endif | ||
128 | ret = intel_ring_begin(ring, 2); | 116 | ret = intel_ring_begin(ring, 2); |
129 | if (ret) | 117 | if (ret) |
130 | return ret; | 118 | return ret; |
@@ -714,11 +702,8 @@ render_ring_dispatch_execbuffer(struct intel_ring_buffer *ring, | |||
714 | u32 offset, u32 len) | 702 | u32 offset, u32 len) |
715 | { | 703 | { |
716 | struct drm_device *dev = ring->dev; | 704 | struct drm_device *dev = ring->dev; |
717 | drm_i915_private_t *dev_priv = dev->dev_private; | ||
718 | int ret; | 705 | int ret; |
719 | 706 | ||
720 | trace_i915_gem_request_submit(dev, dev_priv->next_seqno + 1); | ||
721 | |||
722 | if (IS_I830(dev) || IS_845G(dev)) { | 707 | if (IS_I830(dev) || IS_845G(dev)) { |
723 | ret = intel_ring_begin(ring, 4); | 708 | ret = intel_ring_begin(ring, 4); |
724 | if (ret) | 709 | if (ret) |
@@ -953,13 +938,13 @@ int intel_wait_ring_buffer(struct intel_ring_buffer *ring, int n) | |||
953 | return 0; | 938 | return 0; |
954 | } | 939 | } |
955 | 940 | ||
956 | trace_i915_ring_wait_begin (dev); | 941 | trace_i915_ring_wait_begin(ring); |
957 | end = jiffies + 3 * HZ; | 942 | end = jiffies + 3 * HZ; |
958 | do { | 943 | do { |
959 | ring->head = I915_READ_HEAD(ring); | 944 | ring->head = I915_READ_HEAD(ring); |
960 | ring->space = ring_space(ring); | 945 | ring->space = ring_space(ring); |
961 | if (ring->space >= n) { | 946 | if (ring->space >= n) { |
962 | trace_i915_ring_wait_end(dev); | 947 | trace_i915_ring_wait_end(ring); |
963 | return 0; | 948 | return 0; |
964 | } | 949 | } |
965 | 950 | ||
@@ -973,7 +958,7 @@ int intel_wait_ring_buffer(struct intel_ring_buffer *ring, int n) | |||
973 | if (atomic_read(&dev_priv->mm.wedged)) | 958 | if (atomic_read(&dev_priv->mm.wedged)) |
974 | return -EAGAIN; | 959 | return -EAGAIN; |
975 | } while (!time_after(jiffies, end)); | 960 | } while (!time_after(jiffies, end)); |
976 | trace_i915_ring_wait_end (dev); | 961 | trace_i915_ring_wait_end(ring); |
977 | return -EBUSY; | 962 | return -EBUSY; |
978 | } | 963 | } |
979 | 964 | ||