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path: root/drivers/gpu/drm/i915/intel_pm.c
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Diffstat (limited to 'drivers/gpu/drm/i915/intel_pm.c')
-rw-r--r--drivers/gpu/drm/i915/intel_pm.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 0c115cc4899f..dd176b7296c1 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -2096,16 +2096,16 @@ static uint32_t ilk_pipe_pixel_rate(struct drm_device *dev,
2096 struct drm_crtc *crtc) 2096 struct drm_crtc *crtc)
2097{ 2097{
2098 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); 2098 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
2099 uint32_t pixel_rate, pfit_size; 2099 uint32_t pixel_rate;
2100 2100
2101 pixel_rate = intel_crtc->config.adjusted_mode.clock; 2101 pixel_rate = intel_crtc->config.adjusted_mode.clock;
2102 2102
2103 /* We only use IF-ID interlacing. If we ever use PF-ID we'll need to 2103 /* We only use IF-ID interlacing. If we ever use PF-ID we'll need to
2104 * adjust the pixel_rate here. */ 2104 * adjust the pixel_rate here. */
2105 2105
2106 pfit_size = intel_crtc->config.pch_pfit.size; 2106 if (intel_crtc->config.pch_pfit.enabled) {
2107 if (pfit_size) {
2108 uint64_t pipe_w, pipe_h, pfit_w, pfit_h; 2107 uint64_t pipe_w, pipe_h, pfit_w, pfit_h;
2108 uint32_t pfit_size = intel_crtc->config.pch_pfit.size;
2109 2109
2110 pipe_w = intel_crtc->config.requested_mode.hdisplay; 2110 pipe_w = intel_crtc->config.requested_mode.hdisplay;
2111 pipe_h = intel_crtc->config.requested_mode.vdisplay; 2111 pipe_h = intel_crtc->config.requested_mode.vdisplay;