1 files changed, 1 insertions, 13 deletions

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 0bb69fd255a9..94aabcaa3a67 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -2491,14 +2491,7 @@ static void gen6_enable_rps(struct drm_device *dev)
         gen6_set_rps(dev_priv->dev, (gt_perf_status & 0xff00) >> 8);
 
         /* requires MSI enabled */
-        I915_WRITE(GEN6_PMIER,
-                   GEN6_PM_MBOX_EVENT |
-                   GEN6_PM_THERMAL_EVENT |
-                   GEN6_PM_RP_DOWN_TIMEOUT |
-                   GEN6_PM_RP_UP_THRESHOLD |
-                   GEN6_PM_RP_DOWN_THRESHOLD |
-                   GEN6_PM_RP_UP_EI_EXPIRED |
-                   GEN6_PM_RP_DOWN_EI_EXPIRED);
+        I915_WRITE(GEN6_PMIER, GEN6_PM_DEFERRED_EVENTS);
         spin_lock_irq(&dev_priv->rps_lock);
         WARN_ON(dev_priv->pm_iir != 0);
         I915_WRITE(GEN6_PMIMR, 0);
@@ -3939,11 +3932,6 @@ void intel_init_pm(struct drm_device *dev)
                 else
                         dev_priv->display.get_fifo_size = i830_get_fifo_size;
         }
-
-        /* We attempt to init the necessary power wells early in the initialization
-         * time, so the subsystems that expect power to be enabled can work.
-         */
-        intel_init_power_wells(dev);
 }
 
 static void __gen6_gt_wait_for_thread_c0(struct drm_i915_private *dev_priv)