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path: root/drivers/gpu/drm/i915/intel_pm.c
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Diffstat (limited to 'drivers/gpu/drm/i915/intel_pm.c')
-rw-r--r--drivers/gpu/drm/i915/intel_pm.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 17f157a7b640..059c77367701 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -2558,8 +2558,8 @@ static void gen6_enable_rps(struct drm_device *dev)
2558 rp_state_cap = I915_READ(GEN6_RP_STATE_CAP); 2558 rp_state_cap = I915_READ(GEN6_RP_STATE_CAP);
2559 gt_perf_status = I915_READ(GEN6_GT_PERF_STATUS); 2559 gt_perf_status = I915_READ(GEN6_GT_PERF_STATUS);
2560 2560
2561 /* In units of 100MHz */ 2561 /* In units of 50MHz */
2562 dev_priv->rps.max_delay = rp_state_cap & 0xff; 2562 dev_priv->rps.hw_max = dev_priv->rps.max_delay = rp_state_cap & 0xff;
2563 dev_priv->rps.min_delay = (rp_state_cap & 0xff0000) >> 16; 2563 dev_priv->rps.min_delay = (rp_state_cap & 0xff0000) >> 16;
2564 dev_priv->rps.cur_delay = 0; 2564 dev_priv->rps.cur_delay = 0;
2565 2565
@@ -2646,6 +2646,7 @@ static void gen6_enable_rps(struct drm_device *dev)
2646 DRM_DEBUG_DRIVER("overclocking supported, adjusting frequency max from %dMHz to %dMHz\n", 2646 DRM_DEBUG_DRIVER("overclocking supported, adjusting frequency max from %dMHz to %dMHz\n",
2647 (dev_priv->rps.max_delay & 0xff) * 50, 2647 (dev_priv->rps.max_delay & 0xff) * 50,
2648 (pcu_mbox & 0xff) * 50); 2648 (pcu_mbox & 0xff) * 50);
2649 dev_priv->rps.hw_max = pcu_mbox & 0xff;
2649 dev_priv->rps.max_delay = pcu_mbox & 0xff; 2650 dev_priv->rps.max_delay = pcu_mbox & 0xff;
2650 } 2651 }
2651 } else { 2652 } else {