diff options
Diffstat (limited to 'drivers/gpu/drm/i915/intel_panel.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_panel.c | 19 |
1 files changed, 7 insertions, 12 deletions
diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c index 499d4c0dbeeb..04d79fd1dc9d 100644 --- a/drivers/gpu/drm/i915/intel_panel.c +++ b/drivers/gpu/drm/i915/intel_panel.c | |||
@@ -178,13 +178,10 @@ u32 intel_panel_get_max_backlight(struct drm_device *dev) | |||
178 | if (HAS_PCH_SPLIT(dev)) { | 178 | if (HAS_PCH_SPLIT(dev)) { |
179 | max >>= 16; | 179 | max >>= 16; |
180 | } else { | 180 | } else { |
181 | if (IS_PINEVIEW(dev)) { | 181 | if (INTEL_INFO(dev)->gen < 4) |
182 | max >>= 17; | 182 | max >>= 17; |
183 | } else { | 183 | else |
184 | max >>= 16; | 184 | max >>= 16; |
185 | if (INTEL_INFO(dev)->gen < 4) | ||
186 | max &= ~1; | ||
187 | } | ||
188 | 185 | ||
189 | if (is_backlight_combination_mode(dev)) | 186 | if (is_backlight_combination_mode(dev)) |
190 | max *= 0xff; | 187 | max *= 0xff; |
@@ -203,13 +200,12 @@ u32 intel_panel_get_backlight(struct drm_device *dev) | |||
203 | val = I915_READ(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; | 200 | val = I915_READ(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; |
204 | } else { | 201 | } else { |
205 | val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; | 202 | val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; |
206 | if (IS_PINEVIEW(dev)) | 203 | if (INTEL_INFO(dev)->gen < 4) |
207 | val >>= 1; | 204 | val >>= 1; |
208 | 205 | ||
209 | if (is_backlight_combination_mode(dev)) { | 206 | if (is_backlight_combination_mode(dev)) { |
210 | u8 lbpc; | 207 | u8 lbpc; |
211 | 208 | ||
212 | val &= ~1; | ||
213 | pci_read_config_byte(dev->pdev, PCI_LBPC, &lbpc); | 209 | pci_read_config_byte(dev->pdev, PCI_LBPC, &lbpc); |
214 | val *= lbpc; | 210 | val *= lbpc; |
215 | } | 211 | } |
@@ -246,11 +242,9 @@ static void intel_panel_actually_set_backlight(struct drm_device *dev, u32 level | |||
246 | } | 242 | } |
247 | 243 | ||
248 | tmp = I915_READ(BLC_PWM_CTL); | 244 | tmp = I915_READ(BLC_PWM_CTL); |
249 | if (IS_PINEVIEW(dev)) { | 245 | if (INTEL_INFO(dev)->gen < 4) |
250 | tmp &= ~(BACKLIGHT_DUTY_CYCLE_MASK - 1); | ||
251 | level <<= 1; | 246 | level <<= 1; |
252 | } else | 247 | tmp &= ~BACKLIGHT_DUTY_CYCLE_MASK; |
253 | tmp &= ~BACKLIGHT_DUTY_CYCLE_MASK; | ||
254 | I915_WRITE(BLC_PWM_CTL, tmp | level); | 248 | I915_WRITE(BLC_PWM_CTL, tmp | level); |
255 | } | 249 | } |
256 | 250 | ||
@@ -326,7 +320,8 @@ static int intel_panel_update_status(struct backlight_device *bd) | |||
326 | static int intel_panel_get_brightness(struct backlight_device *bd) | 320 | static int intel_panel_get_brightness(struct backlight_device *bd) |
327 | { | 321 | { |
328 | struct drm_device *dev = bl_get_data(bd); | 322 | struct drm_device *dev = bl_get_data(bd); |
329 | return intel_panel_get_backlight(dev); | 323 | struct drm_i915_private *dev_priv = dev->dev_private; |
324 | return dev_priv->backlight_level; | ||
330 | } | 325 | } |
331 | 326 | ||
332 | static const struct backlight_ops intel_panel_bl_ops = { | 327 | static const struct backlight_ops intel_panel_bl_ops = { |