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path: root/drivers/gpu/drm/i915/intel_panel.c
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Diffstat (limited to 'drivers/gpu/drm/i915/intel_panel.c')
-rw-r--r--drivers/gpu/drm/i915/intel_panel.c13
1 files changed, 5 insertions, 8 deletions
diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
index a3730e0289e5..bee8cb6108a7 100644
--- a/drivers/gpu/drm/i915/intel_panel.c
+++ b/drivers/gpu/drm/i915/intel_panel.c
@@ -321,9 +321,6 @@ void intel_panel_enable_backlight(struct drm_device *dev,
321 if (dev_priv->backlight_level == 0) 321 if (dev_priv->backlight_level == 0)
322 dev_priv->backlight_level = intel_panel_get_max_backlight(dev); 322 dev_priv->backlight_level = intel_panel_get_max_backlight(dev);
323 323
324 dev_priv->backlight_enabled = true;
325 intel_panel_actually_set_backlight(dev, dev_priv->backlight_level);
326
327 if (INTEL_INFO(dev)->gen >= 4) { 324 if (INTEL_INFO(dev)->gen >= 4) {
328 uint32_t reg, tmp; 325 uint32_t reg, tmp;
329 326
@@ -359,12 +356,12 @@ void intel_panel_enable_backlight(struct drm_device *dev,
359 } 356 }
360 357
361set_level: 358set_level:
362 /* Check the current backlight level and try to set again if it's zero. 359 /* Call below after setting BLC_PWM_CPU_CTL2 and BLC_PWM_PCH_CTL1.
363 * On some machines, BLC_PWM_CPU_CTL is cleared to zero automatically 360 * BLC_PWM_CPU_CTL may be cleared to zero automatically when these
364 * when BLC_PWM_CPU_CTL2 and BLC_PWM_PCH_CTL1 are written. 361 * registers are set.
365 */ 362 */
366 if (!intel_panel_get_backlight(dev)) 363 dev_priv->backlight_enabled = true;
367 intel_panel_actually_set_backlight(dev, dev_priv->backlight_level); 364 intel_panel_actually_set_backlight(dev, dev_priv->backlight_level);
368} 365}
369 366
370static void intel_panel_init_backlight(struct drm_device *dev) 367static void intel_panel_init_backlight(struct drm_device *dev)