1 files changed, 18 insertions, 1 deletions

diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
index 3bc89a6bc3ee..54684168de1e 100644
--- a/drivers/gpu/drm/i915/intel_panel.c
+++ b/drivers/gpu/drm/i915/intel_panel.c
@@ -329,7 +329,7 @@ static int is_backlight_combination_mode(struct drm_device *dev)
 {
         struct drm_i915_private *dev_priv = dev->dev_private;
 
-        if (INTEL_INFO(dev)->gen >= 4)
+        if (IS_GEN4(dev))
                 return I915_READ(BLC_PWM_CTL2) & BLM_COMBINATION_MODE;
 
         if (IS_GEN2(dev))
@@ -372,6 +372,9 @@ static u32 i915_read_blc_pwm_ctl(struct drm_device *dev)
                                 I915_WRITE(BLC_PWM_CTL2,
                                            dev_priv->regfile.saveBLC_PWM_CTL2);
                 }
+
+                if (IS_VALLEYVIEW(dev) && !val)
+                        val = 0x0f42ffff;
         }
 
         return val;
@@ -629,10 +632,24 @@ set_level:
         spin_unlock_irqrestore(&dev_priv->backlight.lock, flags);
 }
 
+/* FIXME: use VBT vals to init PWM_CTL and PWM_CTL2 correctly */
+static void intel_panel_init_backlight_regs(struct drm_device *dev)
+{
+        struct drm_i915_private *dev_priv = dev->dev_private;
+
+        if (IS_VALLEYVIEW(dev)) {
+                u32 cur_val = I915_READ(BLC_PWM_CTL) &
+                        BACKLIGHT_DUTY_CYCLE_MASK;
+                I915_WRITE(BLC_PWM_CTL, (0xf42 << 16) | cur_val);
+        }
+}
+
 static void intel_panel_init_backlight(struct drm_device *dev)
 {
         struct drm_i915_private *dev_priv = dev->dev_private;
 
+        intel_panel_init_backlight_regs(dev);
+
         dev_priv->backlight.level = intel_panel_get_backlight(dev);
         dev_priv->backlight.enabled = dev_priv->backlight.level != 0;
 }