diff options
Diffstat (limited to 'drivers/gpu/drm/i915/intel_lvds.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_lvds.c | 41 |
1 files changed, 28 insertions, 13 deletions
diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c index c2e8a45780d5..14e516fdc2dd 100644 --- a/drivers/gpu/drm/i915/intel_lvds.c +++ b/drivers/gpu/drm/i915/intel_lvds.c | |||
@@ -56,7 +56,7 @@ static void intel_lvds_set_backlight(struct drm_device *dev, int level) | |||
56 | struct drm_i915_private *dev_priv = dev->dev_private; | 56 | struct drm_i915_private *dev_priv = dev->dev_private; |
57 | u32 blc_pwm_ctl, reg; | 57 | u32 blc_pwm_ctl, reg; |
58 | 58 | ||
59 | if (IS_IRONLAKE(dev)) | 59 | if (HAS_PCH_SPLIT(dev)) |
60 | reg = BLC_PWM_CPU_CTL; | 60 | reg = BLC_PWM_CPU_CTL; |
61 | else | 61 | else |
62 | reg = BLC_PWM_CTL; | 62 | reg = BLC_PWM_CTL; |
@@ -74,7 +74,7 @@ static u32 intel_lvds_get_max_backlight(struct drm_device *dev) | |||
74 | struct drm_i915_private *dev_priv = dev->dev_private; | 74 | struct drm_i915_private *dev_priv = dev->dev_private; |
75 | u32 reg; | 75 | u32 reg; |
76 | 76 | ||
77 | if (IS_IRONLAKE(dev)) | 77 | if (HAS_PCH_SPLIT(dev)) |
78 | reg = BLC_PWM_PCH_CTL2; | 78 | reg = BLC_PWM_PCH_CTL2; |
79 | else | 79 | else |
80 | reg = BLC_PWM_CTL; | 80 | reg = BLC_PWM_CTL; |
@@ -89,17 +89,22 @@ static u32 intel_lvds_get_max_backlight(struct drm_device *dev) | |||
89 | static void intel_lvds_set_power(struct drm_device *dev, bool on) | 89 | static void intel_lvds_set_power(struct drm_device *dev, bool on) |
90 | { | 90 | { |
91 | struct drm_i915_private *dev_priv = dev->dev_private; | 91 | struct drm_i915_private *dev_priv = dev->dev_private; |
92 | u32 pp_status, ctl_reg, status_reg; | 92 | u32 pp_status, ctl_reg, status_reg, lvds_reg; |
93 | 93 | ||
94 | if (IS_IRONLAKE(dev)) { | 94 | if (HAS_PCH_SPLIT(dev)) { |
95 | ctl_reg = PCH_PP_CONTROL; | 95 | ctl_reg = PCH_PP_CONTROL; |
96 | status_reg = PCH_PP_STATUS; | 96 | status_reg = PCH_PP_STATUS; |
97 | lvds_reg = PCH_LVDS; | ||
97 | } else { | 98 | } else { |
98 | ctl_reg = PP_CONTROL; | 99 | ctl_reg = PP_CONTROL; |
99 | status_reg = PP_STATUS; | 100 | status_reg = PP_STATUS; |
101 | lvds_reg = LVDS; | ||
100 | } | 102 | } |
101 | 103 | ||
102 | if (on) { | 104 | if (on) { |
105 | I915_WRITE(lvds_reg, I915_READ(lvds_reg) | LVDS_PORT_EN); | ||
106 | POSTING_READ(lvds_reg); | ||
107 | |||
103 | I915_WRITE(ctl_reg, I915_READ(ctl_reg) | | 108 | I915_WRITE(ctl_reg, I915_READ(ctl_reg) | |
104 | POWER_TARGET_ON); | 109 | POWER_TARGET_ON); |
105 | do { | 110 | do { |
@@ -115,6 +120,9 @@ static void intel_lvds_set_power(struct drm_device *dev, bool on) | |||
115 | do { | 120 | do { |
116 | pp_status = I915_READ(status_reg); | 121 | pp_status = I915_READ(status_reg); |
117 | } while (pp_status & PP_ON); | 122 | } while (pp_status & PP_ON); |
123 | |||
124 | I915_WRITE(lvds_reg, I915_READ(lvds_reg) & ~LVDS_PORT_EN); | ||
125 | POSTING_READ(lvds_reg); | ||
118 | } | 126 | } |
119 | } | 127 | } |
120 | 128 | ||
@@ -137,7 +145,7 @@ static void intel_lvds_save(struct drm_connector *connector) | |||
137 | u32 pp_on_reg, pp_off_reg, pp_ctl_reg, pp_div_reg; | 145 | u32 pp_on_reg, pp_off_reg, pp_ctl_reg, pp_div_reg; |
138 | u32 pwm_ctl_reg; | 146 | u32 pwm_ctl_reg; |
139 | 147 | ||
140 | if (IS_IRONLAKE(dev)) { | 148 | if (HAS_PCH_SPLIT(dev)) { |
141 | pp_on_reg = PCH_PP_ON_DELAYS; | 149 | pp_on_reg = PCH_PP_ON_DELAYS; |
142 | pp_off_reg = PCH_PP_OFF_DELAYS; | 150 | pp_off_reg = PCH_PP_OFF_DELAYS; |
143 | pp_ctl_reg = PCH_PP_CONTROL; | 151 | pp_ctl_reg = PCH_PP_CONTROL; |
@@ -174,7 +182,7 @@ static void intel_lvds_restore(struct drm_connector *connector) | |||
174 | u32 pp_on_reg, pp_off_reg, pp_ctl_reg, pp_div_reg; | 182 | u32 pp_on_reg, pp_off_reg, pp_ctl_reg, pp_div_reg; |
175 | u32 pwm_ctl_reg; | 183 | u32 pwm_ctl_reg; |
176 | 184 | ||
177 | if (IS_IRONLAKE(dev)) { | 185 | if (HAS_PCH_SPLIT(dev)) { |
178 | pp_on_reg = PCH_PP_ON_DELAYS; | 186 | pp_on_reg = PCH_PP_ON_DELAYS; |
179 | pp_off_reg = PCH_PP_OFF_DELAYS; | 187 | pp_off_reg = PCH_PP_OFF_DELAYS; |
180 | pp_ctl_reg = PCH_PP_CONTROL; | 188 | pp_ctl_reg = PCH_PP_CONTROL; |
@@ -297,7 +305,7 @@ static bool intel_lvds_mode_fixup(struct drm_encoder *encoder, | |||
297 | } | 305 | } |
298 | 306 | ||
299 | /* full screen scale for now */ | 307 | /* full screen scale for now */ |
300 | if (IS_IRONLAKE(dev)) | 308 | if (HAS_PCH_SPLIT(dev)) |
301 | goto out; | 309 | goto out; |
302 | 310 | ||
303 | /* 965+ wants fuzzy fitting */ | 311 | /* 965+ wants fuzzy fitting */ |
@@ -327,7 +335,7 @@ static bool intel_lvds_mode_fixup(struct drm_encoder *encoder, | |||
327 | * to register description and PRM. | 335 | * to register description and PRM. |
328 | * Change the value here to see the borders for debugging | 336 | * Change the value here to see the borders for debugging |
329 | */ | 337 | */ |
330 | if (!IS_IRONLAKE(dev)) { | 338 | if (!HAS_PCH_SPLIT(dev)) { |
331 | I915_WRITE(BCLRPAT_A, 0); | 339 | I915_WRITE(BCLRPAT_A, 0); |
332 | I915_WRITE(BCLRPAT_B, 0); | 340 | I915_WRITE(BCLRPAT_B, 0); |
333 | } | 341 | } |
@@ -548,7 +556,7 @@ static void intel_lvds_prepare(struct drm_encoder *encoder) | |||
548 | struct drm_i915_private *dev_priv = dev->dev_private; | 556 | struct drm_i915_private *dev_priv = dev->dev_private; |
549 | u32 reg; | 557 | u32 reg; |
550 | 558 | ||
551 | if (IS_IRONLAKE(dev)) | 559 | if (HAS_PCH_SPLIT(dev)) |
552 | reg = BLC_PWM_CPU_CTL; | 560 | reg = BLC_PWM_CPU_CTL; |
553 | else | 561 | else |
554 | reg = BLC_PWM_CTL; | 562 | reg = BLC_PWM_CTL; |
@@ -587,7 +595,7 @@ static void intel_lvds_mode_set(struct drm_encoder *encoder, | |||
587 | * settings. | 595 | * settings. |
588 | */ | 596 | */ |
589 | 597 | ||
590 | if (IS_IRONLAKE(dev)) | 598 | if (HAS_PCH_SPLIT(dev)) |
591 | return; | 599 | return; |
592 | 600 | ||
593 | /* | 601 | /* |
@@ -655,8 +663,15 @@ static const struct dmi_system_id bad_lid_status[] = { | |||
655 | */ | 663 | */ |
656 | static enum drm_connector_status intel_lvds_detect(struct drm_connector *connector) | 664 | static enum drm_connector_status intel_lvds_detect(struct drm_connector *connector) |
657 | { | 665 | { |
666 | struct drm_device *dev = connector->dev; | ||
658 | enum drm_connector_status status = connector_status_connected; | 667 | enum drm_connector_status status = connector_status_connected; |
659 | 668 | ||
669 | /* ACPI lid methods were generally unreliable in this generation, so | ||
670 | * don't even bother. | ||
671 | */ | ||
672 | if (IS_GEN2(dev)) | ||
673 | return connector_status_connected; | ||
674 | |||
660 | if (!dmi_check_system(bad_lid_status) && !acpi_lid_open()) | 675 | if (!dmi_check_system(bad_lid_status) && !acpi_lid_open()) |
661 | status = connector_status_disconnected; | 676 | status = connector_status_disconnected; |
662 | 677 | ||
@@ -1020,7 +1035,7 @@ void intel_lvds_init(struct drm_device *dev) | |||
1020 | return; | 1035 | return; |
1021 | } | 1036 | } |
1022 | 1037 | ||
1023 | if (IS_IRONLAKE(dev)) { | 1038 | if (HAS_PCH_SPLIT(dev)) { |
1024 | if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0) | 1039 | if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0) |
1025 | return; | 1040 | return; |
1026 | if (dev_priv->edp_support) { | 1041 | if (dev_priv->edp_support) { |
@@ -1123,7 +1138,7 @@ void intel_lvds_init(struct drm_device *dev) | |||
1123 | */ | 1138 | */ |
1124 | 1139 | ||
1125 | /* Ironlake: FIXME if still fail, not try pipe mode now */ | 1140 | /* Ironlake: FIXME if still fail, not try pipe mode now */ |
1126 | if (IS_IRONLAKE(dev)) | 1141 | if (HAS_PCH_SPLIT(dev)) |
1127 | goto failed; | 1142 | goto failed; |
1128 | 1143 | ||
1129 | lvds = I915_READ(LVDS); | 1144 | lvds = I915_READ(LVDS); |
@@ -1144,7 +1159,7 @@ void intel_lvds_init(struct drm_device *dev) | |||
1144 | goto failed; | 1159 | goto failed; |
1145 | 1160 | ||
1146 | out: | 1161 | out: |
1147 | if (IS_IRONLAKE(dev)) { | 1162 | if (HAS_PCH_SPLIT(dev)) { |
1148 | u32 pwm; | 1163 | u32 pwm; |
1149 | /* make sure PWM is enabled */ | 1164 | /* make sure PWM is enabled */ |
1150 | pwm = I915_READ(BLC_PWM_CPU_CTL2); | 1165 | pwm = I915_READ(BLC_PWM_CPU_CTL2); |