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path: root/drivers/gpu/drm/i915/intel_i2c.c
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Diffstat (limited to 'drivers/gpu/drm/i915/intel_i2c.c')
-rw-r--r--drivers/gpu/drm/i915/intel_i2c.c21
1 files changed, 20 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c
index c7eab724c418..8673c735b8ab 100644
--- a/drivers/gpu/drm/i915/intel_i2c.c
+++ b/drivers/gpu/drm/i915/intel_i2c.c
@@ -39,7 +39,7 @@ void intel_i2c_quirk_set(struct drm_device *dev, bool enable)
39 struct drm_i915_private *dev_priv = dev->dev_private; 39 struct drm_i915_private *dev_priv = dev->dev_private;
40 40
41 /* When using bit bashing for I2C, this bit needs to be set to 1 */ 41 /* When using bit bashing for I2C, this bit needs to be set to 1 */
42 if (!IS_IGD(dev)) 42 if (!IS_PINEVIEW(dev))
43 return; 43 return;
44 if (enable) 44 if (enable)
45 I915_WRITE(DSPCLK_GATE_D, 45 I915_WRITE(DSPCLK_GATE_D,
@@ -118,6 +118,23 @@ static void set_data(void *data, int state_high)
118 udelay(I2C_RISEFALL_TIME); /* wait for the line to change state */ 118 udelay(I2C_RISEFALL_TIME); /* wait for the line to change state */
119} 119}
120 120
121/* Clears the GMBUS setup. Our driver doesn't make use of the GMBUS I2C
122 * engine, but if the BIOS leaves it enabled, then that can break our use
123 * of the bit-banging I2C interfaces. This is notably the case with the
124 * Mac Mini in EFI mode.
125 */
126void
127intel_i2c_reset_gmbus(struct drm_device *dev)
128{
129 struct drm_i915_private *dev_priv = dev->dev_private;
130
131 if (IS_IRONLAKE(dev)) {
132 I915_WRITE(PCH_GMBUS0, 0);
133 } else {
134 I915_WRITE(GMBUS0, 0);
135 }
136}
137
121/** 138/**
122 * intel_i2c_create - instantiate an Intel i2c bus using the specified GPIO reg 139 * intel_i2c_create - instantiate an Intel i2c bus using the specified GPIO reg
123 * @dev: DRM device 140 * @dev: DRM device
@@ -168,6 +185,8 @@ struct i2c_adapter *intel_i2c_create(struct drm_device *dev, const u32 reg,
168 if(i2c_bit_add_bus(&chan->adapter)) 185 if(i2c_bit_add_bus(&chan->adapter))
169 goto out_free; 186 goto out_free;
170 187
188 intel_i2c_reset_gmbus(dev);
189
171 /* JJJ: raise SCL and SDA? */ 190 /* JJJ: raise SCL and SDA? */
172 intel_i2c_quirk_set(dev, true); 191 intel_i2c_quirk_set(dev, true);
173 set_data(chan, 1); 192 set_data(chan, 1);