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path: root/drivers/gpu/drm/i915/intel_i2c.c
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Diffstat (limited to 'drivers/gpu/drm/i915/intel_i2c.c')
-rw-r--r--drivers/gpu/drm/i915/intel_i2c.c22
1 files changed, 3 insertions, 19 deletions
diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c
index 2ca17b14b6c1..d33b61d0dd33 100644
--- a/drivers/gpu/drm/i915/intel_i2c.c
+++ b/drivers/gpu/drm/i915/intel_i2c.c
@@ -82,20 +82,11 @@ static int get_disp_clk_div(struct drm_i915_private *dev_priv,
82 82
83static void gmbus_set_freq(struct drm_i915_private *dev_priv) 83static void gmbus_set_freq(struct drm_i915_private *dev_priv)
84{ 84{
85 int vco_freq[] = { 800, 1600, 2000, 2400 }; 85 int vco, gmbus_freq = 0, cdclk_div;
86 int gmbus_freq = 0, cdclk_div, hpll_freq;
87 86
88 BUG_ON(!IS_VALLEYVIEW(dev_priv->dev)); 87 BUG_ON(!IS_VALLEYVIEW(dev_priv->dev));
89 88
90 /* Skip setting the gmbus freq if BIOS has already programmed it */ 89 vco = valleyview_get_vco(dev_priv);
91 if (I915_READ(GMBUSFREQ_VLV) != 0xA0)
92 return;
93
94 /* Obtain SKU information */
95 mutex_lock(&dev_priv->dpio_lock);
96 hpll_freq =
97 vlv_cck_read(dev_priv, CCK_FUSE_REG) & CCK_FUSE_HPLL_FREQ_MASK;
98 mutex_unlock(&dev_priv->dpio_lock);
99 90
100 /* Get the CDCLK divide ratio */ 91 /* Get the CDCLK divide ratio */
101 cdclk_div = get_disp_clk_div(dev_priv, CDCLK); 92 cdclk_div = get_disp_clk_div(dev_priv, CDCLK);
@@ -106,7 +97,7 @@ static void gmbus_set_freq(struct drm_i915_private *dev_priv)
106 * in fact 1MHz is the correct frequency. 97 * in fact 1MHz is the correct frequency.
107 */ 98 */
108 if (cdclk_div) 99 if (cdclk_div)
109 gmbus_freq = (vco_freq[hpll_freq] << 1) / cdclk_div; 100 gmbus_freq = (vco << 1) / cdclk_div;
110 101
111 if (WARN_ON(gmbus_freq == 0)) 102 if (WARN_ON(gmbus_freq == 0))
112 return; 103 return;
@@ -267,13 +258,6 @@ intel_gpio_setup(struct intel_gmbus *bus, u32 pin)
267 algo->data = bus; 258 algo->data = bus;
268} 259}
269 260
270/*
271 * gmbus on gen4 seems to be able to generate legacy interrupts even when in MSI
272 * mode. This results in spurious interrupt warnings if the legacy irq no. is
273 * shared with another device. The kernel then disables that interrupt source
274 * and so prevents the other device from working properly.
275 */
276#define HAS_GMBUS_IRQ(dev) (INTEL_INFO(dev)->gen >= 5)
277static int 261static int
278gmbus_wait_hw_status(struct drm_i915_private *dev_priv, 262gmbus_wait_hw_status(struct drm_i915_private *dev_priv,
279 u32 gmbus2_status, 263 u32 gmbus2_status,