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path: root/drivers/gpu/drm/i915/intel_i2c.c
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Diffstat (limited to 'drivers/gpu/drm/i915/intel_i2c.c')
-rw-r--r--drivers/gpu/drm/i915/intel_i2c.c13
1 files changed, 9 insertions, 4 deletions
diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c
index 068617f7256a..4e4ddd5d1f51 100644
--- a/drivers/gpu/drm/i915/intel_i2c.c
+++ b/drivers/gpu/drm/i915/intel_i2c.c
@@ -253,7 +253,8 @@ gmbus_xfer(struct i2c_adapter *adapter,
253 253
254 if (msgs[i].flags & I2C_M_RD) { 254 if (msgs[i].flags & I2C_M_RD) {
255 I915_WRITE(GMBUS1 + reg_offset, 255 I915_WRITE(GMBUS1 + reg_offset,
256 GMBUS_CYCLE_WAIT | (i + 1 == num ? GMBUS_CYCLE_STOP : 0) | 256 GMBUS_CYCLE_WAIT |
257 (i + 1 == num ? GMBUS_CYCLE_STOP : 0) |
257 (len << GMBUS_BYTE_COUNT_SHIFT) | 258 (len << GMBUS_BYTE_COUNT_SHIFT) |
258 (msgs[i].addr << GMBUS_SLAVE_ADDR_SHIFT) | 259 (msgs[i].addr << GMBUS_SLAVE_ADDR_SHIFT) |
259 GMBUS_SLAVE_READ | GMBUS_SW_RDY); 260 GMBUS_SLAVE_READ | GMBUS_SW_RDY);
@@ -282,7 +283,8 @@ gmbus_xfer(struct i2c_adapter *adapter,
282 283
283 I915_WRITE(GMBUS3 + reg_offset, val); 284 I915_WRITE(GMBUS3 + reg_offset, val);
284 I915_WRITE(GMBUS1 + reg_offset, 285 I915_WRITE(GMBUS1 + reg_offset,
285 (i + 1 == num ? GMBUS_CYCLE_STOP : GMBUS_CYCLE_WAIT) | 286 GMBUS_CYCLE_WAIT |
287 (i + 1 == num ? GMBUS_CYCLE_STOP : 0) |
286 (msgs[i].len << GMBUS_BYTE_COUNT_SHIFT) | 288 (msgs[i].len << GMBUS_BYTE_COUNT_SHIFT) |
287 (msgs[i].addr << GMBUS_SLAVE_ADDR_SHIFT) | 289 (msgs[i].addr << GMBUS_SLAVE_ADDR_SHIFT) |
288 GMBUS_SLAVE_WRITE | GMBUS_SW_RDY); 290 GMBUS_SLAVE_WRITE | GMBUS_SW_RDY);
@@ -321,9 +323,12 @@ clear_err:
321 I915_WRITE(GMBUS1 + reg_offset, 0); 323 I915_WRITE(GMBUS1 + reg_offset, 0);
322 324
323done: 325done:
324 /* Mark the GMBUS interface as disabled. We will re-enable it at the 326 /* Mark the GMBUS interface as disabled after waiting for idle.
325 * start of the next xfer, till then let it sleep. 327 * We will re-enable it at the start of the next xfer,
328 * till then let it sleep.
326 */ 329 */
330 if (wait_for((I915_READ(GMBUS2 + reg_offset) & GMBUS_ACTIVE) == 0, 10))
331 DRM_INFO("GMBUS timed out waiting for idle\n");
327 I915_WRITE(GMBUS0 + reg_offset, 0); 332 I915_WRITE(GMBUS0 + reg_offset, 0);
328 ret = i; 333 ret = i;
329 goto out; 334 goto out;