1 files changed, 15 insertions, 0 deletions

diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
index f9fb47cd1779..08f2b63d740a 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -151,6 +151,9 @@ static void g4x_write_infoframe(struct drm_encoder *encoder,
                 I915_WRITE(VIDEO_DIP_DATA, *data);
                 data++;
         }
+        /* Write every possible data byte to force correct ECC calculation. */
+        for (; i < VIDEO_DIP_DATA_SIZE; i += 4)
+                I915_WRITE(VIDEO_DIP_DATA, 0);
         mmiowb();
 
         val |= g4x_infoframe_enable(frame);
@@ -186,6 +189,9 @@ static void ibx_write_infoframe(struct drm_encoder *encoder,
                 I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), *data);
                 data++;
         }
+        /* Write every possible data byte to force correct ECC calculation. */
+        for (; i < VIDEO_DIP_DATA_SIZE; i += 4)
+                I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), 0);
         mmiowb();
 
         val |= g4x_infoframe_enable(frame);
@@ -224,6 +230,9 @@ static void cpt_write_infoframe(struct drm_encoder *encoder,
                 I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), *data);
                 data++;
         }
+        /* Write every possible data byte to force correct ECC calculation. */
+        for (; i < VIDEO_DIP_DATA_SIZE; i += 4)
+                I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), 0);
         mmiowb();
 
         val |= g4x_infoframe_enable(frame);
@@ -259,6 +268,9 @@ static void vlv_write_infoframe(struct drm_encoder *encoder,
                 I915_WRITE(VLV_TVIDEO_DIP_DATA(intel_crtc->pipe), *data);
                 data++;
         }
+        /* Write every possible data byte to force correct ECC calculation. */
+        for (; i < VIDEO_DIP_DATA_SIZE; i += 4)
+                I915_WRITE(VLV_TVIDEO_DIP_DATA(intel_crtc->pipe), 0);
         mmiowb();
 
         val |= g4x_infoframe_enable(frame);
@@ -292,6 +304,9 @@ static void hsw_write_infoframe(struct drm_encoder *encoder,
                 I915_WRITE(data_reg + i, *data);
                 data++;
         }
+        /* Write every possible data byte to force correct ECC calculation. */
+        for (; i < VIDEO_DIP_DATA_SIZE; i += 4)
+                I915_WRITE(data_reg + i, 0);
         mmiowb();
 
         val |= hsw_infoframe_enable(frame);