1 files changed, 38 insertions, 41 deletions

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 9caccd03dccb..9ab8708ac6ba 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -239,7 +239,6 @@ intel_dp_aux_ch(struct intel_dp *intel_dp,
         uint32_t ch_data = ch_ctl + 4;
         int i;
         int recv_bytes;
-        uint32_t ctl;
         uint32_t status;
         uint32_t aux_clock_divider;
         int try, precharge;
@@ -263,41 +262,43 @@ intel_dp_aux_ch(struct intel_dp *intel_dp,
         else
                 precharge = 5;
 
+        if (I915_READ(ch_ctl) & DP_AUX_CH_CTL_SEND_BUSY) {
+                DRM_ERROR("dp_aux_ch not started status 0x%08x\n",
+                          I915_READ(ch_ctl));
+                return -EBUSY;
+        }
+
         /* Must try at least 3 times according to DP spec */
         for (try = 0; try < 5; try++) {
                 /* Load the send data into the aux channel data registers */
-                for (i = 0; i < send_bytes; i += 4) {
-                        uint32_t    d = pack_aux(send + i, send_bytes - i);
-        
-                        I915_WRITE(ch_data + i, d);
-                }
-        
-                ctl = (DP_AUX_CH_CTL_SEND_BUSY |
-                       DP_AUX_CH_CTL_TIME_OUT_400us |
-                       (send_bytes << DP_AUX_CH_CTL_MESSAGE_SIZE_SHIFT) |
-                       (precharge << DP_AUX_CH_CTL_PRECHARGE_2US_SHIFT) |
-                       (aux_clock_divider << DP_AUX_CH_CTL_BIT_CLOCK_2X_SHIFT) |
-                       DP_AUX_CH_CTL_DONE |
-                       DP_AUX_CH_CTL_TIME_OUT_ERROR |
-                       DP_AUX_CH_CTL_RECEIVE_ERROR);
+                for (i = 0; i < send_bytes; i += 4)
+                        I915_WRITE(ch_data + i,
+                                   pack_aux(send + i, send_bytes - i));
         
                 /* Send the command and wait for it to complete */
-                I915_WRITE(ch_ctl, ctl);
-                (void) I915_READ(ch_ctl);
+                I915_WRITE(ch_ctl,
+                           DP_AUX_CH_CTL_SEND_BUSY |
+                           DP_AUX_CH_CTL_TIME_OUT_400us |
+                           (send_bytes << DP_AUX_CH_CTL_MESSAGE_SIZE_SHIFT) |
+                           (precharge << DP_AUX_CH_CTL_PRECHARGE_2US_SHIFT) |
+                           (aux_clock_divider << DP_AUX_CH_CTL_BIT_CLOCK_2X_SHIFT) |
+                           DP_AUX_CH_CTL_DONE |
+                           DP_AUX_CH_CTL_TIME_OUT_ERROR |
+                           DP_AUX_CH_CTL_RECEIVE_ERROR);
                 for (;;) {
-                        udelay(100);
                         status = I915_READ(ch_ctl);
                         if ((status & DP_AUX_CH_CTL_SEND_BUSY) == 0)
                                 break;
+                        udelay(100);
                 }
         
                 /* Clear done status and any errors */
-                I915_WRITE(ch_ctl, (status |
-                                DP_AUX_CH_CTL_DONE |
-                                DP_AUX_CH_CTL_TIME_OUT_ERROR |
-                                DP_AUX_CH_CTL_RECEIVE_ERROR));
-                (void) I915_READ(ch_ctl);
-                if ((status & DP_AUX_CH_CTL_TIME_OUT_ERROR) == 0)
+                I915_WRITE(ch_ctl,
+                           status |
+                           DP_AUX_CH_CTL_DONE |
+                           DP_AUX_CH_CTL_TIME_OUT_ERROR |
+                           DP_AUX_CH_CTL_RECEIVE_ERROR);
+                if (status & DP_AUX_CH_CTL_DONE)
                         break;
         }
 
@@ -324,15 +325,12 @@ intel_dp_aux_ch(struct intel_dp *intel_dp,
         /* Unload any bytes sent back from the other side */
         recv_bytes = ((status & DP_AUX_CH_CTL_MESSAGE_SIZE_MASK) >>
                       DP_AUX_CH_CTL_MESSAGE_SIZE_SHIFT);
-
         if (recv_bytes > recv_size)
                 recv_bytes = recv_size;
         
-        for (i = 0; i < recv_bytes; i += 4) {
-                uint32_t    d = I915_READ(ch_data + i);
-
-                unpack_aux(d, recv + i, recv_bytes - i);
-        }
+        for (i = 0; i < recv_bytes; i += 4)
+                unpack_aux(I915_READ(ch_data + i),
+                           recv + i, recv_bytes - i);
 
         return recv_bytes;
 }
@@ -1140,18 +1138,14 @@ static bool
 intel_dp_set_link_train(struct intel_dp *intel_dp,
                         uint32_t dp_reg_value,
                         uint8_t dp_train_pat,
-                        uint8_t train_set[4],
-                        bool first)
+                        uint8_t train_set[4])
 {
         struct drm_device *dev = intel_dp->base.enc.dev;
         struct drm_i915_private *dev_priv = dev->dev_private;
-        struct intel_crtc *intel_crtc = to_intel_crtc(intel_dp->base.enc.crtc);
         int ret;
 
         I915_WRITE(intel_dp->output_reg, dp_reg_value);
         POSTING_READ(intel_dp->output_reg);
-        if (first)
-                intel_wait_for_vblank(dev, intel_crtc->pipe);
 
         intel_dp_aux_native_write_1(intel_dp,
                                     DP_TRAINING_PATTERN_SET,
@@ -1176,10 +1170,15 @@ intel_dp_link_train(struct intel_dp *intel_dp)
         uint8_t voltage;
         bool clock_recovery = false;
         bool channel_eq = false;
-        bool first = true;
         int tries;
         u32 reg;
         uint32_t DP = intel_dp->DP;
+        struct intel_crtc *intel_crtc = to_intel_crtc(intel_dp->base.enc.crtc);
+
+        /* Enable output, wait for it to become active */
+        I915_WRITE(intel_dp->output_reg, intel_dp->DP);
+        POSTING_READ(intel_dp->output_reg);
+        intel_wait_for_vblank(dev, intel_crtc->pipe);
 
         /* Write the link configuration data */
         intel_dp_aux_native_write(intel_dp, DP_LINK_BW_SET,
@@ -1212,9 +1211,8 @@ intel_dp_link_train(struct intel_dp *intel_dp)
                         reg = DP | DP_LINK_TRAIN_PAT_1;
 
                 if (!intel_dp_set_link_train(intel_dp, reg,
-                                             DP_TRAINING_PATTERN_1, train_set, first))
+                                             DP_TRAINING_PATTERN_1, train_set))
                         break;
-                first = false;
                 /* Set training pattern 1 */
 
                 udelay(100);
@@ -1268,8 +1266,7 @@ intel_dp_link_train(struct intel_dp *intel_dp)
 
                 /* channel eq pattern */
                 if (!intel_dp_set_link_train(intel_dp, reg,
-                                             DP_TRAINING_PATTERN_2, train_set,
-                                             false))
+                                             DP_TRAINING_PATTERN_2, train_set))
                         break;
 
                 udelay(400);
@@ -1388,7 +1385,7 @@ ironlake_dp_detect(struct drm_connector *connector)
  * \return false if DP port is disconnected.
  */
 static enum drm_connector_status
-intel_dp_detect(struct drm_connector *connector)
+intel_dp_detect(struct drm_connector *connector, bool force)
 {
         struct drm_encoder *encoder = intel_attached_encoder(connector);
         struct intel_dp *intel_dp = enc_to_intel_dp(encoder);