diff options
Diffstat (limited to 'drivers/gpu/drm/i915/intel_dp.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_dp.c | 17 |
1 files changed, 9 insertions, 8 deletions
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index e2aced6eec4c..f797fb58ba9c 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c | |||
@@ -178,12 +178,14 @@ intel_dp_link_clock(uint8_t link_bw) | |||
178 | static int | 178 | static int |
179 | intel_dp_link_required(struct drm_device *dev, struct intel_dp *intel_dp, int pixel_clock) | 179 | intel_dp_link_required(struct drm_device *dev, struct intel_dp *intel_dp, int pixel_clock) |
180 | { | 180 | { |
181 | struct drm_i915_private *dev_priv = dev->dev_private; | 181 | struct drm_crtc *crtc = intel_dp->base.base.crtc; |
182 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); | ||
183 | int bpp = 24; | ||
182 | 184 | ||
183 | if (is_edp(intel_dp)) | 185 | if (intel_crtc) |
184 | return (pixel_clock * dev_priv->edp.bpp + 7) / 8; | 186 | bpp = intel_crtc->bpp; |
185 | else | 187 | |
186 | return pixel_clock * 3; | 188 | return (pixel_clock * bpp + 7) / 8; |
187 | } | 189 | } |
188 | 190 | ||
189 | static int | 191 | static int |
@@ -681,7 +683,7 @@ intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode, | |||
681 | struct drm_encoder *encoder; | 683 | struct drm_encoder *encoder; |
682 | struct drm_i915_private *dev_priv = dev->dev_private; | 684 | struct drm_i915_private *dev_priv = dev->dev_private; |
683 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); | 685 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); |
684 | int lane_count = 4, bpp = 24; | 686 | int lane_count = 4; |
685 | struct intel_dp_m_n m_n; | 687 | struct intel_dp_m_n m_n; |
686 | int pipe = intel_crtc->pipe; | 688 | int pipe = intel_crtc->pipe; |
687 | 689 | ||
@@ -700,7 +702,6 @@ intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode, | |||
700 | break; | 702 | break; |
701 | } else if (is_edp(intel_dp)) { | 703 | } else if (is_edp(intel_dp)) { |
702 | lane_count = dev_priv->edp.lanes; | 704 | lane_count = dev_priv->edp.lanes; |
703 | bpp = dev_priv->edp.bpp; | ||
704 | break; | 705 | break; |
705 | } | 706 | } |
706 | } | 707 | } |
@@ -710,7 +711,7 @@ intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode, | |||
710 | * the number of bytes_per_pixel post-LUT, which we always | 711 | * the number of bytes_per_pixel post-LUT, which we always |
711 | * set up for 8-bits of R/G/B, or 3 bytes total. | 712 | * set up for 8-bits of R/G/B, or 3 bytes total. |
712 | */ | 713 | */ |
713 | intel_dp_compute_m_n(bpp, lane_count, | 714 | intel_dp_compute_m_n(intel_crtc->bpp, lane_count, |
714 | mode->clock, adjusted_mode->clock, &m_n); | 715 | mode->clock, adjusted_mode->clock, &m_n); |
715 | 716 | ||
716 | if (HAS_PCH_SPLIT(dev)) { | 717 | if (HAS_PCH_SPLIT(dev)) { |