diff options
Diffstat (limited to 'drivers/gpu/drm/i915/intel_dp.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_dp.c | 162 |
1 files changed, 137 insertions, 25 deletions
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index d83447557f9b..4e7aa8b7b938 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c | |||
@@ -33,7 +33,8 @@ | |||
33 | #include "intel_drv.h" | 33 | #include "intel_drv.h" |
34 | #include "i915_drm.h" | 34 | #include "i915_drm.h" |
35 | #include "i915_drv.h" | 35 | #include "i915_drv.h" |
36 | #include "intel_dp.h" | 36 | #include "drm_dp_helper.h" |
37 | |||
37 | 38 | ||
38 | #define DP_LINK_STATUS_SIZE 6 | 39 | #define DP_LINK_STATUS_SIZE 6 |
39 | #define DP_LINK_CHECK_TIMEOUT (10 * 1000) | 40 | #define DP_LINK_CHECK_TIMEOUT (10 * 1000) |
@@ -223,8 +224,8 @@ intel_dp_aux_ch(struct intel_output *intel_output, | |||
223 | */ | 224 | */ |
224 | if (IS_eDP(intel_output)) | 225 | if (IS_eDP(intel_output)) |
225 | aux_clock_divider = 225; /* eDP input clock at 450Mhz */ | 226 | aux_clock_divider = 225; /* eDP input clock at 450Mhz */ |
226 | else if (IS_IGDNG(dev)) | 227 | else if (IS_IRONLAKE(dev)) |
227 | aux_clock_divider = 62; /* IGDNG: input clock fixed at 125Mhz */ | 228 | aux_clock_divider = 62; /* IRL input clock fixed at 125Mhz */ |
228 | else | 229 | else |
229 | aux_clock_divider = intel_hrawclk(dev) / 2; | 230 | aux_clock_divider = intel_hrawclk(dev) / 2; |
230 | 231 | ||
@@ -282,7 +283,7 @@ intel_dp_aux_ch(struct intel_output *intel_output, | |||
282 | /* Timeouts occur when the device isn't connected, so they're | 283 | /* Timeouts occur when the device isn't connected, so they're |
283 | * "normal" -- don't fill the kernel log with these */ | 284 | * "normal" -- don't fill the kernel log with these */ |
284 | if (status & DP_AUX_CH_CTL_TIME_OUT_ERROR) { | 285 | if (status & DP_AUX_CH_CTL_TIME_OUT_ERROR) { |
285 | DRM_DEBUG("dp_aux_ch timeout status 0x%08x\n", status); | 286 | DRM_DEBUG_KMS("dp_aux_ch timeout status 0x%08x\n", status); |
286 | return -ETIMEDOUT; | 287 | return -ETIMEDOUT; |
287 | } | 288 | } |
288 | 289 | ||
@@ -382,17 +383,77 @@ intel_dp_aux_native_read(struct intel_output *intel_output, | |||
382 | } | 383 | } |
383 | 384 | ||
384 | static int | 385 | static int |
385 | intel_dp_i2c_aux_ch(struct i2c_adapter *adapter, | 386 | intel_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode, |
386 | uint8_t *send, int send_bytes, | 387 | uint8_t write_byte, uint8_t *read_byte) |
387 | uint8_t *recv, int recv_bytes) | ||
388 | { | 388 | { |
389 | struct i2c_algo_dp_aux_data *algo_data = adapter->algo_data; | ||
389 | struct intel_dp_priv *dp_priv = container_of(adapter, | 390 | struct intel_dp_priv *dp_priv = container_of(adapter, |
390 | struct intel_dp_priv, | 391 | struct intel_dp_priv, |
391 | adapter); | 392 | adapter); |
392 | struct intel_output *intel_output = dp_priv->intel_output; | 393 | struct intel_output *intel_output = dp_priv->intel_output; |
394 | uint16_t address = algo_data->address; | ||
395 | uint8_t msg[5]; | ||
396 | uint8_t reply[2]; | ||
397 | int msg_bytes; | ||
398 | int reply_bytes; | ||
399 | int ret; | ||
400 | |||
401 | /* Set up the command byte */ | ||
402 | if (mode & MODE_I2C_READ) | ||
403 | msg[0] = AUX_I2C_READ << 4; | ||
404 | else | ||
405 | msg[0] = AUX_I2C_WRITE << 4; | ||
406 | |||
407 | if (!(mode & MODE_I2C_STOP)) | ||
408 | msg[0] |= AUX_I2C_MOT << 4; | ||
393 | 409 | ||
394 | return intel_dp_aux_ch(intel_output, | 410 | msg[1] = address >> 8; |
395 | send, send_bytes, recv, recv_bytes); | 411 | msg[2] = address; |
412 | |||
413 | switch (mode) { | ||
414 | case MODE_I2C_WRITE: | ||
415 | msg[3] = 0; | ||
416 | msg[4] = write_byte; | ||
417 | msg_bytes = 5; | ||
418 | reply_bytes = 1; | ||
419 | break; | ||
420 | case MODE_I2C_READ: | ||
421 | msg[3] = 0; | ||
422 | msg_bytes = 4; | ||
423 | reply_bytes = 2; | ||
424 | break; | ||
425 | default: | ||
426 | msg_bytes = 3; | ||
427 | reply_bytes = 1; | ||
428 | break; | ||
429 | } | ||
430 | |||
431 | for (;;) { | ||
432 | ret = intel_dp_aux_ch(intel_output, | ||
433 | msg, msg_bytes, | ||
434 | reply, reply_bytes); | ||
435 | if (ret < 0) { | ||
436 | DRM_DEBUG_KMS("aux_ch failed %d\n", ret); | ||
437 | return ret; | ||
438 | } | ||
439 | switch (reply[0] & AUX_I2C_REPLY_MASK) { | ||
440 | case AUX_I2C_REPLY_ACK: | ||
441 | if (mode == MODE_I2C_READ) { | ||
442 | *read_byte = reply[1]; | ||
443 | } | ||
444 | return reply_bytes - 1; | ||
445 | case AUX_I2C_REPLY_NACK: | ||
446 | DRM_DEBUG_KMS("aux_ch nack\n"); | ||
447 | return -EREMOTEIO; | ||
448 | case AUX_I2C_REPLY_DEFER: | ||
449 | DRM_DEBUG_KMS("aux_ch defer\n"); | ||
450 | udelay(100); | ||
451 | break; | ||
452 | default: | ||
453 | DRM_ERROR("aux_ch invalid reply 0x%02x\n", reply[0]); | ||
454 | return -EREMOTEIO; | ||
455 | } | ||
456 | } | ||
396 | } | 457 | } |
397 | 458 | ||
398 | static int | 459 | static int |
@@ -435,7 +496,8 @@ intel_dp_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode, | |||
435 | dp_priv->link_bw = bws[clock]; | 496 | dp_priv->link_bw = bws[clock]; |
436 | dp_priv->lane_count = lane_count; | 497 | dp_priv->lane_count = lane_count; |
437 | adjusted_mode->clock = intel_dp_link_clock(dp_priv->link_bw); | 498 | adjusted_mode->clock = intel_dp_link_clock(dp_priv->link_bw); |
438 | DRM_DEBUG("Display port link bw %02x lane count %d clock %d\n", | 499 | DRM_DEBUG_KMS("Display port link bw %02x lane " |
500 | "count %d clock %d\n", | ||
439 | dp_priv->link_bw, dp_priv->lane_count, | 501 | dp_priv->link_bw, dp_priv->lane_count, |
440 | adjusted_mode->clock); | 502 | adjusted_mode->clock); |
441 | return true; | 503 | return true; |
@@ -514,7 +576,7 @@ intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode, | |||
514 | intel_dp_compute_m_n(3, lane_count, | 576 | intel_dp_compute_m_n(3, lane_count, |
515 | mode->clock, adjusted_mode->clock, &m_n); | 577 | mode->clock, adjusted_mode->clock, &m_n); |
516 | 578 | ||
517 | if (IS_IGDNG(dev)) { | 579 | if (IS_IRONLAKE(dev)) { |
518 | if (intel_crtc->pipe == 0) { | 580 | if (intel_crtc->pipe == 0) { |
519 | I915_WRITE(TRANSA_DATA_M1, | 581 | I915_WRITE(TRANSA_DATA_M1, |
520 | ((m_n.tu - 1) << PIPE_GMCH_DATA_M_TU_SIZE_SHIFT) | | 582 | ((m_n.tu - 1) << PIPE_GMCH_DATA_M_TU_SIZE_SHIFT) | |
@@ -606,23 +668,23 @@ intel_dp_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode, | |||
606 | } | 668 | } |
607 | } | 669 | } |
608 | 670 | ||
609 | static void igdng_edp_backlight_on (struct drm_device *dev) | 671 | static void ironlake_edp_backlight_on (struct drm_device *dev) |
610 | { | 672 | { |
611 | struct drm_i915_private *dev_priv = dev->dev_private; | 673 | struct drm_i915_private *dev_priv = dev->dev_private; |
612 | u32 pp; | 674 | u32 pp; |
613 | 675 | ||
614 | DRM_DEBUG("\n"); | 676 | DRM_DEBUG_KMS("\n"); |
615 | pp = I915_READ(PCH_PP_CONTROL); | 677 | pp = I915_READ(PCH_PP_CONTROL); |
616 | pp |= EDP_BLC_ENABLE; | 678 | pp |= EDP_BLC_ENABLE; |
617 | I915_WRITE(PCH_PP_CONTROL, pp); | 679 | I915_WRITE(PCH_PP_CONTROL, pp); |
618 | } | 680 | } |
619 | 681 | ||
620 | static void igdng_edp_backlight_off (struct drm_device *dev) | 682 | static void ironlake_edp_backlight_off (struct drm_device *dev) |
621 | { | 683 | { |
622 | struct drm_i915_private *dev_priv = dev->dev_private; | 684 | struct drm_i915_private *dev_priv = dev->dev_private; |
623 | u32 pp; | 685 | u32 pp; |
624 | 686 | ||
625 | DRM_DEBUG("\n"); | 687 | DRM_DEBUG_KMS("\n"); |
626 | pp = I915_READ(PCH_PP_CONTROL); | 688 | pp = I915_READ(PCH_PP_CONTROL); |
627 | pp &= ~EDP_BLC_ENABLE; | 689 | pp &= ~EDP_BLC_ENABLE; |
628 | I915_WRITE(PCH_PP_CONTROL, pp); | 690 | I915_WRITE(PCH_PP_CONTROL, pp); |
@@ -641,13 +703,13 @@ intel_dp_dpms(struct drm_encoder *encoder, int mode) | |||
641 | if (dp_reg & DP_PORT_EN) { | 703 | if (dp_reg & DP_PORT_EN) { |
642 | intel_dp_link_down(intel_output, dp_priv->DP); | 704 | intel_dp_link_down(intel_output, dp_priv->DP); |
643 | if (IS_eDP(intel_output)) | 705 | if (IS_eDP(intel_output)) |
644 | igdng_edp_backlight_off(dev); | 706 | ironlake_edp_backlight_off(dev); |
645 | } | 707 | } |
646 | } else { | 708 | } else { |
647 | if (!(dp_reg & DP_PORT_EN)) { | 709 | if (!(dp_reg & DP_PORT_EN)) { |
648 | intel_dp_link_train(intel_output, dp_priv->DP, dp_priv->link_configuration); | 710 | intel_dp_link_train(intel_output, dp_priv->DP, dp_priv->link_configuration); |
649 | if (IS_eDP(intel_output)) | 711 | if (IS_eDP(intel_output)) |
650 | igdng_edp_backlight_on(dev); | 712 | ironlake_edp_backlight_on(dev); |
651 | } | 713 | } |
652 | } | 714 | } |
653 | dp_priv->dpms_mode = mode; | 715 | dp_priv->dpms_mode = mode; |
@@ -1010,7 +1072,7 @@ intel_dp_link_down(struct intel_output *intel_output, uint32_t DP) | |||
1010 | struct drm_i915_private *dev_priv = dev->dev_private; | 1072 | struct drm_i915_private *dev_priv = dev->dev_private; |
1011 | struct intel_dp_priv *dp_priv = intel_output->dev_priv; | 1073 | struct intel_dp_priv *dp_priv = intel_output->dev_priv; |
1012 | 1074 | ||
1013 | DRM_DEBUG("\n"); | 1075 | DRM_DEBUG_KMS("\n"); |
1014 | 1076 | ||
1015 | if (IS_eDP(intel_output)) { | 1077 | if (IS_eDP(intel_output)) { |
1016 | DP &= ~DP_PLL_ENABLE; | 1078 | DP &= ~DP_PLL_ENABLE; |
@@ -1071,7 +1133,7 @@ intel_dp_check_link_status(struct intel_output *intel_output) | |||
1071 | } | 1133 | } |
1072 | 1134 | ||
1073 | static enum drm_connector_status | 1135 | static enum drm_connector_status |
1074 | igdng_dp_detect(struct drm_connector *connector) | 1136 | ironlake_dp_detect(struct drm_connector *connector) |
1075 | { | 1137 | { |
1076 | struct intel_output *intel_output = to_intel_output(connector); | 1138 | struct intel_output *intel_output = to_intel_output(connector); |
1077 | struct intel_dp_priv *dp_priv = intel_output->dev_priv; | 1139 | struct intel_dp_priv *dp_priv = intel_output->dev_priv; |
@@ -1106,8 +1168,8 @@ intel_dp_detect(struct drm_connector *connector) | |||
1106 | 1168 | ||
1107 | dp_priv->has_audio = false; | 1169 | dp_priv->has_audio = false; |
1108 | 1170 | ||
1109 | if (IS_IGDNG(dev)) | 1171 | if (IS_IRONLAKE(dev)) |
1110 | return igdng_dp_detect(connector); | 1172 | return ironlake_dp_detect(connector); |
1111 | 1173 | ||
1112 | temp = I915_READ(PORT_HOTPLUG_EN); | 1174 | temp = I915_READ(PORT_HOTPLUG_EN); |
1113 | 1175 | ||
@@ -1227,7 +1289,53 @@ intel_dp_hot_plug(struct intel_output *intel_output) | |||
1227 | if (dp_priv->dpms_mode == DRM_MODE_DPMS_ON) | 1289 | if (dp_priv->dpms_mode == DRM_MODE_DPMS_ON) |
1228 | intel_dp_check_link_status(intel_output); | 1290 | intel_dp_check_link_status(intel_output); |
1229 | } | 1291 | } |
1230 | 1292 | /* | |
1293 | * Enumerate the child dev array parsed from VBT to check whether | ||
1294 | * the given DP is present. | ||
1295 | * If it is present, return 1. | ||
1296 | * If it is not present, return false. | ||
1297 | * If no child dev is parsed from VBT, it is assumed that the given | ||
1298 | * DP is present. | ||
1299 | */ | ||
1300 | static int dp_is_present_in_vbt(struct drm_device *dev, int dp_reg) | ||
1301 | { | ||
1302 | struct drm_i915_private *dev_priv = dev->dev_private; | ||
1303 | struct child_device_config *p_child; | ||
1304 | int i, dp_port, ret; | ||
1305 | |||
1306 | if (!dev_priv->child_dev_num) | ||
1307 | return 1; | ||
1308 | |||
1309 | dp_port = 0; | ||
1310 | if (dp_reg == DP_B || dp_reg == PCH_DP_B) | ||
1311 | dp_port = PORT_IDPB; | ||
1312 | else if (dp_reg == DP_C || dp_reg == PCH_DP_C) | ||
1313 | dp_port = PORT_IDPC; | ||
1314 | else if (dp_reg == DP_D || dp_reg == PCH_DP_D) | ||
1315 | dp_port = PORT_IDPD; | ||
1316 | |||
1317 | ret = 0; | ||
1318 | for (i = 0; i < dev_priv->child_dev_num; i++) { | ||
1319 | p_child = dev_priv->child_dev + i; | ||
1320 | /* | ||
1321 | * If the device type is not DP, continue. | ||
1322 | */ | ||
1323 | if (p_child->device_type != DEVICE_TYPE_DP && | ||
1324 | p_child->device_type != DEVICE_TYPE_eDP) | ||
1325 | continue; | ||
1326 | /* Find the eDP port */ | ||
1327 | if (dp_reg == DP_A && p_child->device_type == DEVICE_TYPE_eDP) { | ||
1328 | ret = 1; | ||
1329 | break; | ||
1330 | } | ||
1331 | /* Find the DP port */ | ||
1332 | if (p_child->dvo_port == dp_port) { | ||
1333 | ret = 1; | ||
1334 | break; | ||
1335 | } | ||
1336 | } | ||
1337 | return ret; | ||
1338 | } | ||
1231 | void | 1339 | void |
1232 | intel_dp_init(struct drm_device *dev, int output_reg) | 1340 | intel_dp_init(struct drm_device *dev, int output_reg) |
1233 | { | 1341 | { |
@@ -1237,6 +1345,10 @@ intel_dp_init(struct drm_device *dev, int output_reg) | |||
1237 | struct intel_dp_priv *dp_priv; | 1345 | struct intel_dp_priv *dp_priv; |
1238 | const char *name = NULL; | 1346 | const char *name = NULL; |
1239 | 1347 | ||
1348 | if (!dp_is_present_in_vbt(dev, output_reg)) { | ||
1349 | DRM_DEBUG_KMS("DP is not present. Ignore it\n"); | ||
1350 | return; | ||
1351 | } | ||
1240 | intel_output = kcalloc(sizeof(struct intel_output) + | 1352 | intel_output = kcalloc(sizeof(struct intel_output) + |
1241 | sizeof(struct intel_dp_priv), 1, GFP_KERNEL); | 1353 | sizeof(struct intel_dp_priv), 1, GFP_KERNEL); |
1242 | if (!intel_output) | 1354 | if (!intel_output) |
@@ -1254,11 +1366,11 @@ intel_dp_init(struct drm_device *dev, int output_reg) | |||
1254 | else | 1366 | else |
1255 | intel_output->type = INTEL_OUTPUT_DISPLAYPORT; | 1367 | intel_output->type = INTEL_OUTPUT_DISPLAYPORT; |
1256 | 1368 | ||
1257 | if (output_reg == DP_B) | 1369 | if (output_reg == DP_B || output_reg == PCH_DP_B) |
1258 | intel_output->clone_mask = (1 << INTEL_DP_B_CLONE_BIT); | 1370 | intel_output->clone_mask = (1 << INTEL_DP_B_CLONE_BIT); |
1259 | else if (output_reg == DP_C) | 1371 | else if (output_reg == DP_C || output_reg == PCH_DP_C) |
1260 | intel_output->clone_mask = (1 << INTEL_DP_C_CLONE_BIT); | 1372 | intel_output->clone_mask = (1 << INTEL_DP_C_CLONE_BIT); |
1261 | else if (output_reg == DP_D) | 1373 | else if (output_reg == DP_D || output_reg == PCH_DP_D) |
1262 | intel_output->clone_mask = (1 << INTEL_DP_D_CLONE_BIT); | 1374 | intel_output->clone_mask = (1 << INTEL_DP_D_CLONE_BIT); |
1263 | 1375 | ||
1264 | if (IS_eDP(intel_output)) { | 1376 | if (IS_eDP(intel_output)) { |