diff options
Diffstat (limited to 'drivers/gpu/drm/i915/intel_display.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index c2c8e95ff14d..3387cf32f385 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c | |||
@@ -657,6 +657,7 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y, | |||
657 | int dspbase = (pipe == 0 ? DSPAADDR : DSPBADDR); | 657 | int dspbase = (pipe == 0 ? DSPAADDR : DSPBADDR); |
658 | int dspsurf = (pipe == 0 ? DSPASURF : DSPBSURF); | 658 | int dspsurf = (pipe == 0 ? DSPASURF : DSPBSURF); |
659 | int dspstride = (pipe == 0) ? DSPASTRIDE : DSPBSTRIDE; | 659 | int dspstride = (pipe == 0) ? DSPASTRIDE : DSPBSTRIDE; |
660 | int dsptileoff = (pipe == 0 ? DSPATILEOFF : DSPBTILEOFF); | ||
660 | int dspcntr_reg = (pipe == 0) ? DSPACNTR : DSPBCNTR; | 661 | int dspcntr_reg = (pipe == 0) ? DSPACNTR : DSPBCNTR; |
661 | u32 dspcntr, alignment; | 662 | u32 dspcntr, alignment; |
662 | int ret; | 663 | int ret; |
@@ -733,6 +734,13 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y, | |||
733 | mutex_unlock(&dev->struct_mutex); | 734 | mutex_unlock(&dev->struct_mutex); |
734 | return -EINVAL; | 735 | return -EINVAL; |
735 | } | 736 | } |
737 | if (IS_I965G(dev)) { | ||
738 | if (obj_priv->tiling_mode != I915_TILING_NONE) | ||
739 | dspcntr |= DISPPLANE_TILED; | ||
740 | else | ||
741 | dspcntr &= ~DISPPLANE_TILED; | ||
742 | } | ||
743 | |||
736 | I915_WRITE(dspcntr_reg, dspcntr); | 744 | I915_WRITE(dspcntr_reg, dspcntr); |
737 | 745 | ||
738 | Start = obj_priv->gtt_offset; | 746 | Start = obj_priv->gtt_offset; |
@@ -745,6 +753,7 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y, | |||
745 | I915_READ(dspbase); | 753 | I915_READ(dspbase); |
746 | I915_WRITE(dspsurf, Start); | 754 | I915_WRITE(dspsurf, Start); |
747 | I915_READ(dspsurf); | 755 | I915_READ(dspsurf); |
756 | I915_WRITE(dsptileoff, (y << 16) | x); | ||
748 | } else { | 757 | } else { |
749 | I915_WRITE(dspbase, Start + Offset); | 758 | I915_WRITE(dspbase, Start + Offset); |
750 | I915_READ(dspbase); | 759 | I915_READ(dspbase); |
@@ -1795,6 +1804,37 @@ static void intel_crtc_init(struct drm_device *dev, int pipe) | |||
1795 | } | 1804 | } |
1796 | } | 1805 | } |
1797 | 1806 | ||
1807 | int intel_get_pipe_from_crtc_id(struct drm_device *dev, void *data, | ||
1808 | struct drm_file *file_priv) | ||
1809 | { | ||
1810 | drm_i915_private_t *dev_priv = dev->dev_private; | ||
1811 | struct drm_i915_get_pipe_from_crtc_id *pipe_from_crtc_id = data; | ||
1812 | struct drm_crtc *crtc = NULL; | ||
1813 | int pipe = -1; | ||
1814 | |||
1815 | if (!dev_priv) { | ||
1816 | DRM_ERROR("called with no initialization\n"); | ||
1817 | return -EINVAL; | ||
1818 | } | ||
1819 | |||
1820 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { | ||
1821 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); | ||
1822 | if (crtc->base.id == pipe_from_crtc_id->crtc_id) { | ||
1823 | pipe = intel_crtc->pipe; | ||
1824 | break; | ||
1825 | } | ||
1826 | } | ||
1827 | |||
1828 | if (pipe == -1) { | ||
1829 | DRM_ERROR("no such CRTC id\n"); | ||
1830 | return -EINVAL; | ||
1831 | } | ||
1832 | |||
1833 | pipe_from_crtc_id->pipe = pipe; | ||
1834 | |||
1835 | return 0; | ||
1836 | } | ||
1837 | |||
1798 | struct drm_crtc *intel_get_crtc_from_pipe(struct drm_device *dev, int pipe) | 1838 | struct drm_crtc *intel_get_crtc_from_pipe(struct drm_device *dev, int pipe) |
1799 | { | 1839 | { |
1800 | struct drm_crtc *crtc = NULL; | 1840 | struct drm_crtc *crtc = NULL; |