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path: root/drivers/gpu/drm/i915/intel_display.c
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Diffstat (limited to 'drivers/gpu/drm/i915/intel_display.c')
-rw-r--r--drivers/gpu/drm/i915/intel_display.c18
1 files changed, 10 insertions, 8 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index a69a3d0d3acf..bc2ad348e5d8 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1376,7 +1376,8 @@ static void assert_pch_dp_disabled(struct drm_i915_private *dev_priv,
1376 "PCH DP (0x%08x) enabled on transcoder %c, should be disabled\n", 1376 "PCH DP (0x%08x) enabled on transcoder %c, should be disabled\n",
1377 reg, pipe_name(pipe)); 1377 reg, pipe_name(pipe));
1378 1378
1379 WARN(HAS_PCH_IBX(dev_priv->dev) && (val & SDVO_PIPE_B_SELECT), 1379 WARN(HAS_PCH_IBX(dev_priv->dev) && (val & DP_PORT_EN) == 0
1380 && (val & DP_PIPEB_SELECT),
1380 "IBX PCH dp port still using transcoder B\n"); 1381 "IBX PCH dp port still using transcoder B\n");
1381} 1382}
1382 1383
@@ -1384,11 +1385,12 @@ static void assert_pch_hdmi_disabled(struct drm_i915_private *dev_priv,
1384 enum pipe pipe, int reg) 1385 enum pipe pipe, int reg)
1385{ 1386{
1386 u32 val = I915_READ(reg); 1387 u32 val = I915_READ(reg);
1387 WARN(hdmi_pipe_enabled(dev_priv, val, pipe), 1388 WARN(hdmi_pipe_enabled(dev_priv, pipe, val),
1388 "PCH HDMI (0x%08x) enabled on transcoder %c, should be disabled\n", 1389 "PCH HDMI (0x%08x) enabled on transcoder %c, should be disabled\n",
1389 reg, pipe_name(pipe)); 1390 reg, pipe_name(pipe));
1390 1391
1391 WARN(HAS_PCH_IBX(dev_priv->dev) && (val & SDVO_PIPE_B_SELECT), 1392 WARN(HAS_PCH_IBX(dev_priv->dev) && (val & PORT_ENABLE) == 0
1393 && (val & SDVO_PIPE_B_SELECT),
1392 "IBX PCH hdmi port still using transcoder B\n"); 1394 "IBX PCH hdmi port still using transcoder B\n");
1393} 1395}
1394 1396
@@ -1404,13 +1406,13 @@ static void assert_pch_ports_disabled(struct drm_i915_private *dev_priv,
1404 1406
1405 reg = PCH_ADPA; 1407 reg = PCH_ADPA;
1406 val = I915_READ(reg); 1408 val = I915_READ(reg);
1407 WARN(adpa_pipe_enabled(dev_priv, val, pipe), 1409 WARN(adpa_pipe_enabled(dev_priv, pipe, val),
1408 "PCH VGA enabled on transcoder %c, should be disabled\n", 1410 "PCH VGA enabled on transcoder %c, should be disabled\n",
1409 pipe_name(pipe)); 1411 pipe_name(pipe));
1410 1412
1411 reg = PCH_LVDS; 1413 reg = PCH_LVDS;
1412 val = I915_READ(reg); 1414 val = I915_READ(reg);
1413 WARN(lvds_pipe_enabled(dev_priv, val, pipe), 1415 WARN(lvds_pipe_enabled(dev_priv, pipe, val),
1414 "PCH LVDS enabled on transcoder %c, should be disabled\n", 1416 "PCH LVDS enabled on transcoder %c, should be disabled\n",
1415 pipe_name(pipe)); 1417 pipe_name(pipe));
1416 1418
@@ -1872,7 +1874,7 @@ static void disable_pch_hdmi(struct drm_i915_private *dev_priv,
1872 enum pipe pipe, int reg) 1874 enum pipe pipe, int reg)
1873{ 1875{
1874 u32 val = I915_READ(reg); 1876 u32 val = I915_READ(reg);
1875 if (hdmi_pipe_enabled(dev_priv, val, pipe)) { 1877 if (hdmi_pipe_enabled(dev_priv, pipe, val)) {
1876 DRM_DEBUG_KMS("Disabling pch HDMI %x on pipe %d\n", 1878 DRM_DEBUG_KMS("Disabling pch HDMI %x on pipe %d\n",
1877 reg, pipe); 1879 reg, pipe);
1878 I915_WRITE(reg, val & ~PORT_ENABLE); 1880 I915_WRITE(reg, val & ~PORT_ENABLE);
@@ -1894,12 +1896,12 @@ static void intel_disable_pch_ports(struct drm_i915_private *dev_priv,
1894 1896
1895 reg = PCH_ADPA; 1897 reg = PCH_ADPA;
1896 val = I915_READ(reg); 1898 val = I915_READ(reg);
1897 if (adpa_pipe_enabled(dev_priv, val, pipe)) 1899 if (adpa_pipe_enabled(dev_priv, pipe, val))
1898 I915_WRITE(reg, val & ~ADPA_DAC_ENABLE); 1900 I915_WRITE(reg, val & ~ADPA_DAC_ENABLE);
1899 1901
1900 reg = PCH_LVDS; 1902 reg = PCH_LVDS;
1901 val = I915_READ(reg); 1903 val = I915_READ(reg);
1902 if (lvds_pipe_enabled(dev_priv, val, pipe)) { 1904 if (lvds_pipe_enabled(dev_priv, pipe, val)) {
1903 DRM_DEBUG_KMS("disable lvds on pipe %d val 0x%08x\n", pipe, val); 1905 DRM_DEBUG_KMS("disable lvds on pipe %d val 0x%08x\n", pipe, val);
1904 I915_WRITE(reg, val & ~LVDS_PORT_EN); 1906 I915_WRITE(reg, val & ~LVDS_PORT_EN);
1905 POSTING_READ(reg); 1907 POSTING_READ(reg);