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path: root/drivers/gpu/drm/i915/intel_display.c
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Diffstat (limited to 'drivers/gpu/drm/i915/intel_display.c')
-rw-r--r--drivers/gpu/drm/i915/intel_display.c18
1 files changed, 13 insertions, 5 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 6d22128d97b1..f75173c20f47 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -2438,8 +2438,15 @@ intel_find_plane_obj(struct intel_crtc *intel_crtc,
2438 if (!intel_crtc->base.primary->fb) 2438 if (!intel_crtc->base.primary->fb)
2439 return; 2439 return;
2440 2440
2441 if (intel_alloc_plane_obj(intel_crtc, plane_config)) 2441 if (intel_alloc_plane_obj(intel_crtc, plane_config)) {
2442 struct drm_plane *primary = intel_crtc->base.primary;
2443
2444 primary->state->crtc = &intel_crtc->base;
2445 primary->crtc = &intel_crtc->base;
2446 update_state_fb(primary);
2447
2442 return; 2448 return;
2449 }
2443 2450
2444 kfree(intel_crtc->base.primary->fb); 2451 kfree(intel_crtc->base.primary->fb);
2445 intel_crtc->base.primary->fb = NULL; 2452 intel_crtc->base.primary->fb = NULL;
@@ -2462,11 +2469,15 @@ intel_find_plane_obj(struct intel_crtc *intel_crtc,
2462 continue; 2469 continue;
2463 2470
2464 if (i915_gem_obj_ggtt_offset(obj) == plane_config->base) { 2471 if (i915_gem_obj_ggtt_offset(obj) == plane_config->base) {
2472 struct drm_plane *primary = intel_crtc->base.primary;
2473
2465 if (obj->tiling_mode != I915_TILING_NONE) 2474 if (obj->tiling_mode != I915_TILING_NONE)
2466 dev_priv->preserve_bios_swizzle = true; 2475 dev_priv->preserve_bios_swizzle = true;
2467 2476
2468 drm_framebuffer_reference(c->primary->fb); 2477 drm_framebuffer_reference(c->primary->fb);
2469 intel_crtc->base.primary->fb = c->primary->fb; 2478 primary->fb = c->primary->fb;
2479 primary->state->crtc = &intel_crtc->base;
2480 primary->crtc = &intel_crtc->base;
2470 obj->frontbuffer_bits |= INTEL_FRONTBUFFER_PRIMARY(intel_crtc->pipe); 2481 obj->frontbuffer_bits |= INTEL_FRONTBUFFER_PRIMARY(intel_crtc->pipe);
2471 break; 2482 break;
2472 } 2483 }
@@ -6663,7 +6674,6 @@ i9xx_get_initial_plane_config(struct intel_crtc *crtc,
6663 plane_config->size); 6674 plane_config->size);
6664 6675
6665 crtc->base.primary->fb = fb; 6676 crtc->base.primary->fb = fb;
6666 update_state_fb(crtc->base.primary);
6667} 6677}
6668 6678
6669static void chv_crtc_clock_get(struct intel_crtc *crtc, 6679static void chv_crtc_clock_get(struct intel_crtc *crtc,
@@ -7704,7 +7714,6 @@ skylake_get_initial_plane_config(struct intel_crtc *crtc,
7704 plane_config->size); 7714 plane_config->size);
7705 7715
7706 crtc->base.primary->fb = fb; 7716 crtc->base.primary->fb = fb;
7707 update_state_fb(crtc->base.primary);
7708 return; 7717 return;
7709 7718
7710error: 7719error:
@@ -7798,7 +7807,6 @@ ironlake_get_initial_plane_config(struct intel_crtc *crtc,
7798 plane_config->size); 7807 plane_config->size);
7799 7808
7800 crtc->base.primary->fb = fb; 7809 crtc->base.primary->fb = fb;
7801 update_state_fb(crtc->base.primary);
7802} 7810}
7803 7811
7804static bool ironlake_get_pipe_config(struct intel_crtc *crtc, 7812static bool ironlake_get_pipe_config(struct intel_crtc *crtc,