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path: root/drivers/gpu/drm/i915/intel_display.c
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Diffstat (limited to 'drivers/gpu/drm/i915/intel_display.c')
-rw-r--r--drivers/gpu/drm/i915/intel_display.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 11a303ecb058..3feaaba3616d 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -4516,7 +4516,7 @@ static void valleyview_set_cdclk(struct drm_device *dev, int cdclk)
4516 mutex_lock(&dev_priv->dpio_lock); 4516 mutex_lock(&dev_priv->dpio_lock);
4517 /* adjust cdclk divider */ 4517 /* adjust cdclk divider */
4518 val = vlv_cck_read(dev_priv, CCK_DISPLAY_CLOCK_CONTROL); 4518 val = vlv_cck_read(dev_priv, CCK_DISPLAY_CLOCK_CONTROL);
4519 val &= ~0xf; 4519 val &= ~DISPLAY_FREQUENCY_VALUES;
4520 val |= divider; 4520 val |= divider;
4521 vlv_cck_write(dev_priv, CCK_DISPLAY_CLOCK_CONTROL, val); 4521 vlv_cck_write(dev_priv, CCK_DISPLAY_CLOCK_CONTROL, val);
4522 mutex_unlock(&dev_priv->dpio_lock); 4522 mutex_unlock(&dev_priv->dpio_lock);
@@ -4553,7 +4553,7 @@ int valleyview_cur_cdclk(struct drm_i915_private *dev_priv)
4553 divider = vlv_cck_read(dev_priv, CCK_DISPLAY_CLOCK_CONTROL); 4553 divider = vlv_cck_read(dev_priv, CCK_DISPLAY_CLOCK_CONTROL);
4554 mutex_unlock(&dev_priv->dpio_lock); 4554 mutex_unlock(&dev_priv->dpio_lock);
4555 4555
4556 divider &= 0xf; 4556 divider &= DISPLAY_FREQUENCY_VALUES;
4557 4557
4558 cur_cdclk = DIV_ROUND_CLOSEST(vco << 1, divider + 1); 4558 cur_cdclk = DIV_ROUND_CLOSEST(vco << 1, divider + 1);
4559 4559