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path: root/drivers/gpu/drm/i915/intel_crt.c
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Diffstat (limited to 'drivers/gpu/drm/i915/intel_crt.c')
-rw-r--r--drivers/gpu/drm/i915/intel_crt.c40
1 files changed, 17 insertions, 23 deletions
diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c
index 32a3693905ec..1ce45a0a2d3e 100644
--- a/drivers/gpu/drm/i915/intel_crt.c
+++ b/drivers/gpu/drm/i915/intel_crt.c
@@ -45,6 +45,9 @@
45 45
46struct intel_crt { 46struct intel_crt {
47 struct intel_encoder base; 47 struct intel_encoder base;
48 /* DPMS state is stored in the connector, which we need in the
49 * encoder's enable/disable callbacks */
50 struct intel_connector *connector;
48 bool force_hotplug_required; 51 bool force_hotplug_required;
49 u32 adpa_reg; 52 u32 adpa_reg;
50}; 53};
@@ -81,29 +84,6 @@ static bool intel_crt_get_hw_state(struct intel_encoder *encoder,
81 return true; 84 return true;
82} 85}
83 86
84static void intel_disable_crt(struct intel_encoder *encoder)
85{
86 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
87 struct intel_crt *crt = intel_encoder_to_crt(encoder);
88 u32 temp;
89
90 temp = I915_READ(crt->adpa_reg);
91 temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
92 temp &= ~ADPA_DAC_ENABLE;
93 I915_WRITE(crt->adpa_reg, temp);
94}
95
96static void intel_enable_crt(struct intel_encoder *encoder)
97{
98 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
99 struct intel_crt *crt = intel_encoder_to_crt(encoder);
100 u32 temp;
101
102 temp = I915_READ(crt->adpa_reg);
103 temp |= ADPA_DAC_ENABLE;
104 I915_WRITE(crt->adpa_reg, temp);
105}
106
107/* Note: The caller is required to filter out dpms modes not supported by the 87/* Note: The caller is required to filter out dpms modes not supported by the
108 * platform. */ 88 * platform. */
109static void intel_crt_set_dpms(struct intel_encoder *encoder, int mode) 89static void intel_crt_set_dpms(struct intel_encoder *encoder, int mode)
@@ -135,6 +115,19 @@ static void intel_crt_set_dpms(struct intel_encoder *encoder, int mode)
135 I915_WRITE(crt->adpa_reg, temp); 115 I915_WRITE(crt->adpa_reg, temp);
136} 116}
137 117
118static void intel_disable_crt(struct intel_encoder *encoder)
119{
120 intel_crt_set_dpms(encoder, DRM_MODE_DPMS_OFF);
121}
122
123static void intel_enable_crt(struct intel_encoder *encoder)
124{
125 struct intel_crt *crt = intel_encoder_to_crt(encoder);
126
127 intel_crt_set_dpms(encoder, crt->connector->base.dpms);
128}
129
130
138static void intel_crt_dpms(struct drm_connector *connector, int mode) 131static void intel_crt_dpms(struct drm_connector *connector, int mode)
139{ 132{
140 struct drm_device *dev = connector->dev; 133 struct drm_device *dev = connector->dev;
@@ -746,6 +739,7 @@ void intel_crt_init(struct drm_device *dev)
746 } 739 }
747 740
748 connector = &intel_connector->base; 741 connector = &intel_connector->base;
742 crt->connector = intel_connector;
749 drm_connector_init(dev, &intel_connector->base, 743 drm_connector_init(dev, &intel_connector->base,
750 &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA); 744 &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
751 745