diff options
Diffstat (limited to 'drivers/gpu/drm/i915/i915_suspend.c')
-rw-r--r-- | drivers/gpu/drm/i915/i915_suspend.c | 8 |
1 files changed, 2 insertions, 6 deletions
diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c index 410772466fa7..0521ecf26017 100644 --- a/drivers/gpu/drm/i915/i915_suspend.c +++ b/drivers/gpu/drm/i915/i915_suspend.c | |||
@@ -740,7 +740,7 @@ void i915_restore_display(struct drm_device *dev) | |||
740 | I915_WRITE(PCH_PP_OFF_DELAYS, dev_priv->savePP_OFF_DELAYS); | 740 | I915_WRITE(PCH_PP_OFF_DELAYS, dev_priv->savePP_OFF_DELAYS); |
741 | I915_WRITE(PCH_PP_DIVISOR, dev_priv->savePP_DIVISOR); | 741 | I915_WRITE(PCH_PP_DIVISOR, dev_priv->savePP_DIVISOR); |
742 | I915_WRITE(PCH_PP_CONTROL, dev_priv->savePP_CONTROL); | 742 | I915_WRITE(PCH_PP_CONTROL, dev_priv->savePP_CONTROL); |
743 | I915_WRITE(MCHBAR_RENDER_STANDBY, | 743 | I915_WRITE(RSTDBYCTL, |
744 | dev_priv->saveMCHBAR_RENDER_STANDBY); | 744 | dev_priv->saveMCHBAR_RENDER_STANDBY); |
745 | } else { | 745 | } else { |
746 | I915_WRITE(PFIT_PGM_RATIOS, dev_priv->savePFIT_PGM_RATIOS); | 746 | I915_WRITE(PFIT_PGM_RATIOS, dev_priv->savePFIT_PGM_RATIOS); |
@@ -811,7 +811,7 @@ int i915_save_state(struct drm_device *dev) | |||
811 | dev_priv->saveFDI_RXA_IMR = I915_READ(FDI_RXA_IMR); | 811 | dev_priv->saveFDI_RXA_IMR = I915_READ(FDI_RXA_IMR); |
812 | dev_priv->saveFDI_RXB_IMR = I915_READ(FDI_RXB_IMR); | 812 | dev_priv->saveFDI_RXB_IMR = I915_READ(FDI_RXB_IMR); |
813 | dev_priv->saveMCHBAR_RENDER_STANDBY = | 813 | dev_priv->saveMCHBAR_RENDER_STANDBY = |
814 | I915_READ(MCHBAR_RENDER_STANDBY); | 814 | I915_READ(RSTDBYCTL); |
815 | } else { | 815 | } else { |
816 | dev_priv->saveIER = I915_READ(IER); | 816 | dev_priv->saveIER = I915_READ(IER); |
817 | dev_priv->saveIMR = I915_READ(IMR); | 817 | dev_priv->saveIMR = I915_READ(IMR); |
@@ -822,10 +822,6 @@ int i915_save_state(struct drm_device *dev) | |||
822 | if (IS_GEN6(dev)) | 822 | if (IS_GEN6(dev)) |
823 | gen6_disable_rps(dev); | 823 | gen6_disable_rps(dev); |
824 | 824 | ||
825 | /* XXX disabling the clock gating breaks suspend on gm45 | ||
826 | intel_disable_clock_gating(dev); | ||
827 | */ | ||
828 | |||
829 | /* Cache mode state */ | 825 | /* Cache mode state */ |
830 | dev_priv->saveCACHE_MODE_0 = I915_READ(CACHE_MODE_0); | 826 | dev_priv->saveCACHE_MODE_0 = I915_READ(CACHE_MODE_0); |
831 | 827 | ||