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path: root/drivers/gpu/drm/i915/i915_reg.h
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Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
-rw-r--r--drivers/gpu/drm/i915/i915_reg.h5
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 64b0a3afd92b..150400f40534 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -178,6 +178,7 @@
178#define MI_OVERLAY_OFF (0x2<<21) 178#define MI_OVERLAY_OFF (0x2<<21)
179#define MI_LOAD_SCAN_LINES_INCL MI_INSTR(0x12, 0) 179#define MI_LOAD_SCAN_LINES_INCL MI_INSTR(0x12, 0)
180#define MI_DISPLAY_FLIP MI_INSTR(0x14, 2) 180#define MI_DISPLAY_FLIP MI_INSTR(0x14, 2)
181#define MI_DISPLAY_FLIP_I915 MI_INSTR(0x14, 1)
181#define MI_DISPLAY_FLIP_PLANE(n) ((n) << 20) 182#define MI_DISPLAY_FLIP_PLANE(n) ((n) << 20)
182#define MI_STORE_DWORD_IMM MI_INSTR(0x20, 1) 183#define MI_STORE_DWORD_IMM MI_INSTR(0x20, 1)
183#define MI_MEM_VIRTUAL (1 << 22) /* 965+ only */ 184#define MI_MEM_VIRTUAL (1 << 22) /* 965+ only */
@@ -368,6 +369,9 @@
368#define CM0_RC_OP_FLUSH_DISABLE (1<<0) 369#define CM0_RC_OP_FLUSH_DISABLE (1<<0)
369#define BB_ADDR 0x02140 /* 8 bytes */ 370#define BB_ADDR 0x02140 /* 8 bytes */
370#define GFX_FLSH_CNTL 0x02170 /* 915+ only */ 371#define GFX_FLSH_CNTL 0x02170 /* 915+ only */
372#define ECOSKPD 0x021d0
373#define ECO_GATING_CX_ONLY (1<<3)
374#define ECO_FLIP_DONE (1<<0)
371 375
372/* GEN6 interrupt control */ 376/* GEN6 interrupt control */
373#define GEN6_RENDER_HWSTAM 0x2098 377#define GEN6_RENDER_HWSTAM 0x2098
@@ -1130,7 +1134,6 @@
1130#define CRT_HOTPLUG_DETECT_DELAY_2G (1 << 4) 1134#define CRT_HOTPLUG_DETECT_DELAY_2G (1 << 4)
1131#define CRT_HOTPLUG_DETECT_VOLTAGE_325MV (0 << 2) 1135#define CRT_HOTPLUG_DETECT_VOLTAGE_325MV (0 << 2)
1132#define CRT_HOTPLUG_DETECT_VOLTAGE_475MV (1 << 2) 1136#define CRT_HOTPLUG_DETECT_VOLTAGE_475MV (1 << 2)
1133#define CRT_HOTPLUG_MASK (0x3fc) /* Bits 9-2 */
1134 1137
1135#define PORT_HOTPLUG_STAT 0x61114 1138#define PORT_HOTPLUG_STAT 0x61114
1136#define HDMIB_HOTPLUG_INT_STATUS (1 << 29) 1139#define HDMIB_HOTPLUG_INT_STATUS (1 << 29)