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Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
-rw-r--r--drivers/gpu/drm/i915/i915_reg.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 17b662f0849d..4c64f17f188d 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -1046,6 +1046,7 @@ enum skl_disp_power_wells {
1046#define _CHV_PLL_DW9_CH0 0x8024 1046#define _CHV_PLL_DW9_CH0 0x8024
1047#define _CHV_PLL_DW9_CH1 0x81A4 1047#define _CHV_PLL_DW9_CH1 0x81A4
1048#define DPIO_CHV_INT_LOCK_THRESHOLD_SHIFT 1 /* 3 bits */ 1048#define DPIO_CHV_INT_LOCK_THRESHOLD_SHIFT 1 /* 3 bits */
1049#define DPIO_CHV_INT_LOCK_THRESHOLD_MASK (7 << 1)
1049#define DPIO_CHV_INT_LOCK_THRESHOLD_SEL_COARSE 1 /* 1: coarse & 0 : fine */ 1050#define DPIO_CHV_INT_LOCK_THRESHOLD_SEL_COARSE 1 /* 1: coarse & 0 : fine */
1050#define CHV_PLL_DW9(ch) _PIPE(ch, _CHV_PLL_DW9_CH0, _CHV_PLL_DW9_CH1) 1051#define CHV_PLL_DW9(ch) _PIPE(ch, _CHV_PLL_DW9_CH0, _CHV_PLL_DW9_CH1)
1051 1052