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path: root/drivers/gpu/drm/i915/i915_reg.h
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Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
-rw-r--r--drivers/gpu/drm/i915/i915_reg.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 64b0a3afd92b..2cae38a57247 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -178,6 +178,7 @@
178#define MI_OVERLAY_OFF (0x2<<21) 178#define MI_OVERLAY_OFF (0x2<<21)
179#define MI_LOAD_SCAN_LINES_INCL MI_INSTR(0x12, 0) 179#define MI_LOAD_SCAN_LINES_INCL MI_INSTR(0x12, 0)
180#define MI_DISPLAY_FLIP MI_INSTR(0x14, 2) 180#define MI_DISPLAY_FLIP MI_INSTR(0x14, 2)
181#define MI_DISPLAY_FLIP_I915 MI_INSTR(0x14, 1)
181#define MI_DISPLAY_FLIP_PLANE(n) ((n) << 20) 182#define MI_DISPLAY_FLIP_PLANE(n) ((n) << 20)
182#define MI_STORE_DWORD_IMM MI_INSTR(0x20, 1) 183#define MI_STORE_DWORD_IMM MI_INSTR(0x20, 1)
183#define MI_MEM_VIRTUAL (1 << 22) /* 965+ only */ 184#define MI_MEM_VIRTUAL (1 << 22) /* 965+ only */
@@ -368,6 +369,9 @@
368#define CM0_RC_OP_FLUSH_DISABLE (1<<0) 369#define CM0_RC_OP_FLUSH_DISABLE (1<<0)
369#define BB_ADDR 0x02140 /* 8 bytes */ 370#define BB_ADDR 0x02140 /* 8 bytes */
370#define GFX_FLSH_CNTL 0x02170 /* 915+ only */ 371#define GFX_FLSH_CNTL 0x02170 /* 915+ only */
372#define ECOSKPD 0x021d0
373#define ECO_GATING_CX_ONLY (1<<3)
374#define ECO_FLIP_DONE (1<<0)
371 375
372/* GEN6 interrupt control */ 376/* GEN6 interrupt control */
373#define GEN6_RENDER_HWSTAM 0x2098 377#define GEN6_RENDER_HWSTAM 0x2098