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path: root/drivers/gpu/drm/i915/i915_irq.c
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Diffstat (limited to 'drivers/gpu/drm/i915/i915_irq.c')
-rw-r--r--drivers/gpu/drm/i915/i915_irq.c18
1 files changed, 14 insertions, 4 deletions
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 981834b0f9b6..996c2931c499 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -281,10 +281,14 @@ void gen6_enable_rps_interrupts(struct drm_device *dev)
281 struct drm_i915_private *dev_priv = dev->dev_private; 281 struct drm_i915_private *dev_priv = dev->dev_private;
282 282
283 spin_lock_irq(&dev_priv->irq_lock); 283 spin_lock_irq(&dev_priv->irq_lock);
284
284 WARN_ON(dev_priv->rps.pm_iir); 285 WARN_ON(dev_priv->rps.pm_iir);
285 WARN_ON(I915_READ(gen6_pm_iir(dev_priv)) & dev_priv->pm_rps_events); 286 WARN_ON(I915_READ(gen6_pm_iir(dev_priv)) & dev_priv->pm_rps_events);
286 dev_priv->rps.interrupts_enabled = true; 287 dev_priv->rps.interrupts_enabled = true;
288 I915_WRITE(gen6_pm_ier(dev_priv), I915_READ(gen6_pm_ier(dev_priv)) |
289 dev_priv->pm_rps_events);
287 gen6_enable_pm_irq(dev_priv, dev_priv->pm_rps_events); 290 gen6_enable_pm_irq(dev_priv, dev_priv->pm_rps_events);
291
288 spin_unlock_irq(&dev_priv->irq_lock); 292 spin_unlock_irq(&dev_priv->irq_lock);
289} 293}
290 294
@@ -3307,8 +3311,10 @@ static void gen5_gt_irq_postinstall(struct drm_device *dev)
3307 GEN5_IRQ_INIT(GT, dev_priv->gt_irq_mask, gt_irqs); 3311 GEN5_IRQ_INIT(GT, dev_priv->gt_irq_mask, gt_irqs);
3308 3312
3309 if (INTEL_INFO(dev)->gen >= 6) { 3313 if (INTEL_INFO(dev)->gen >= 6) {
3310 pm_irqs |= dev_priv->pm_rps_events; 3314 /*
3311 3315 * RPS interrupts will get enabled/disabled on demand when RPS
3316 * itself is enabled/disabled.
3317 */
3312 if (HAS_VEBOX(dev)) 3318 if (HAS_VEBOX(dev))
3313 pm_irqs |= PM_VEBOX_USER_INTERRUPT; 3319 pm_irqs |= PM_VEBOX_USER_INTERRUPT;
3314 3320
@@ -3520,7 +3526,11 @@ static void gen8_gt_irq_postinstall(struct drm_i915_private *dev_priv)
3520 dev_priv->pm_irq_mask = 0xffffffff; 3526 dev_priv->pm_irq_mask = 0xffffffff;
3521 GEN8_IRQ_INIT_NDX(GT, 0, ~gt_interrupts[0], gt_interrupts[0]); 3527 GEN8_IRQ_INIT_NDX(GT, 0, ~gt_interrupts[0], gt_interrupts[0]);
3522 GEN8_IRQ_INIT_NDX(GT, 1, ~gt_interrupts[1], gt_interrupts[1]); 3528 GEN8_IRQ_INIT_NDX(GT, 1, ~gt_interrupts[1], gt_interrupts[1]);
3523 GEN8_IRQ_INIT_NDX(GT, 2, dev_priv->pm_irq_mask, dev_priv->pm_rps_events); 3529 /*
3530 * RPS interrupts will get enabled/disabled on demand when RPS itself
3531 * is enabled/disabled.
3532 */
3533 GEN8_IRQ_INIT_NDX(GT, 2, dev_priv->pm_irq_mask, 0);
3524 GEN8_IRQ_INIT_NDX(GT, 3, ~gt_interrupts[3], gt_interrupts[3]); 3534 GEN8_IRQ_INIT_NDX(GT, 3, ~gt_interrupts[3], gt_interrupts[3]);
3525} 3535}
3526 3536
@@ -3609,7 +3619,7 @@ static void vlv_display_irq_uninstall(struct drm_i915_private *dev_priv)
3609 3619
3610 vlv_display_irq_reset(dev_priv); 3620 vlv_display_irq_reset(dev_priv);
3611 3621
3612 dev_priv->irq_mask = 0; 3622 dev_priv->irq_mask = ~0;
3613} 3623}
3614 3624
3615static void valleyview_irq_uninstall(struct drm_device *dev) 3625static void valleyview_irq_uninstall(struct drm_device *dev)