diff options
Diffstat (limited to 'drivers/gpu/drm/i915/i915_irq.c')
-rw-r--r-- | drivers/gpu/drm/i915/i915_irq.c | 19 |
1 files changed, 18 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 0887581fa650..ce337be4bbcd 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c | |||
@@ -157,6 +157,20 @@ i915_disable_pipestat(drm_i915_private_t *dev_priv, int pipe, u32 mask) | |||
157 | } | 157 | } |
158 | 158 | ||
159 | /** | 159 | /** |
160 | * intel_enable_asle - enable ASLE interrupt for OpRegion | ||
161 | */ | ||
162 | void intel_enable_asle (struct drm_device *dev) | ||
163 | { | ||
164 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; | ||
165 | |||
166 | if (IS_IGDNG(dev)) | ||
167 | igdng_enable_display_irq(dev_priv, DE_GSE); | ||
168 | else | ||
169 | i915_enable_pipestat(dev_priv, 1, | ||
170 | I915_LEGACY_BLC_EVENT_ENABLE); | ||
171 | } | ||
172 | |||
173 | /** | ||
160 | * i915_pipe_enabled - check if a pipe is enabled | 174 | * i915_pipe_enabled - check if a pipe is enabled |
161 | * @dev: DRM device | 175 | * @dev: DRM device |
162 | * @pipe: pipe to check | 176 | * @pipe: pipe to check |
@@ -288,6 +302,9 @@ irqreturn_t igdng_irq_handler(struct drm_device *dev) | |||
288 | DRM_WAKEUP(&dev_priv->irq_queue); | 302 | DRM_WAKEUP(&dev_priv->irq_queue); |
289 | } | 303 | } |
290 | 304 | ||
305 | if (de_iir & DE_GSE) | ||
306 | ironlake_opregion_gse_intr(dev); | ||
307 | |||
291 | de_iir = new_de_iir; | 308 | de_iir = new_de_iir; |
292 | gt_iir = new_gt_iir; | 309 | gt_iir = new_gt_iir; |
293 | } | 310 | } |
@@ -992,7 +1009,7 @@ static int igdng_irq_postinstall(struct drm_device *dev) | |||
992 | { | 1009 | { |
993 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; | 1010 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; |
994 | /* enable kind of interrupts always enabled */ | 1011 | /* enable kind of interrupts always enabled */ |
995 | u32 display_mask = DE_MASTER_IRQ_CONTROL /*| DE_PCH_EVENT */; | 1012 | u32 display_mask = DE_MASTER_IRQ_CONTROL | DE_GSE /*| DE_PCH_EVENT */; |
996 | u32 render_mask = GT_USER_INTERRUPT; | 1013 | u32 render_mask = GT_USER_INTERRUPT; |
997 | 1014 | ||
998 | dev_priv->irq_mask_reg = ~display_mask; | 1015 | dev_priv->irq_mask_reg = ~display_mask; |