aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/i915/i915_drv.h
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/gpu/drm/i915/i915_drv.h')
-rw-r--r--drivers/gpu/drm/i915/i915_drv.h28
1 files changed, 23 insertions, 5 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index ef1c0b8f8d07..b3cc4731aa7c 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -47,6 +47,8 @@ enum pipe {
47 PIPE_B, 47 PIPE_B,
48}; 48};
49 49
50#define I915_NUM_PIPE 2
51
50/* Interface history: 52/* Interface history:
51 * 53 *
52 * 1.1: Original. 54 * 1.1: Original.
@@ -104,6 +106,8 @@ struct intel_opregion {
104typedef struct drm_i915_private { 106typedef struct drm_i915_private {
105 struct drm_device *dev; 107 struct drm_device *dev;
106 108
109 int has_gem;
110
107 void __iomem *regs; 111 void __iomem *regs;
108 drm_local_map_t *sarea; 112 drm_local_map_t *sarea;
109 113
@@ -132,6 +136,7 @@ typedef struct drm_i915_private {
132 int user_irq_refcount; 136 int user_irq_refcount;
133 /** Cached value of IMR to avoid reads in updating the bitfield */ 137 /** Cached value of IMR to avoid reads in updating the bitfield */
134 u32 irq_mask_reg; 138 u32 irq_mask_reg;
139 u32 pipestat[2];
135 140
136 int tex_lru_log_granularity; 141 int tex_lru_log_granularity;
137 int allow_batchbuffer; 142 int allow_batchbuffer;
@@ -147,6 +152,7 @@ typedef struct drm_i915_private {
147 u32 saveDSPBCNTR; 152 u32 saveDSPBCNTR;
148 u32 saveDSPARB; 153 u32 saveDSPARB;
149 u32 saveRENDERSTANDBY; 154 u32 saveRENDERSTANDBY;
155 u32 saveHWS;
150 u32 savePIPEACONF; 156 u32 savePIPEACONF;
151 u32 savePIPEBCONF; 157 u32 savePIPEBCONF;
152 u32 savePIPEASRC; 158 u32 savePIPEASRC;
@@ -240,6 +246,10 @@ typedef struct drm_i915_private {
240 * List of objects currently involved in rendering from the 246 * List of objects currently involved in rendering from the
241 * ringbuffer. 247 * ringbuffer.
242 * 248 *
249 * Includes buffers having the contents of their GPU caches
250 * flushed, not necessarily primitives. last_rendering_seqno
251 * represents when the rendering involved will be completed.
252 *
243 * A reference is held on the buffer while on this list. 253 * A reference is held on the buffer while on this list.
244 */ 254 */
245 struct list_head active_list; 255 struct list_head active_list;
@@ -249,6 +259,8 @@ typedef struct drm_i915_private {
249 * still have a write_domain which needs to be flushed before 259 * still have a write_domain which needs to be flushed before
250 * unbinding. 260 * unbinding.
251 * 261 *
262 * last_rendering_seqno is 0 while an object is in this list.
263 *
252 * A reference is held on the buffer while on this list. 264 * A reference is held on the buffer while on this list.
253 */ 265 */
254 struct list_head flushing_list; 266 struct list_head flushing_list;
@@ -257,6 +269,8 @@ typedef struct drm_i915_private {
257 * LRU list of objects which are not in the ringbuffer and 269 * LRU list of objects which are not in the ringbuffer and
258 * are ready to unbind, but are still in the GTT. 270 * are ready to unbind, but are still in the GTT.
259 * 271 *
272 * last_rendering_seqno is 0 while an object is in this list.
273 *
260 * A reference is not held on the buffer while on this list, 274 * A reference is not held on the buffer while on this list,
261 * as merely being GTT-bound shouldn't prevent its being 275 * as merely being GTT-bound shouldn't prevent its being
262 * freed, and we'll pull it off the list in the free path. 276 * freed, and we'll pull it off the list in the free path.
@@ -367,8 +381,8 @@ struct drm_i915_gem_object {
367 uint32_t agp_type; 381 uint32_t agp_type;
368 382
369 /** 383 /**
370 * Flagging of which individual pages are valid in GEM_DOMAIN_CPU when 384 * If present, while GEM_DOMAIN_CPU is in the read domain this array
371 * GEM_DOMAIN_CPU is not in the object's read domain. 385 * flags which individual pages are valid.
372 */ 386 */
373 uint8_t *page_cpu_valid; 387 uint8_t *page_cpu_valid;
374}; 388};
@@ -390,9 +404,6 @@ struct drm_i915_gem_request {
390 /** Time at which this request was emitted, in jiffies. */ 404 /** Time at which this request was emitted, in jiffies. */
391 unsigned long emitted_jiffies; 405 unsigned long emitted_jiffies;
392 406
393 /** Cache domains that were flushed at the start of the request. */
394 uint32_t flush_domains;
395
396 struct list_head list; 407 struct list_head list;
397}; 408};
398 409
@@ -446,6 +457,13 @@ extern int i915_vblank_swap(struct drm_device *dev, void *data,
446 struct drm_file *file_priv); 457 struct drm_file *file_priv);
447extern void i915_enable_irq(drm_i915_private_t *dev_priv, u32 mask); 458extern void i915_enable_irq(drm_i915_private_t *dev_priv, u32 mask);
448 459
460void
461i915_enable_pipestat(drm_i915_private_t *dev_priv, int pipe, u32 mask);
462
463void
464i915_disable_pipestat(drm_i915_private_t *dev_priv, int pipe, u32 mask);
465
466
449/* i915_mem.c */ 467/* i915_mem.c */
450extern int i915_mem_alloc(struct drm_device *dev, void *data, 468extern int i915_mem_alloc(struct drm_device *dev, void *data,
451 struct drm_file *file_priv); 469 struct drm_file *file_priv);