1 files changed, 90 insertions, 3 deletions

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index b3cc4731aa7c..4756e5cd6b5e 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -31,6 +31,7 @@
 #define _I915_DRV_H_
 
 #include "i915_reg.h"
+#include "intel_bios.h"
 #include <linux/io-mapping.h>
 
 /* General customization:
@@ -103,15 +104,23 @@ struct intel_opregion {
         int enabled;
 };
 
+struct drm_i915_master_private {
+        drm_local_map_t *sarea;
+        struct _drm_i915_sarea *sarea_priv;
+};
+#define I915_FENCE_REG_NONE -1
+
+struct drm_i915_fence_reg {
+        struct drm_gem_object *obj;
+};
+
 typedef struct drm_i915_private {
         struct drm_device *dev;
 
         int has_gem;
 
         void __iomem *regs;
-        drm_local_map_t *sarea;
 
-        drm_i915_sarea_t *sarea_priv;
         drm_i915_ring_buffer_t ring;
 
         drm_dma_handle_t *status_page_dmah;
@@ -144,8 +153,30 @@ typedef struct drm_i915_private {
         unsigned int sr01, adpa, ppcr, dvob, dvoc, lvds;
         int vblank_pipe;
 
+        bool cursor_needs_physical;
+
+        struct drm_mm vram;
+
+        int irq_enabled;
+
         struct intel_opregion opregion;
 
+        /* LVDS info */
+        int backlight_duty_cycle;  /* restore backlight to this value */
+        bool panel_wants_dither;
+        struct drm_display_mode *panel_fixed_mode;
+        struct drm_display_mode *vbt_mode; /* if any */
+
+        /* Feature bits from the VBIOS */
+        unsigned int int_tv_support:1;
+        unsigned int lvds_dither:1;
+        unsigned int lvds_vbt:1;
+        unsigned int int_crt_support:1;
+
+        struct drm_i915_fence_reg fence_regs[16]; /* assume 965 */
+        int fence_reg_start; /* 4 if userland hasn't ioctl'd us yet */
+        int num_fence_regs; /* 8 on pre-965, 16 otherwise */
+
         /* Register state */
         u8 saveLBB;
         u32 saveDSPACNTR;
@@ -364,6 +395,21 @@ struct drm_i915_gem_object {
          * This is the same as gtt_space->start
          */
         uint32_t gtt_offset;
+        /**
+         * Required alignment for the object
+         */
+        uint32_t gtt_alignment;
+        /**
+         * Fake offset for use by mmap(2)
+         */
+        uint64_t mmap_offset;
+
+        /**
+         * Fence register bits (if any) for this object.  Will be set
+         * as needed when mapped into the GTT.
+         * Protected by dev->struct_mutex.
+         */
+        int fence_reg;
 
         /** Boolean whether this object has a valid gtt offset. */
         int gtt_bound;
@@ -376,6 +422,7 @@ struct drm_i915_gem_object {
 
         /** Current tiling mode for the object. */
         uint32_t tiling_mode;
+        uint32_t stride;
 
         /** AGP mapping type (AGP_USER_MEMORY or AGP_USER_CACHED_MEMORY */
         uint32_t agp_type;
@@ -385,6 +432,10 @@ struct drm_i915_gem_object {
          * flags which individual pages are valid.
          */
         uint8_t *page_cpu_valid;
+
+        /** User space pin count and filp owning the pin */
+        uint32_t user_pin_count;
+        struct drm_file *pin_filp;
 };
 
 /**
@@ -414,8 +465,19 @@ struct drm_i915_file_private {
         } mm;
 };
 
+enum intel_chip_family {
+        CHIP_I8XX = 0x01,
+        CHIP_I9XX = 0x02,
+        CHIP_I915 = 0x04,
+        CHIP_I965 = 0x08,
+};
+
 extern struct drm_ioctl_desc i915_ioctls[];
 extern int i915_max_ioctl;
+extern unsigned int i915_fbpercrtc;
+
+extern int i915_master_create(struct drm_device *dev, struct drm_master *master);
+extern void i915_master_destroy(struct drm_device *dev, struct drm_master *master);
 
                                 /* i915_dma.c */
 extern void i915_kernel_lost_context(struct drm_device * dev);
@@ -441,6 +503,7 @@ extern int i915_irq_wait(struct drm_device *dev, void *data,
                          struct drm_file *file_priv);
 void i915_user_irq_get(struct drm_device *dev);
 void i915_user_irq_put(struct drm_device *dev);
+extern void i915_enable_interrupt (struct drm_device *dev);
 
 extern irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS);
 extern void i915_driver_irq_preinstall(struct drm_device * dev);
@@ -487,6 +550,8 @@ int i915_gem_pwrite_ioctl(struct drm_device *dev, void *data,
                           struct drm_file *file_priv);
 int i915_gem_mmap_ioctl(struct drm_device *dev, void *data,
                         struct drm_file *file_priv);
+int i915_gem_mmap_gtt_ioctl(struct drm_device *dev, void *data,
+                        struct drm_file *file_priv);
 int i915_gem_set_domain_ioctl(struct drm_device *dev, void *data,
                               struct drm_file *file_priv);
 int i915_gem_sw_finish_ioctl(struct drm_device *dev, void *data,
@@ -523,6 +588,16 @@ uint32_t i915_get_gem_seqno(struct drm_device *dev);
 void i915_gem_retire_requests(struct drm_device *dev);
 void i915_gem_retire_work_handler(struct work_struct *work);
 void i915_gem_clflush_object(struct drm_gem_object *obj);
+int i915_gem_object_set_domain(struct drm_gem_object *obj,
+                               uint32_t read_domains,
+                               uint32_t write_domain);
+int i915_gem_init_ringbuffer(struct drm_device *dev);
+void i915_gem_cleanup_ringbuffer(struct drm_device *dev);
+int i915_gem_do_init(struct drm_device *dev, unsigned long start,
+                     unsigned long end);
+int i915_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf);
+int i915_gem_object_set_to_gtt_domain(struct drm_gem_object *obj,
+                                      int write);
 
 /* i915_gem_tiling.c */
 void i915_gem_detect_bit_6_swizzle(struct drm_device *dev);
@@ -561,6 +636,10 @@ static inline void opregion_asle_intr(struct drm_device *dev) { return; }
 static inline void opregion_enable_asle(struct drm_device *dev) { return; }
 #endif
 
+/* modesetting */
+extern void intel_modeset_init(struct drm_device *dev);
+extern void intel_modeset_cleanup(struct drm_device *dev);
+
 /**
  * Lock test for when it's just for synchronization of ring access.
  *
@@ -578,6 +657,13 @@ static inline void opregion_enable_asle(struct drm_device *dev) { return; }
 #define I915_WRITE16(reg, val)  writel(val, dev_priv->regs + (reg))
 #define I915_READ8(reg)         readb(dev_priv->regs + (reg))
 #define I915_WRITE8(reg, val)   writeb(val, dev_priv->regs + (reg))
+#ifdef writeq
+#define I915_WRITE64(reg, val)  writeq(val, dev_priv->regs + (reg))
+#else
+#define I915_WRITE64(reg, val)  (writel(val, dev_priv->regs + (reg)), \
+                                 writel(upper_32_bits(val), dev_priv->regs + \
+                                        (reg) + 4))
+#endif
 
 #define I915_VERBOSE 0
 
@@ -660,7 +746,8 @@ extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller);
 
 #define IS_G4X(dev) ((dev)->pci_device == 0x2E02 || \
                      (dev)->pci_device == 0x2E12 || \
-                     (dev)->pci_device == 0x2E22)
+                     (dev)->pci_device == 0x2E22 || \
+                     IS_GM45(dev))
 
 #define IS_G33(dev)    ((dev)->pci_device == 0x29C2 ||  \
                         (dev)->pci_device == 0x29B2 ||  \