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path: root/drivers/gpu/drm/i915/i915_drv.h
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Diffstat (limited to 'drivers/gpu/drm/i915/i915_drv.h')
-rw-r--r--drivers/gpu/drm/i915/i915_drv.h27
1 files changed, 24 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index bb4c2d387b6c..d08752875885 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -133,6 +133,22 @@ struct sdvo_device_mapping {
133 u8 initialized; 133 u8 initialized;
134}; 134};
135 135
136struct drm_i915_error_state {
137 u32 eir;
138 u32 pgtbl_er;
139 u32 pipeastat;
140 u32 pipebstat;
141 u32 ipeir;
142 u32 ipehr;
143 u32 instdone;
144 u32 acthd;
145 u32 instpm;
146 u32 instps;
147 u32 instdone1;
148 u32 seqno;
149 struct timeval time;
150};
151
136typedef struct drm_i915_private { 152typedef struct drm_i915_private {
137 struct drm_device *dev; 153 struct drm_device *dev;
138 154
@@ -209,6 +225,11 @@ typedef struct drm_i915_private {
209 int fence_reg_start; /* 4 if userland hasn't ioctl'd us yet */ 225 int fence_reg_start; /* 4 if userland hasn't ioctl'd us yet */
210 int num_fence_regs; /* 8 on pre-965, 16 otherwise */ 226 int num_fence_regs; /* 8 on pre-965, 16 otherwise */
211 227
228 unsigned int fsb_freq, mem_freq;
229
230 spinlock_t error_lock;
231 struct drm_i915_error_state *first_error;
232
212 /* Register state */ 233 /* Register state */
213 u8 saveLBB; 234 u8 saveLBB;
214 u32 saveDSPACNTR; 235 u32 saveDSPACNTR;
@@ -468,9 +489,6 @@ struct drm_i915_gem_object {
468 */ 489 */
469 int fence_reg; 490 int fence_reg;
470 491
471 /** Boolean whether this object has a valid gtt offset. */
472 int gtt_bound;
473
474 /** How many users have pinned this object in GTT space */ 492 /** How many users have pinned this object in GTT space */
475 int pin_count; 493 int pin_count;
476 494
@@ -655,6 +673,7 @@ void i915_gem_free_object(struct drm_gem_object *obj);
655int i915_gem_object_pin(struct drm_gem_object *obj, uint32_t alignment); 673int i915_gem_object_pin(struct drm_gem_object *obj, uint32_t alignment);
656void i915_gem_object_unpin(struct drm_gem_object *obj); 674void i915_gem_object_unpin(struct drm_gem_object *obj);
657int i915_gem_object_unbind(struct drm_gem_object *obj); 675int i915_gem_object_unbind(struct drm_gem_object *obj);
676void i915_gem_release_mmap(struct drm_gem_object *obj);
658void i915_gem_lastclose(struct drm_device *dev); 677void i915_gem_lastclose(struct drm_device *dev);
659uint32_t i915_get_gem_seqno(struct drm_device *dev); 678uint32_t i915_get_gem_seqno(struct drm_device *dev);
660int i915_gem_object_get_fence_reg(struct drm_gem_object *obj); 679int i915_gem_object_get_fence_reg(struct drm_gem_object *obj);
@@ -870,6 +889,8 @@ extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller);
870#define SUPPORTS_INTEGRATED_HDMI(dev) (IS_G4X(dev) || IS_IGDNG(dev)) 889#define SUPPORTS_INTEGRATED_HDMI(dev) (IS_G4X(dev) || IS_IGDNG(dev))
871#define SUPPORTS_INTEGRATED_DP(dev) (IS_G4X(dev) || IS_IGDNG(dev)) 890#define SUPPORTS_INTEGRATED_DP(dev) (IS_G4X(dev) || IS_IGDNG(dev))
872#define I915_HAS_HOTPLUG(dev) (IS_I945G(dev) || IS_I945GM(dev) || IS_I965G(dev)) 891#define I915_HAS_HOTPLUG(dev) (IS_I945G(dev) || IS_I945GM(dev) || IS_I965G(dev))
892/* dsparb controlled by hw only */
893#define DSPARB_HWCONTROL(dev) (IS_G4X(dev) || IS_IGDNG(dev))
873 894
874#define PRIMARY_RINGBUFFER_SIZE (128*1024) 895#define PRIMARY_RINGBUFFER_SIZE (128*1024)
875 896