1 files changed, 8 insertions, 5 deletions

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index f4af1ca0fb62..45b3c030f483 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -706,7 +706,7 @@ static int i915_drm_thaw(struct drm_device *dev)
 {
         int error = 0;
 
-        intel_gt_reset(dev);
+        intel_gt_sanitize(dev);
 
         if (drm_core_check_feature(dev, DRIVER_MODESET)) {
                 mutex_lock(&dev->struct_mutex);
@@ -732,7 +732,7 @@ int i915_resume(struct drm_device *dev)
 
         pci_set_master(dev->pdev);
 
-        intel_gt_reset(dev);
+        intel_gt_sanitize(dev);
 
         /*
          * Platforms with opregion should have sane BIOS, older ones (gen3 and
@@ -1253,21 +1253,21 @@ hsw_unclaimed_reg_check(struct drm_i915_private *dev_priv, u32 reg)
 
 #define __i915_read(x, y) \
 u##x i915_read##x(struct drm_i915_private *dev_priv, u32 reg) { \
+        unsigned long irqflags; \
         u##x val = 0; \
+        spin_lock_irqsave(&dev_priv->gt_lock, irqflags); \
         if (IS_GEN5(dev_priv->dev)) \
                 ilk_dummy_write(dev_priv); \
         if (NEEDS_FORCE_WAKE((dev_priv), (reg))) { \
-                unsigned long irqflags; \
-                spin_lock_irqsave(&dev_priv->gt_lock, irqflags); \
                 if (dev_priv->forcewake_count == 0) \
                         dev_priv->gt.force_wake_get(dev_priv); \
                 val = read##y(dev_priv->regs + reg); \
                 if (dev_priv->forcewake_count == 0) \
                         dev_priv->gt.force_wake_put(dev_priv); \
-                spin_unlock_irqrestore(&dev_priv->gt_lock, irqflags); \
         } else { \
                 val = read##y(dev_priv->regs + reg); \
         } \
+        spin_unlock_irqrestore(&dev_priv->gt_lock, irqflags); \
         trace_i915_reg_rw(false, reg, val, sizeof(val)); \
         return val; \
 }
@@ -1280,8 +1280,10 @@ __i915_read(64, q)
 
 #define __i915_write(x, y) \
 void i915_write##x(struct drm_i915_private *dev_priv, u32 reg, u##x val) { \
+        unsigned long irqflags; \
         u32 __fifo_ret = 0; \
         trace_i915_reg_rw(true, reg, val, sizeof(val)); \
+        spin_lock_irqsave(&dev_priv->gt_lock, irqflags); \
         if (NEEDS_FORCE_WAKE((dev_priv), (reg))) { \
                 __fifo_ret = __gen6_gt_wait_for_fifo(dev_priv); \
         } \
@@ -1293,6 +1295,7 @@ void i915_write##x(struct drm_i915_private *dev_priv, u32 reg, u##x val) { \
                 gen6_gt_check_fifodbg(dev_priv); \
         } \
         hsw_unclaimed_reg_check(dev_priv, reg); \
+        spin_unlock_irqrestore(&dev_priv->gt_lock, irqflags); \
 }
 __i915_write(8, b)
 __i915_write(16, w)