diff options
Diffstat (limited to 'drivers/gpu/drm/exynos/exynos_mixer.c')
-rw-r--r-- | drivers/gpu/drm/exynos/exynos_mixer.c | 12 |
1 files changed, 7 insertions, 5 deletions
diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c b/drivers/gpu/drm/exynos/exynos_mixer.c index 68ef01028375..e2147a2ddcec 100644 --- a/drivers/gpu/drm/exynos/exynos_mixer.c +++ b/drivers/gpu/drm/exynos/exynos_mixer.c | |||
@@ -365,7 +365,7 @@ static void vp_video_buffer(struct mixer_context *ctx, int win) | |||
365 | switch (win_data->pixel_format) { | 365 | switch (win_data->pixel_format) { |
366 | case DRM_FORMAT_NV12MT: | 366 | case DRM_FORMAT_NV12MT: |
367 | tiled_mode = true; | 367 | tiled_mode = true; |
368 | case DRM_FORMAT_NV12M: | 368 | case DRM_FORMAT_NV12: |
369 | crcb_mode = false; | 369 | crcb_mode = false; |
370 | buf_num = 2; | 370 | buf_num = 2; |
371 | break; | 371 | break; |
@@ -601,18 +601,20 @@ static void mixer_win_reset(struct mixer_context *ctx) | |||
601 | mixer_reg_write(res, MXR_BG_COLOR2, 0x008080); | 601 | mixer_reg_write(res, MXR_BG_COLOR2, 0x008080); |
602 | 602 | ||
603 | /* setting graphical layers */ | 603 | /* setting graphical layers */ |
604 | |||
605 | val = MXR_GRP_CFG_COLOR_KEY_DISABLE; /* no blank key */ | 604 | val = MXR_GRP_CFG_COLOR_KEY_DISABLE; /* no blank key */ |
606 | val |= MXR_GRP_CFG_WIN_BLEND_EN; | 605 | val |= MXR_GRP_CFG_WIN_BLEND_EN; |
606 | val |= MXR_GRP_CFG_BLEND_PRE_MUL; | ||
607 | val |= MXR_GRP_CFG_PIXEL_BLEND_EN; | ||
607 | val |= MXR_GRP_CFG_ALPHA_VAL(0xff); /* non-transparent alpha */ | 608 | val |= MXR_GRP_CFG_ALPHA_VAL(0xff); /* non-transparent alpha */ |
608 | 609 | ||
609 | /* the same configuration for both layers */ | 610 | /* the same configuration for both layers */ |
610 | mixer_reg_write(res, MXR_GRAPHIC_CFG(0), val); | 611 | mixer_reg_write(res, MXR_GRAPHIC_CFG(0), val); |
611 | |||
612 | val |= MXR_GRP_CFG_BLEND_PRE_MUL; | ||
613 | val |= MXR_GRP_CFG_PIXEL_BLEND_EN; | ||
614 | mixer_reg_write(res, MXR_GRAPHIC_CFG(1), val); | 612 | mixer_reg_write(res, MXR_GRAPHIC_CFG(1), val); |
615 | 613 | ||
614 | /* setting video layers */ | ||
615 | val = MXR_GRP_CFG_ALPHA_VAL(0); | ||
616 | mixer_reg_write(res, MXR_VIDEO_CFG, val); | ||
617 | |||
616 | /* configuration of Video Processor Registers */ | 618 | /* configuration of Video Processor Registers */ |
617 | vp_win_reset(ctx); | 619 | vp_win_reset(ctx); |
618 | vp_default_filter(res); | 620 | vp_default_filter(res); |