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path: root/drivers/gpu/drm/exynos/exynos_hdmi.c
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Diffstat (limited to 'drivers/gpu/drm/exynos/exynos_hdmi.c')
-rw-r--r--drivers/gpu/drm/exynos/exynos_hdmi.c131
1 files changed, 56 insertions, 75 deletions
diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c b/drivers/gpu/drm/exynos/exynos_hdmi.c
index fd1426dca882..62ef5971ac3c 100644
--- a/drivers/gpu/drm/exynos/exynos_hdmi.c
+++ b/drivers/gpu/drm/exynos/exynos_hdmi.c
@@ -83,6 +83,7 @@ struct hdmi_resources {
83 struct clk *sclk_pixel; 83 struct clk *sclk_pixel;
84 struct clk *sclk_hdmiphy; 84 struct clk *sclk_hdmiphy;
85 struct clk *hdmiphy; 85 struct clk *hdmiphy;
86 struct clk *mout_hdmi;
86 struct regulator_bulk_data *regul_bulk; 87 struct regulator_bulk_data *regul_bulk;
87 int regul_count; 88 int regul_count;
88}; 89};
@@ -689,8 +690,6 @@ static void hdmi_reg_infoframe(struct hdmi_context *hdata,
689 u32 mod; 690 u32 mod;
690 u32 vic; 691 u32 vic;
691 692
692 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
693
694 mod = hdmi_reg_read(hdata, HDMI_MODE_SEL); 693 mod = hdmi_reg_read(hdata, HDMI_MODE_SEL);
695 if (hdata->dvi_mode) { 694 if (hdata->dvi_mode) {
696 hdmi_reg_writeb(hdata, HDMI_VSI_CON, 695 hdmi_reg_writeb(hdata, HDMI_VSI_CON,
@@ -755,8 +754,6 @@ static struct edid *hdmi_get_edid(void *ctx, struct drm_connector *connector)
755 struct edid *raw_edid; 754 struct edid *raw_edid;
756 struct hdmi_context *hdata = ctx; 755 struct hdmi_context *hdata = ctx;
757 756
758 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
759
760 if (!hdata->ddc_port) 757 if (!hdata->ddc_port)
761 return ERR_PTR(-ENODEV); 758 return ERR_PTR(-ENODEV);
762 759
@@ -777,8 +774,6 @@ static int hdmi_find_phy_conf(struct hdmi_context *hdata, u32 pixel_clock)
777 const struct hdmiphy_config *confs; 774 const struct hdmiphy_config *confs;
778 int count, i; 775 int count, i;
779 776
780 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
781
782 if (hdata->type == HDMI_TYPE13) { 777 if (hdata->type == HDMI_TYPE13) {
783 confs = hdmiphy_v13_configs; 778 confs = hdmiphy_v13_configs;
784 count = ARRAY_SIZE(hdmiphy_v13_configs); 779 count = ARRAY_SIZE(hdmiphy_v13_configs);
@@ -796,18 +791,17 @@ static int hdmi_find_phy_conf(struct hdmi_context *hdata, u32 pixel_clock)
796 return -EINVAL; 791 return -EINVAL;
797} 792}
798 793
799static int hdmi_check_timing(void *ctx, struct fb_videomode *timing) 794static int hdmi_check_mode(void *ctx, struct drm_display_mode *mode)
800{ 795{
801 struct hdmi_context *hdata = ctx; 796 struct hdmi_context *hdata = ctx;
802 int ret; 797 int ret;
803 798
804 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__); 799 DRM_DEBUG_KMS("xres=%d, yres=%d, refresh=%d, intl=%d clock=%d\n",
800 mode->hdisplay, mode->vdisplay, mode->vrefresh,
801 (mode->flags & DRM_MODE_FLAG_INTERLACE) ? true :
802 false, mode->clock * 1000);
805 803
806 DRM_DEBUG_KMS("[%d]x[%d] [%d]Hz [%x]\n", timing->xres, 804 ret = hdmi_find_phy_conf(hdata, mode->clock * 1000);
807 timing->yres, timing->refresh,
808 timing->vmode);
809
810 ret = hdmi_find_phy_conf(hdata, timing->pixclock);
811 if (ret < 0) 805 if (ret < 0)
812 return ret; 806 return ret;
813 return 0; 807 return 0;
@@ -1042,7 +1036,7 @@ static void hdmi_conf_init(struct hdmi_context *hdata)
1042 } 1036 }
1043} 1037}
1044 1038
1045static void hdmi_v13_timing_apply(struct hdmi_context *hdata) 1039static void hdmi_v13_mode_apply(struct hdmi_context *hdata)
1046{ 1040{
1047 const struct hdmi_tg_regs *tg = &hdata->mode_conf.conf.v13_conf.tg; 1041 const struct hdmi_tg_regs *tg = &hdata->mode_conf.conf.v13_conf.tg;
1048 const struct hdmi_v13_core_regs *core = 1042 const struct hdmi_v13_core_regs *core =
@@ -1118,9 +1112,9 @@ static void hdmi_v13_timing_apply(struct hdmi_context *hdata)
1118 hdmi_regs_dump(hdata, "timing apply"); 1112 hdmi_regs_dump(hdata, "timing apply");
1119 } 1113 }
1120 1114
1121 clk_disable(hdata->res.sclk_hdmi); 1115 clk_disable_unprepare(hdata->res.sclk_hdmi);
1122 clk_set_parent(hdata->res.sclk_hdmi, hdata->res.sclk_hdmiphy); 1116 clk_set_parent(hdata->res.mout_hdmi, hdata->res.sclk_hdmiphy);
1123 clk_enable(hdata->res.sclk_hdmi); 1117 clk_prepare_enable(hdata->res.sclk_hdmi);
1124 1118
1125 /* enable HDMI and timing generator */ 1119 /* enable HDMI and timing generator */
1126 hdmi_reg_writemask(hdata, HDMI_CON_0, ~0, HDMI_EN); 1120 hdmi_reg_writemask(hdata, HDMI_CON_0, ~0, HDMI_EN);
@@ -1131,7 +1125,7 @@ static void hdmi_v13_timing_apply(struct hdmi_context *hdata)
1131 hdmi_reg_writemask(hdata, HDMI_TG_CMD, ~0, HDMI_TG_EN); 1125 hdmi_reg_writemask(hdata, HDMI_TG_CMD, ~0, HDMI_TG_EN);
1132} 1126}
1133 1127
1134static void hdmi_v14_timing_apply(struct hdmi_context *hdata) 1128static void hdmi_v14_mode_apply(struct hdmi_context *hdata)
1135{ 1129{
1136 const struct hdmi_tg_regs *tg = &hdata->mode_conf.conf.v14_conf.tg; 1130 const struct hdmi_tg_regs *tg = &hdata->mode_conf.conf.v14_conf.tg;
1137 const struct hdmi_v14_core_regs *core = 1131 const struct hdmi_v14_core_regs *core =
@@ -1285,9 +1279,9 @@ static void hdmi_v14_timing_apply(struct hdmi_context *hdata)
1285 hdmi_regs_dump(hdata, "timing apply"); 1279 hdmi_regs_dump(hdata, "timing apply");
1286 } 1280 }
1287 1281
1288 clk_disable(hdata->res.sclk_hdmi); 1282 clk_disable_unprepare(hdata->res.sclk_hdmi);
1289 clk_set_parent(hdata->res.sclk_hdmi, hdata->res.sclk_hdmiphy); 1283 clk_set_parent(hdata->res.mout_hdmi, hdata->res.sclk_hdmiphy);
1290 clk_enable(hdata->res.sclk_hdmi); 1284 clk_prepare_enable(hdata->res.sclk_hdmi);
1291 1285
1292 /* enable HDMI and timing generator */ 1286 /* enable HDMI and timing generator */
1293 hdmi_reg_writemask(hdata, HDMI_CON_0, ~0, HDMI_EN); 1287 hdmi_reg_writemask(hdata, HDMI_CON_0, ~0, HDMI_EN);
@@ -1298,12 +1292,12 @@ static void hdmi_v14_timing_apply(struct hdmi_context *hdata)
1298 hdmi_reg_writemask(hdata, HDMI_TG_CMD, ~0, HDMI_TG_EN); 1292 hdmi_reg_writemask(hdata, HDMI_TG_CMD, ~0, HDMI_TG_EN);
1299} 1293}
1300 1294
1301static void hdmi_timing_apply(struct hdmi_context *hdata) 1295static void hdmi_mode_apply(struct hdmi_context *hdata)
1302{ 1296{
1303 if (hdata->type == HDMI_TYPE13) 1297 if (hdata->type == HDMI_TYPE13)
1304 hdmi_v13_timing_apply(hdata); 1298 hdmi_v13_mode_apply(hdata);
1305 else 1299 else
1306 hdmi_v14_timing_apply(hdata); 1300 hdmi_v14_mode_apply(hdata);
1307} 1301}
1308 1302
1309static void hdmiphy_conf_reset(struct hdmi_context *hdata) 1303static void hdmiphy_conf_reset(struct hdmi_context *hdata)
@@ -1311,9 +1305,9 @@ static void hdmiphy_conf_reset(struct hdmi_context *hdata)
1311 u8 buffer[2]; 1305 u8 buffer[2];
1312 u32 reg; 1306 u32 reg;
1313 1307
1314 clk_disable(hdata->res.sclk_hdmi); 1308 clk_disable_unprepare(hdata->res.sclk_hdmi);
1315 clk_set_parent(hdata->res.sclk_hdmi, hdata->res.sclk_pixel); 1309 clk_set_parent(hdata->res.mout_hdmi, hdata->res.sclk_pixel);
1316 clk_enable(hdata->res.sclk_hdmi); 1310 clk_prepare_enable(hdata->res.sclk_hdmi);
1317 1311
1318 /* operation mode */ 1312 /* operation mode */
1319 buffer[0] = 0x1f; 1313 buffer[0] = 0x1f;
@@ -1336,8 +1330,6 @@ static void hdmiphy_conf_reset(struct hdmi_context *hdata)
1336 1330
1337static void hdmiphy_poweron(struct hdmi_context *hdata) 1331static void hdmiphy_poweron(struct hdmi_context *hdata)
1338{ 1332{
1339 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
1340
1341 if (hdata->type == HDMI_TYPE14) 1333 if (hdata->type == HDMI_TYPE14)
1342 hdmi_reg_writemask(hdata, HDMI_PHY_CON_0, 0, 1334 hdmi_reg_writemask(hdata, HDMI_PHY_CON_0, 0,
1343 HDMI_PHY_POWER_OFF_EN); 1335 HDMI_PHY_POWER_OFF_EN);
@@ -1345,8 +1337,6 @@ static void hdmiphy_poweron(struct hdmi_context *hdata)
1345 1337
1346static void hdmiphy_poweroff(struct hdmi_context *hdata) 1338static void hdmiphy_poweroff(struct hdmi_context *hdata)
1347{ 1339{
1348 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
1349
1350 if (hdata->type == HDMI_TYPE14) 1340 if (hdata->type == HDMI_TYPE14)
1351 hdmi_reg_writemask(hdata, HDMI_PHY_CON_0, ~0, 1341 hdmi_reg_writemask(hdata, HDMI_PHY_CON_0, ~0,
1352 HDMI_PHY_POWER_OFF_EN); 1342 HDMI_PHY_POWER_OFF_EN);
@@ -1410,8 +1400,6 @@ static void hdmiphy_conf_apply(struct hdmi_context *hdata)
1410 1400
1411static void hdmi_conf_apply(struct hdmi_context *hdata) 1401static void hdmi_conf_apply(struct hdmi_context *hdata)
1412{ 1402{
1413 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
1414
1415 hdmiphy_conf_reset(hdata); 1403 hdmiphy_conf_reset(hdata);
1416 hdmiphy_conf_apply(hdata); 1404 hdmiphy_conf_apply(hdata);
1417 1405
@@ -1423,7 +1411,7 @@ static void hdmi_conf_apply(struct hdmi_context *hdata)
1423 hdmi_audio_init(hdata); 1411 hdmi_audio_init(hdata);
1424 1412
1425 /* setting core registers */ 1413 /* setting core registers */
1426 hdmi_timing_apply(hdata); 1414 hdmi_mode_apply(hdata);
1427 hdmi_audio_control(hdata, true); 1415 hdmi_audio_control(hdata, true);
1428 1416
1429 hdmi_regs_dump(hdata, "start"); 1417 hdmi_regs_dump(hdata, "start");
@@ -1569,8 +1557,7 @@ static void hdmi_v14_mode_set(struct hdmi_context *hdata,
1569 (m->vsync_start - m->vdisplay) / 2); 1557 (m->vsync_start - m->vdisplay) / 2);
1570 hdmi_set_reg(core->v2_blank, 2, m->vtotal / 2); 1558 hdmi_set_reg(core->v2_blank, 2, m->vtotal / 2);
1571 hdmi_set_reg(core->v1_blank, 2, (m->vtotal - m->vdisplay) / 2); 1559 hdmi_set_reg(core->v1_blank, 2, (m->vtotal - m->vdisplay) / 2);
1572 hdmi_set_reg(core->v_blank_f0, 2, (m->vtotal + 1560 hdmi_set_reg(core->v_blank_f0, 2, m->vtotal - m->vdisplay / 2);
1573 ((m->vsync_end - m->vsync_start) * 4) + 5) / 2);
1574 hdmi_set_reg(core->v_blank_f1, 2, m->vtotal); 1561 hdmi_set_reg(core->v_blank_f1, 2, m->vtotal);
1575 hdmi_set_reg(core->v_sync_line_aft_2, 2, (m->vtotal / 2) + 7); 1562 hdmi_set_reg(core->v_sync_line_aft_2, 2, (m->vtotal / 2) + 7);
1576 hdmi_set_reg(core->v_sync_line_aft_1, 2, (m->vtotal / 2) + 2); 1563 hdmi_set_reg(core->v_sync_line_aft_1, 2, (m->vtotal / 2) + 2);
@@ -1580,7 +1567,10 @@ static void hdmi_v14_mode_set(struct hdmi_context *hdata,
1580 (m->htotal / 2) + (m->hsync_start - m->hdisplay)); 1567 (m->htotal / 2) + (m->hsync_start - m->hdisplay));
1581 hdmi_set_reg(tg->vact_st, 2, (m->vtotal - m->vdisplay) / 2); 1568 hdmi_set_reg(tg->vact_st, 2, (m->vtotal - m->vdisplay) / 2);
1582 hdmi_set_reg(tg->vact_sz, 2, m->vdisplay / 2); 1569 hdmi_set_reg(tg->vact_sz, 2, m->vdisplay / 2);
1583 hdmi_set_reg(tg->vact_st2, 2, 0x249);/* Reset value + 1*/ 1570 hdmi_set_reg(tg->vact_st2, 2, m->vtotal - m->vdisplay / 2);
1571 hdmi_set_reg(tg->vsync2, 2, (m->vtotal / 2) + 1);
1572 hdmi_set_reg(tg->vsync_bot_hdmi, 2, (m->vtotal / 2) + 1);
1573 hdmi_set_reg(tg->field_bot_hdmi, 2, (m->vtotal / 2) + 1);
1584 hdmi_set_reg(tg->vact_st3, 2, 0x0); 1574 hdmi_set_reg(tg->vact_st3, 2, 0x0);
1585 hdmi_set_reg(tg->vact_st4, 2, 0x0); 1575 hdmi_set_reg(tg->vact_st4, 2, 0x0);
1586 } else { 1576 } else {
@@ -1602,6 +1592,9 @@ static void hdmi_v14_mode_set(struct hdmi_context *hdata,
1602 hdmi_set_reg(tg->vact_st2, 2, 0x248); /* Reset value */ 1592 hdmi_set_reg(tg->vact_st2, 2, 0x248); /* Reset value */
1603 hdmi_set_reg(tg->vact_st3, 2, 0x47b); /* Reset value */ 1593 hdmi_set_reg(tg->vact_st3, 2, 0x47b); /* Reset value */
1604 hdmi_set_reg(tg->vact_st4, 2, 0x6ae); /* Reset value */ 1594 hdmi_set_reg(tg->vact_st4, 2, 0x6ae); /* Reset value */
1595 hdmi_set_reg(tg->vsync2, 2, 0x233); /* Reset value */
1596 hdmi_set_reg(tg->vsync_bot_hdmi, 2, 0x233); /* Reset value */
1597 hdmi_set_reg(tg->field_bot_hdmi, 2, 0x233); /* Reset value */
1605 } 1598 }
1606 1599
1607 /* Following values & calculations are same irrespective of mode type */ 1600 /* Following values & calculations are same irrespective of mode type */
@@ -1633,22 +1626,19 @@ static void hdmi_v14_mode_set(struct hdmi_context *hdata,
1633 hdmi_set_reg(tg->hact_sz, 2, m->hdisplay); 1626 hdmi_set_reg(tg->hact_sz, 2, m->hdisplay);
1634 hdmi_set_reg(tg->v_fsz, 2, m->vtotal); 1627 hdmi_set_reg(tg->v_fsz, 2, m->vtotal);
1635 hdmi_set_reg(tg->vsync, 2, 0x1); 1628 hdmi_set_reg(tg->vsync, 2, 0x1);
1636 hdmi_set_reg(tg->vsync2, 2, 0x233); /* Reset value */
1637 hdmi_set_reg(tg->field_chg, 2, 0x233); /* Reset value */ 1629 hdmi_set_reg(tg->field_chg, 2, 0x233); /* Reset value */
1638 hdmi_set_reg(tg->vsync_top_hdmi, 2, 0x1); /* Reset value */ 1630 hdmi_set_reg(tg->vsync_top_hdmi, 2, 0x1); /* Reset value */
1639 hdmi_set_reg(tg->vsync_bot_hdmi, 2, 0x233); /* Reset value */
1640 hdmi_set_reg(tg->field_top_hdmi, 2, 0x1); /* Reset value */ 1631 hdmi_set_reg(tg->field_top_hdmi, 2, 0x1); /* Reset value */
1641 hdmi_set_reg(tg->field_bot_hdmi, 2, 0x233); /* Reset value */
1642 hdmi_set_reg(tg->tg_3d, 1, 0x0); 1632 hdmi_set_reg(tg->tg_3d, 1, 0x0);
1643} 1633}
1644 1634
1645static void hdmi_mode_set(void *ctx, void *mode) 1635static void hdmi_mode_set(void *ctx, struct drm_display_mode *mode)
1646{ 1636{
1647 struct hdmi_context *hdata = ctx; 1637 struct hdmi_context *hdata = ctx;
1648 struct drm_display_mode *m = mode; 1638 struct drm_display_mode *m = mode;
1649 1639
1650 DRM_DEBUG_KMS("[%s]: xres=%d, yres=%d, refresh=%d, intl=%s\n", 1640 DRM_DEBUG_KMS("xres=%d, yres=%d, refresh=%d, intl=%s\n",
1651 __func__, m->hdisplay, m->vdisplay, 1641 m->hdisplay, m->vdisplay,
1652 m->vrefresh, (m->flags & DRM_MODE_FLAG_INTERLACE) ? 1642 m->vrefresh, (m->flags & DRM_MODE_FLAG_INTERLACE) ?
1653 "INTERLACED" : "PROGERESSIVE"); 1643 "INTERLACED" : "PROGERESSIVE");
1654 1644
@@ -1661,8 +1651,6 @@ static void hdmi_mode_set(void *ctx, void *mode)
1661static void hdmi_get_max_resol(void *ctx, unsigned int *width, 1651static void hdmi_get_max_resol(void *ctx, unsigned int *width,
1662 unsigned int *height) 1652 unsigned int *height)
1663{ 1653{
1664 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
1665
1666 *width = MAX_WIDTH; 1654 *width = MAX_WIDTH;
1667 *height = MAX_HEIGHT; 1655 *height = MAX_HEIGHT;
1668} 1656}
@@ -1671,8 +1659,6 @@ static void hdmi_commit(void *ctx)
1671{ 1659{
1672 struct hdmi_context *hdata = ctx; 1660 struct hdmi_context *hdata = ctx;
1673 1661
1674 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
1675
1676 mutex_lock(&hdata->hdmi_mutex); 1662 mutex_lock(&hdata->hdmi_mutex);
1677 if (!hdata->powered) { 1663 if (!hdata->powered) {
1678 mutex_unlock(&hdata->hdmi_mutex); 1664 mutex_unlock(&hdata->hdmi_mutex);
@@ -1687,8 +1673,6 @@ static void hdmi_poweron(struct hdmi_context *hdata)
1687{ 1673{
1688 struct hdmi_resources *res = &hdata->res; 1674 struct hdmi_resources *res = &hdata->res;
1689 1675
1690 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
1691
1692 mutex_lock(&hdata->hdmi_mutex); 1676 mutex_lock(&hdata->hdmi_mutex);
1693 if (hdata->powered) { 1677 if (hdata->powered) {
1694 mutex_unlock(&hdata->hdmi_mutex); 1678 mutex_unlock(&hdata->hdmi_mutex);
@@ -1699,10 +1683,12 @@ static void hdmi_poweron(struct hdmi_context *hdata)
1699 1683
1700 mutex_unlock(&hdata->hdmi_mutex); 1684 mutex_unlock(&hdata->hdmi_mutex);
1701 1685
1702 regulator_bulk_enable(res->regul_count, res->regul_bulk); 1686 if (regulator_bulk_enable(res->regul_count, res->regul_bulk))
1703 clk_enable(res->hdmiphy); 1687 DRM_DEBUG_KMS("failed to enable regulator bulk\n");
1704 clk_enable(res->hdmi); 1688
1705 clk_enable(res->sclk_hdmi); 1689 clk_prepare_enable(res->hdmiphy);
1690 clk_prepare_enable(res->hdmi);
1691 clk_prepare_enable(res->sclk_hdmi);
1706 1692
1707 hdmiphy_poweron(hdata); 1693 hdmiphy_poweron(hdata);
1708} 1694}
@@ -1711,8 +1697,6 @@ static void hdmi_poweroff(struct hdmi_context *hdata)
1711{ 1697{
1712 struct hdmi_resources *res = &hdata->res; 1698 struct hdmi_resources *res = &hdata->res;
1713 1699
1714 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
1715
1716 mutex_lock(&hdata->hdmi_mutex); 1700 mutex_lock(&hdata->hdmi_mutex);
1717 if (!hdata->powered) 1701 if (!hdata->powered)
1718 goto out; 1702 goto out;
@@ -1725,9 +1709,9 @@ static void hdmi_poweroff(struct hdmi_context *hdata)
1725 hdmiphy_conf_reset(hdata); 1709 hdmiphy_conf_reset(hdata);
1726 hdmiphy_poweroff(hdata); 1710 hdmiphy_poweroff(hdata);
1727 1711
1728 clk_disable(res->sclk_hdmi); 1712 clk_disable_unprepare(res->sclk_hdmi);
1729 clk_disable(res->hdmi); 1713 clk_disable_unprepare(res->hdmi);
1730 clk_disable(res->hdmiphy); 1714 clk_disable_unprepare(res->hdmiphy);
1731 regulator_bulk_disable(res->regul_count, res->regul_bulk); 1715 regulator_bulk_disable(res->regul_count, res->regul_bulk);
1732 1716
1733 mutex_lock(&hdata->hdmi_mutex); 1717 mutex_lock(&hdata->hdmi_mutex);
@@ -1742,7 +1726,7 @@ static void hdmi_dpms(void *ctx, int mode)
1742{ 1726{
1743 struct hdmi_context *hdata = ctx; 1727 struct hdmi_context *hdata = ctx;
1744 1728
1745 DRM_DEBUG_KMS("[%d] %s mode %d\n", __LINE__, __func__, mode); 1729 DRM_DEBUG_KMS("mode %d\n", mode);
1746 1730
1747 switch (mode) { 1731 switch (mode) {
1748 case DRM_MODE_DPMS_ON: 1732 case DRM_MODE_DPMS_ON:
@@ -1765,7 +1749,7 @@ static struct exynos_hdmi_ops hdmi_ops = {
1765 /* display */ 1749 /* display */
1766 .is_connected = hdmi_is_connected, 1750 .is_connected = hdmi_is_connected,
1767 .get_edid = hdmi_get_edid, 1751 .get_edid = hdmi_get_edid,
1768 .check_timing = hdmi_check_timing, 1752 .check_mode = hdmi_check_mode,
1769 1753
1770 /* manager */ 1754 /* manager */
1771 .mode_set = hdmi_mode_set, 1755 .mode_set = hdmi_mode_set,
@@ -1831,8 +1815,13 @@ static int hdmi_resources_init(struct hdmi_context *hdata)
1831 DRM_ERROR("failed to get clock 'hdmiphy'\n"); 1815 DRM_ERROR("failed to get clock 'hdmiphy'\n");
1832 goto fail; 1816 goto fail;
1833 } 1817 }
1818 res->mout_hdmi = devm_clk_get(dev, "mout_hdmi");
1819 if (IS_ERR(res->mout_hdmi)) {
1820 DRM_ERROR("failed to get clock 'mout_hdmi'\n");
1821 goto fail;
1822 }
1834 1823
1835 clk_set_parent(res->sclk_hdmi, res->sclk_pixel); 1824 clk_set_parent(res->mout_hdmi, res->sclk_pixel);
1836 1825
1837 res->regul_bulk = devm_kzalloc(dev, ARRAY_SIZE(supply) * 1826 res->regul_bulk = devm_kzalloc(dev, ARRAY_SIZE(supply) *
1838 sizeof(res->regul_bulk[0]), GFP_KERNEL); 1827 sizeof(res->regul_bulk[0]), GFP_KERNEL);
@@ -1877,7 +1866,6 @@ static struct s5p_hdmi_platform_data *drm_hdmi_dt_parse_pdata
1877{ 1866{
1878 struct device_node *np = dev->of_node; 1867 struct device_node *np = dev->of_node;
1879 struct s5p_hdmi_platform_data *pd; 1868 struct s5p_hdmi_platform_data *pd;
1880 enum of_gpio_flags flags;
1881 u32 value; 1869 u32 value;
1882 1870
1883 pd = devm_kzalloc(dev, sizeof(*pd), GFP_KERNEL); 1871 pd = devm_kzalloc(dev, sizeof(*pd), GFP_KERNEL);
@@ -1891,7 +1879,7 @@ static struct s5p_hdmi_platform_data *drm_hdmi_dt_parse_pdata
1891 goto err_data; 1879 goto err_data;
1892 } 1880 }
1893 1881
1894 pd->hpd_gpio = of_get_named_gpio_flags(np, "hpd-gpio", 0, &flags); 1882 pd->hpd_gpio = of_get_named_gpio(np, "hpd-gpio", 0);
1895 1883
1896 return pd; 1884 return pd;
1897 1885
@@ -1930,6 +1918,9 @@ static struct of_device_id hdmi_match_types[] = {
1930 .compatible = "samsung,exynos5-hdmi", 1918 .compatible = "samsung,exynos5-hdmi",
1931 .data = (void *)HDMI_TYPE14, 1919 .data = (void *)HDMI_TYPE14,
1932 }, { 1920 }, {
1921 .compatible = "samsung,exynos4212-hdmi",
1922 .data = (void *)HDMI_TYPE14,
1923 }, {
1933 /* end node */ 1924 /* end node */
1934 } 1925 }
1935}; 1926};
@@ -1944,8 +1935,6 @@ static int hdmi_probe(struct platform_device *pdev)
1944 struct resource *res; 1935 struct resource *res;
1945 int ret; 1936 int ret;
1946 1937
1947 DRM_DEBUG_KMS("[%d]\n", __LINE__);
1948
1949 if (dev->of_node) { 1938 if (dev->of_node) {
1950 pdata = drm_hdmi_dt_parse_pdata(dev); 1939 pdata = drm_hdmi_dt_parse_pdata(dev);
1951 if (IS_ERR(pdata)) { 1940 if (IS_ERR(pdata)) {
@@ -2071,8 +2060,6 @@ static int hdmi_remove(struct platform_device *pdev)
2071{ 2060{
2072 struct device *dev = &pdev->dev; 2061 struct device *dev = &pdev->dev;
2073 2062
2074 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
2075
2076 pm_runtime_disable(dev); 2063 pm_runtime_disable(dev);
2077 2064
2078 /* hdmiphy i2c driver */ 2065 /* hdmiphy i2c driver */
@@ -2089,8 +2076,6 @@ static int hdmi_suspend(struct device *dev)
2089 struct exynos_drm_hdmi_context *ctx = get_hdmi_context(dev); 2076 struct exynos_drm_hdmi_context *ctx = get_hdmi_context(dev);
2090 struct hdmi_context *hdata = ctx->ctx; 2077 struct hdmi_context *hdata = ctx->ctx;
2091 2078
2092 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
2093
2094 disable_irq(hdata->irq); 2079 disable_irq(hdata->irq);
2095 2080
2096 hdata->hpd = false; 2081 hdata->hpd = false;
@@ -2098,7 +2083,7 @@ static int hdmi_suspend(struct device *dev)
2098 drm_helper_hpd_irq_event(ctx->drm_dev); 2083 drm_helper_hpd_irq_event(ctx->drm_dev);
2099 2084
2100 if (pm_runtime_suspended(dev)) { 2085 if (pm_runtime_suspended(dev)) {
2101 DRM_DEBUG_KMS("%s : Already suspended\n", __func__); 2086 DRM_DEBUG_KMS("Already suspended\n");
2102 return 0; 2087 return 0;
2103 } 2088 }
2104 2089
@@ -2112,14 +2097,12 @@ static int hdmi_resume(struct device *dev)
2112 struct exynos_drm_hdmi_context *ctx = get_hdmi_context(dev); 2097 struct exynos_drm_hdmi_context *ctx = get_hdmi_context(dev);
2113 struct hdmi_context *hdata = ctx->ctx; 2098 struct hdmi_context *hdata = ctx->ctx;
2114 2099
2115 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
2116
2117 hdata->hpd = gpio_get_value(hdata->hpd_gpio); 2100 hdata->hpd = gpio_get_value(hdata->hpd_gpio);
2118 2101
2119 enable_irq(hdata->irq); 2102 enable_irq(hdata->irq);
2120 2103
2121 if (!pm_runtime_suspended(dev)) { 2104 if (!pm_runtime_suspended(dev)) {
2122 DRM_DEBUG_KMS("%s : Already resumed\n", __func__); 2105 DRM_DEBUG_KMS("Already resumed\n");
2123 return 0; 2106 return 0;
2124 } 2107 }
2125 2108
@@ -2134,7 +2117,6 @@ static int hdmi_runtime_suspend(struct device *dev)
2134{ 2117{
2135 struct exynos_drm_hdmi_context *ctx = get_hdmi_context(dev); 2118 struct exynos_drm_hdmi_context *ctx = get_hdmi_context(dev);
2136 struct hdmi_context *hdata = ctx->ctx; 2119 struct hdmi_context *hdata = ctx->ctx;
2137 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
2138 2120
2139 hdmi_poweroff(hdata); 2121 hdmi_poweroff(hdata);
2140 2122
@@ -2145,7 +2127,6 @@ static int hdmi_runtime_resume(struct device *dev)
2145{ 2127{
2146 struct exynos_drm_hdmi_context *ctx = get_hdmi_context(dev); 2128 struct exynos_drm_hdmi_context *ctx = get_hdmi_context(dev);
2147 struct hdmi_context *hdata = ctx->ctx; 2129 struct hdmi_context *hdata = ctx->ctx;
2148 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
2149 2130
2150 hdmi_poweron(hdata); 2131 hdmi_poweron(hdata);
2151 2132