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-rw-r--r--drivers/gpu/drm/ast/ast_dp501.c38
-rw-r--r--drivers/gpu/drm/ast/ast_drv.c1
-rw-r--r--drivers/gpu/drm/ast/ast_drv.h12
-rw-r--r--drivers/gpu/drm/ast/ast_fb.c3
-rw-r--r--drivers/gpu/drm/ast/ast_main.c79
-rw-r--r--drivers/gpu/drm/ast/ast_mode.c46
-rw-r--r--drivers/gpu/drm/ast/ast_post.c23
-rw-r--r--drivers/gpu/drm/ast/ast_tables.h38
-rw-r--r--drivers/gpu/drm/ast/ast_ttm.c24
9 files changed, 201 insertions, 63 deletions
diff --git a/drivers/gpu/drm/ast/ast_dp501.c b/drivers/gpu/drm/ast/ast_dp501.c
index 5da4b62285fa..76f07f38b941 100644
--- a/drivers/gpu/drm/ast/ast_dp501.c
+++ b/drivers/gpu/drm/ast/ast_dp501.c
@@ -379,11 +379,39 @@ static bool ast_init_dvo(struct drm_device *dev)
379 return true; 379 return true;
380} 380}
381 381
382
383static void ast_init_analog(struct drm_device *dev)
384{
385 struct ast_private *ast = dev->dev_private;
386 u32 data;
387
388 /*
389 * Set DAC source to VGA mode in SCU2C via the P2A
390 * bridge. First configure the P2U to target the SCU
391 * in case it isn't at this stage.
392 */
393 ast_write32(ast, 0xf004, 0x1e6e0000);
394 ast_write32(ast, 0xf000, 0x1);
395
396 /* Then unlock the SCU with the magic password */
397 ast_write32(ast, 0x12000, 0x1688a8a8);
398 ast_write32(ast, 0x12000, 0x1688a8a8);
399 ast_write32(ast, 0x12000, 0x1688a8a8);
400
401 /* Finally, clear bits [17:16] of SCU2c */
402 data = ast_read32(ast, 0x1202c);
403 data &= 0xfffcffff;
404 ast_write32(ast, 0, data);
405
406 /* Disable DVO */
407 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa3, 0xcf, 0x00);
408}
409
382void ast_init_3rdtx(struct drm_device *dev) 410void ast_init_3rdtx(struct drm_device *dev)
383{ 411{
384 struct ast_private *ast = dev->dev_private; 412 struct ast_private *ast = dev->dev_private;
385 u8 jreg; 413 u8 jreg;
386 u32 data; 414
387 if (ast->chip == AST2300 || ast->chip == AST2400) { 415 if (ast->chip == AST2300 || ast->chip == AST2400) {
388 jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd1, 0xff); 416 jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd1, 0xff);
389 switch (jreg & 0x0e) { 417 switch (jreg & 0x0e) {
@@ -399,12 +427,8 @@ void ast_init_3rdtx(struct drm_device *dev)
399 default: 427 default:
400 if (ast->tx_chip_type == AST_TX_SIL164) 428 if (ast->tx_chip_type == AST_TX_SIL164)
401 ast_init_dvo(dev); 429 ast_init_dvo(dev);
402 else { 430 else
403 ast_write32(ast, 0x12000, 0x1688a8a8); 431 ast_init_analog(dev);
404 data = ast_read32(ast, 0x1202c);
405 data &= 0xfffcffff;
406 ast_write32(ast, 0, data);
407 }
408 } 432 }
409 } 433 }
410} 434}
diff --git a/drivers/gpu/drm/ast/ast_drv.c b/drivers/gpu/drm/ast/ast_drv.c
index f19682a93c24..9a32d9dfdd26 100644
--- a/drivers/gpu/drm/ast/ast_drv.c
+++ b/drivers/gpu/drm/ast/ast_drv.c
@@ -199,6 +199,7 @@ static struct drm_driver driver = {
199 199
200 .load = ast_driver_load, 200 .load = ast_driver_load,
201 .unload = ast_driver_unload, 201 .unload = ast_driver_unload,
202 .set_busid = drm_pci_set_busid,
202 203
203 .fops = &ast_fops, 204 .fops = &ast_fops,
204 .name = DRIVER_NAME, 205 .name = DRIVER_NAME,
diff --git a/drivers/gpu/drm/ast/ast_drv.h b/drivers/gpu/drm/ast/ast_drv.h
index 957d4fabf1e1..86205a28e56b 100644
--- a/drivers/gpu/drm/ast/ast_drv.h
+++ b/drivers/gpu/drm/ast/ast_drv.h
@@ -36,6 +36,8 @@
36#include <drm/ttm/ttm_memory.h> 36#include <drm/ttm/ttm_memory.h>
37#include <drm/ttm/ttm_module.h> 37#include <drm/ttm/ttm_module.h>
38 38
39#include <drm/drm_gem.h>
40
39#include <linux/i2c.h> 41#include <linux/i2c.h>
40#include <linux/i2c-algo-bit.h> 42#include <linux/i2c-algo-bit.h>
41 43
@@ -125,8 +127,9 @@ struct ast_gem_object;
125 127
126#define AST_IO_AR_PORT_WRITE (0x40) 128#define AST_IO_AR_PORT_WRITE (0x40)
127#define AST_IO_MISC_PORT_WRITE (0x42) 129#define AST_IO_MISC_PORT_WRITE (0x42)
130#define AST_IO_VGA_ENABLE_PORT (0x43)
128#define AST_IO_SEQ_PORT (0x44) 131#define AST_IO_SEQ_PORT (0x44)
129#define AST_DAC_INDEX_READ (0x3c7) 132#define AST_IO_DAC_INDEX_READ (0x47)
130#define AST_IO_DAC_INDEX_WRITE (0x48) 133#define AST_IO_DAC_INDEX_WRITE (0x48)
131#define AST_IO_DAC_DATA (0x49) 134#define AST_IO_DAC_DATA (0x49)
132#define AST_IO_GR_PORT (0x4E) 135#define AST_IO_GR_PORT (0x4E)
@@ -134,6 +137,8 @@ struct ast_gem_object;
134#define AST_IO_INPUT_STATUS1_READ (0x5A) 137#define AST_IO_INPUT_STATUS1_READ (0x5A)
135#define AST_IO_MISC_PORT_READ (0x4C) 138#define AST_IO_MISC_PORT_READ (0x4C)
136 139
140#define AST_IO_MM_OFFSET (0x380)
141
137#define __ast_read(x) \ 142#define __ast_read(x) \
138static inline u##x ast_read##x(struct ast_private *ast, u32 reg) { \ 143static inline u##x ast_read##x(struct ast_private *ast, u32 reg) { \
139u##x val = 0;\ 144u##x val = 0;\
@@ -316,7 +321,7 @@ struct ast_bo {
316 struct ttm_placement placement; 321 struct ttm_placement placement;
317 struct ttm_bo_kmap_obj kmap; 322 struct ttm_bo_kmap_obj kmap;
318 struct drm_gem_object gem; 323 struct drm_gem_object gem;
319 u32 placements[3]; 324 struct ttm_place placements[3];
320 int pin_count; 325 int pin_count;
321}; 326};
322#define gem_to_ast_bo(gobj) container_of((gobj), struct ast_bo, gem) 327#define gem_to_ast_bo(gobj) container_of((gobj), struct ast_bo, gem)
@@ -381,6 +386,9 @@ int ast_bo_push_sysram(struct ast_bo *bo);
381int ast_mmap(struct file *filp, struct vm_area_struct *vma); 386int ast_mmap(struct file *filp, struct vm_area_struct *vma);
382 387
383/* ast post */ 388/* ast post */
389void ast_enable_vga(struct drm_device *dev);
390void ast_enable_mmio(struct drm_device *dev);
391bool ast_is_vga_enabled(struct drm_device *dev);
384void ast_post_gpu(struct drm_device *dev); 392void ast_post_gpu(struct drm_device *dev);
385u32 ast_mindwm(struct ast_private *ast, u32 r); 393u32 ast_mindwm(struct ast_private *ast, u32 r);
386void ast_moutdwm(struct ast_private *ast, u32 r, u32 v); 394void ast_moutdwm(struct ast_private *ast, u32 r, u32 v);
diff --git a/drivers/gpu/drm/ast/ast_fb.c b/drivers/gpu/drm/ast/ast_fb.c
index cba45c774552..5c60ae524c45 100644
--- a/drivers/gpu/drm/ast/ast_fb.c
+++ b/drivers/gpu/drm/ast/ast_fb.c
@@ -186,7 +186,8 @@ static int astfb_create_object(struct ast_fbdev *afbdev,
186static int astfb_create(struct drm_fb_helper *helper, 186static int astfb_create(struct drm_fb_helper *helper,
187 struct drm_fb_helper_surface_size *sizes) 187 struct drm_fb_helper_surface_size *sizes)
188{ 188{
189 struct ast_fbdev *afbdev = (struct ast_fbdev *)helper; 189 struct ast_fbdev *afbdev =
190 container_of(helper, struct ast_fbdev, helper);
190 struct drm_device *dev = afbdev->helper.dev; 191 struct drm_device *dev = afbdev->helper.dev;
191 struct drm_mode_fb_cmd2 mode_cmd; 192 struct drm_mode_fb_cmd2 mode_cmd;
192 struct drm_framebuffer *fb; 193 struct drm_framebuffer *fb;
diff --git a/drivers/gpu/drm/ast/ast_main.c b/drivers/gpu/drm/ast/ast_main.c
index b792194e0d9c..035dacc93382 100644
--- a/drivers/gpu/drm/ast/ast_main.c
+++ b/drivers/gpu/drm/ast/ast_main.c
@@ -63,7 +63,7 @@ uint8_t ast_get_index_reg_mask(struct ast_private *ast,
63} 63}
64 64
65 65
66static int ast_detect_chip(struct drm_device *dev) 66static int ast_detect_chip(struct drm_device *dev, bool *need_post)
67{ 67{
68 struct ast_private *ast = dev->dev_private; 68 struct ast_private *ast = dev->dev_private;
69 uint32_t data, jreg; 69 uint32_t data, jreg;
@@ -110,6 +110,21 @@ static int ast_detect_chip(struct drm_device *dev)
110 } 110 }
111 } 111 }
112 112
113 /*
114 * If VGA isn't enabled, we need to enable now or subsequent
115 * access to the scratch registers will fail. We also inform
116 * our caller that it needs to POST the chip
117 * (Assumption: VGA not enabled -> need to POST)
118 */
119 if (!ast_is_vga_enabled(dev)) {
120 ast_enable_vga(dev);
121 ast_enable_mmio(dev);
122 DRM_INFO("VGA not enabled on entry, requesting chip POST\n");
123 *need_post = true;
124 } else
125 *need_post = false;
126
127 /* Check if we support wide screen */
113 switch (ast->chip) { 128 switch (ast->chip) {
114 case AST1180: 129 case AST1180:
115 ast->support_wide_screen = true; 130 ast->support_wide_screen = true;
@@ -125,6 +140,7 @@ static int ast_detect_chip(struct drm_device *dev)
125 ast->support_wide_screen = true; 140 ast->support_wide_screen = true;
126 else { 141 else {
127 ast->support_wide_screen = false; 142 ast->support_wide_screen = false;
143 /* Read SCU7c (silicon revision register) */
128 ast_write32(ast, 0xf004, 0x1e6e0000); 144 ast_write32(ast, 0xf004, 0x1e6e0000);
129 ast_write32(ast, 0xf000, 0x1); 145 ast_write32(ast, 0xf000, 0x1);
130 data = ast_read32(ast, 0x1207c); 146 data = ast_read32(ast, 0x1207c);
@@ -137,11 +153,29 @@ static int ast_detect_chip(struct drm_device *dev)
137 break; 153 break;
138 } 154 }
139 155
156 /* Check 3rd Tx option (digital output afaik) */
140 ast->tx_chip_type = AST_TX_NONE; 157 ast->tx_chip_type = AST_TX_NONE;
141 jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa3, 0xff); 158
142 if (jreg & 0x80) 159 /*
143 ast->tx_chip_type = AST_TX_SIL164; 160 * VGACRA3 Enhanced Color Mode Register, check if DVO is already
161 * enabled, in that case, assume we have a SIL164 TMDS transmitter
162 *
163 * Don't make that assumption if we the chip wasn't enabled and
164 * is at power-on reset, otherwise we'll incorrectly "detect" a
165 * SIL164 when there is none.
166 */
167 if (!*need_post) {
168 jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa3, 0xff);
169 if (jreg & 0x80)
170 ast->tx_chip_type = AST_TX_SIL164;
171 }
172
144 if ((ast->chip == AST2300) || (ast->chip == AST2400)) { 173 if ((ast->chip == AST2300) || (ast->chip == AST2400)) {
174 /*
175 * On AST2300 and 2400, look the configuration set by the SoC in
176 * the SOC scratch register #1 bits 11:8 (interestingly marked
177 * as "reserved" in the spec)
178 */
145 jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd1, 0xff); 179 jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd1, 0xff);
146 switch (jreg) { 180 switch (jreg) {
147 case 0x04: 181 case 0x04:
@@ -162,6 +196,17 @@ static int ast_detect_chip(struct drm_device *dev)
162 } 196 }
163 } 197 }
164 198
199 /* Print stuff for diagnostic purposes */
200 switch(ast->tx_chip_type) {
201 case AST_TX_SIL164:
202 DRM_INFO("Using Sil164 TMDS transmitter\n");
203 break;
204 case AST_TX_DP501:
205 DRM_INFO("Using DP501 DisplayPort transmitter\n");
206 break;
207 default:
208 DRM_INFO("Analog VGA only\n");
209 }
165 return 0; 210 return 0;
166} 211}
167 212
@@ -346,6 +391,7 @@ static u32 ast_get_vram_info(struct drm_device *dev)
346int ast_driver_load(struct drm_device *dev, unsigned long flags) 391int ast_driver_load(struct drm_device *dev, unsigned long flags)
347{ 392{
348 struct ast_private *ast; 393 struct ast_private *ast;
394 bool need_post;
349 int ret = 0; 395 int ret = 0;
350 396
351 ast = kzalloc(sizeof(struct ast_private), GFP_KERNEL); 397 ast = kzalloc(sizeof(struct ast_private), GFP_KERNEL);
@@ -360,13 +406,27 @@ int ast_driver_load(struct drm_device *dev, unsigned long flags)
360 ret = -EIO; 406 ret = -EIO;
361 goto out_free; 407 goto out_free;
362 } 408 }
363 ast->ioregs = pci_iomap(dev->pdev, 2, 0); 409
410 /*
411 * If we don't have IO space at all, use MMIO now and
412 * assume the chip has MMIO enabled by default (rev 0x20
413 * and higher).
414 */
415 if (!(pci_resource_flags(dev->pdev, 2) & IORESOURCE_IO)) {
416 DRM_INFO("platform has no IO space, trying MMIO\n");
417 ast->ioregs = ast->regs + AST_IO_MM_OFFSET;
418 }
419
420 /* "map" IO regs if the above hasn't done so already */
364 if (!ast->ioregs) { 421 if (!ast->ioregs) {
365 ret = -EIO; 422 ast->ioregs = pci_iomap(dev->pdev, 2, 0);
366 goto out_free; 423 if (!ast->ioregs) {
424 ret = -EIO;
425 goto out_free;
426 }
367 } 427 }
368 428
369 ast_detect_chip(dev); 429 ast_detect_chip(dev, &need_post);
370 430
371 if (ast->chip != AST1180) { 431 if (ast->chip != AST1180) {
372 ast_get_dram_info(dev); 432 ast_get_dram_info(dev);
@@ -374,6 +434,9 @@ int ast_driver_load(struct drm_device *dev, unsigned long flags)
374 DRM_INFO("dram %d %d %d %08x\n", ast->mclk, ast->dram_type, ast->dram_bus_width, ast->vram_size); 434 DRM_INFO("dram %d %d %d %08x\n", ast->mclk, ast->dram_type, ast->dram_bus_width, ast->vram_size);
375 } 435 }
376 436
437 if (need_post)
438 ast_post_gpu(dev);
439
377 ret = ast_mm_init(ast); 440 ret = ast_mm_init(ast);
378 if (ret) 441 if (ret)
379 goto out_free; 442 goto out_free;
diff --git a/drivers/gpu/drm/ast/ast_mode.c b/drivers/gpu/drm/ast/ast_mode.c
index 5389350244f2..9dc0fd5c1ea4 100644
--- a/drivers/gpu/drm/ast/ast_mode.c
+++ b/drivers/gpu/drm/ast/ast_mode.c
@@ -80,6 +80,8 @@ static bool ast_get_vbios_mode_info(struct drm_crtc *crtc, struct drm_display_mo
80 struct ast_private *ast = crtc->dev->dev_private; 80 struct ast_private *ast = crtc->dev->dev_private;
81 u32 refresh_rate_index = 0, mode_id, color_index, refresh_rate; 81 u32 refresh_rate_index = 0, mode_id, color_index, refresh_rate;
82 u32 hborder, vborder; 82 u32 hborder, vborder;
83 bool check_sync;
84 struct ast_vbios_enhtable *best = NULL;
83 85
84 switch (crtc->primary->fb->bits_per_pixel) { 86 switch (crtc->primary->fb->bits_per_pixel) {
85 case 8: 87 case 8:
@@ -141,14 +143,34 @@ static bool ast_get_vbios_mode_info(struct drm_crtc *crtc, struct drm_display_mo
141 } 143 }
142 144
143 refresh_rate = drm_mode_vrefresh(mode); 145 refresh_rate = drm_mode_vrefresh(mode);
144 while (vbios_mode->enh_table->refresh_rate < refresh_rate) { 146 check_sync = vbios_mode->enh_table->flags & WideScreenMode;
145 vbios_mode->enh_table++; 147 do {
146 if ((vbios_mode->enh_table->refresh_rate > refresh_rate) || 148 struct ast_vbios_enhtable *loop = vbios_mode->enh_table;
147 (vbios_mode->enh_table->refresh_rate == 0xff)) { 149
148 vbios_mode->enh_table--; 150 while (loop->refresh_rate != 0xff) {
149 break; 151 if ((check_sync) &&
152 (((mode->flags & DRM_MODE_FLAG_NVSYNC) &&
153 (loop->flags & PVSync)) ||
154 ((mode->flags & DRM_MODE_FLAG_PVSYNC) &&
155 (loop->flags & NVSync)) ||
156 ((mode->flags & DRM_MODE_FLAG_NHSYNC) &&
157 (loop->flags & PHSync)) ||
158 ((mode->flags & DRM_MODE_FLAG_PHSYNC) &&
159 (loop->flags & NHSync)))) {
160 loop++;
161 continue;
162 }
163 if (loop->refresh_rate <= refresh_rate
164 && (!best || loop->refresh_rate > best->refresh_rate))
165 best = loop;
166 loop++;
150 } 167 }
151 } 168 if (best || !check_sync)
169 break;
170 check_sync = 0;
171 } while (1);
172 if (best)
173 vbios_mode->enh_table = best;
152 174
153 hborder = (vbios_mode->enh_table->flags & HBorder) ? 8 : 0; 175 hborder = (vbios_mode->enh_table->flags & HBorder) ? 8 : 0;
154 vborder = (vbios_mode->enh_table->flags & VBorder) ? 8 : 0; 176 vborder = (vbios_mode->enh_table->flags & VBorder) ? 8 : 0;
@@ -419,8 +441,10 @@ static void ast_set_sync_reg(struct drm_device *dev, struct drm_display_mode *mo
419 struct ast_private *ast = dev->dev_private; 441 struct ast_private *ast = dev->dev_private;
420 u8 jreg; 442 u8 jreg;
421 443
422 jreg = ast_io_read8(ast, AST_IO_MISC_PORT_READ); 444 jreg = ast_io_read8(ast, AST_IO_MISC_PORT_READ);
423 jreg |= (vbios_mode->enh_table->flags & SyncNN); 445 jreg &= ~0xC0;
446 if (vbios_mode->enh_table->flags & NVSync) jreg |= 0x80;
447 if (vbios_mode->enh_table->flags & NHSync) jreg |= 0x40;
424 ast_io_write8(ast, AST_IO_MISC_PORT_WRITE, jreg); 448 ast_io_write8(ast, AST_IO_MISC_PORT_WRITE, jreg);
425} 449}
426 450
@@ -1080,8 +1104,8 @@ static u32 copy_cursor_image(u8 *src, u8 *dst, int width, int height)
1080 srcdata32[1].ul = *((u32 *)(srcxor + 4)) & 0xf0f0f0f0; 1104 srcdata32[1].ul = *((u32 *)(srcxor + 4)) & 0xf0f0f0f0;
1081 data32.b[0] = srcdata32[0].b[1] | (srcdata32[0].b[0] >> 4); 1105 data32.b[0] = srcdata32[0].b[1] | (srcdata32[0].b[0] >> 4);
1082 data32.b[1] = srcdata32[0].b[3] | (srcdata32[0].b[2] >> 4); 1106 data32.b[1] = srcdata32[0].b[3] | (srcdata32[0].b[2] >> 4);
1083 data32.b[2] = srcdata32[0].b[1] | (srcdata32[1].b[0] >> 4); 1107 data32.b[2] = srcdata32[1].b[1] | (srcdata32[1].b[0] >> 4);
1084 data32.b[3] = srcdata32[0].b[3] | (srcdata32[1].b[2] >> 4); 1108 data32.b[3] = srcdata32[1].b[3] | (srcdata32[1].b[2] >> 4);
1085 1109
1086 writel(data32.ul, dstxor); 1110 writel(data32.ul, dstxor);
1087 csum += data32.ul; 1111 csum += data32.ul;
diff --git a/drivers/gpu/drm/ast/ast_post.c b/drivers/gpu/drm/ast/ast_post.c
index 38d437f3a267..810c51d92b99 100644
--- a/drivers/gpu/drm/ast/ast_post.c
+++ b/drivers/gpu/drm/ast/ast_post.c
@@ -33,18 +33,23 @@
33 33
34static void ast_init_dram_2300(struct drm_device *dev); 34static void ast_init_dram_2300(struct drm_device *dev);
35 35
36static void 36void ast_enable_vga(struct drm_device *dev)
37ast_enable_vga(struct drm_device *dev) 37{
38 struct ast_private *ast = dev->dev_private;
39
40 ast_io_write8(ast, AST_IO_VGA_ENABLE_PORT, 0x01);
41 ast_io_write8(ast, AST_IO_MISC_PORT_WRITE, 0x01);
42}
43
44void ast_enable_mmio(struct drm_device *dev)
38{ 45{
39 struct ast_private *ast = dev->dev_private; 46 struct ast_private *ast = dev->dev_private;
40 47
41 ast_io_write8(ast, 0x43, 0x01); 48 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa1, 0xff, 0x04);
42 ast_io_write8(ast, 0x42, 0x01);
43} 49}
44 50
45#if 0 /* will use later */ 51
46static bool 52bool ast_is_vga_enabled(struct drm_device *dev)
47ast_is_vga_enabled(struct drm_device *dev)
48{ 53{
49 struct ast_private *ast = dev->dev_private; 54 struct ast_private *ast = dev->dev_private;
50 u8 ch; 55 u8 ch;
@@ -52,7 +57,7 @@ ast_is_vga_enabled(struct drm_device *dev)
52 if (ast->chip == AST1180) { 57 if (ast->chip == AST1180) {
53 /* TODO 1180 */ 58 /* TODO 1180 */
54 } else { 59 } else {
55 ch = ast_io_read8(ast, 0x43); 60 ch = ast_io_read8(ast, AST_IO_VGA_ENABLE_PORT);
56 if (ch) { 61 if (ch) {
57 ast_open_key(ast); 62 ast_open_key(ast);
58 ch = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb6, 0xff); 63 ch = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb6, 0xff);
@@ -61,7 +66,6 @@ ast_is_vga_enabled(struct drm_device *dev)
61 } 66 }
62 return 0; 67 return 0;
63} 68}
64#endif
65 69
66static const u8 extreginfo[] = { 0x0f, 0x04, 0x1c, 0xff }; 70static const u8 extreginfo[] = { 0x0f, 0x04, 0x1c, 0xff };
67static const u8 extreginfo_ast2300a0[] = { 0x0f, 0x04, 0x1c, 0xff }; 71static const u8 extreginfo_ast2300a0[] = { 0x0f, 0x04, 0x1c, 0xff };
@@ -371,6 +375,7 @@ void ast_post_gpu(struct drm_device *dev)
371 pci_write_config_dword(ast->dev->pdev, 0x04, reg); 375 pci_write_config_dword(ast->dev->pdev, 0x04, reg);
372 376
373 ast_enable_vga(dev); 377 ast_enable_vga(dev);
378 ast_enable_mmio(dev);
374 ast_open_key(ast); 379 ast_open_key(ast);
375 ast_set_def_ext_reg(dev); 380 ast_set_def_ext_reg(dev);
376 381
diff --git a/drivers/gpu/drm/ast/ast_tables.h b/drivers/gpu/drm/ast/ast_tables.h
index 05c01ea85294..3608d5aa7451 100644
--- a/drivers/gpu/drm/ast/ast_tables.h
+++ b/drivers/gpu/drm/ast/ast_tables.h
@@ -35,14 +35,18 @@
35#define HalfDCLK 0x00000002 35#define HalfDCLK 0x00000002
36#define DoubleScanMode 0x00000004 36#define DoubleScanMode 0x00000004
37#define LineCompareOff 0x00000008 37#define LineCompareOff 0x00000008
38#define SyncPP 0x00000000
39#define SyncPN 0x00000040
40#define SyncNP 0x00000080
41#define SyncNN 0x000000C0
42#define HBorder 0x00000020 38#define HBorder 0x00000020
43#define VBorder 0x00000010 39#define VBorder 0x00000010
44#define WideScreenMode 0x00000100 40#define WideScreenMode 0x00000100
45#define NewModeInfo 0x00000200 41#define NewModeInfo 0x00000200
42#define NHSync 0x00000400
43#define PHSync 0x00000800
44#define NVSync 0x00001000
45#define PVSync 0x00002000
46#define SyncPP (PVSync | PHSync)
47#define SyncPN (PVSync | NHSync)
48#define SyncNP (NVSync | PHSync)
49#define SyncNN (NVSync | NHSync)
46 50
47/* DCLK Index */ 51/* DCLK Index */
48#define VCLK25_175 0x00 52#define VCLK25_175 0x00
@@ -72,6 +76,7 @@
72#define VCLK119 0x17 76#define VCLK119 0x17
73#define VCLK85_5 0x18 77#define VCLK85_5 0x18
74#define VCLK97_75 0x19 78#define VCLK97_75 0x19
79#define VCLK118_25 0x1A
75 80
76static struct ast_vbios_dclk_info dclk_table[] = { 81static struct ast_vbios_dclk_info dclk_table[] = {
77 {0x2C, 0xE7, 0x03}, /* 00: VCLK25_175 */ 82 {0x2C, 0xE7, 0x03}, /* 00: VCLK25_175 */
@@ -100,6 +105,7 @@ static struct ast_vbios_dclk_info dclk_table[] = {
100 {0x77, 0x58, 0x80}, /* 17: VCLK119 */ 105 {0x77, 0x58, 0x80}, /* 17: VCLK119 */
101 {0x32, 0x67, 0x80}, /* 18: VCLK85_5 */ 106 {0x32, 0x67, 0x80}, /* 18: VCLK85_5 */
102 {0x6a, 0x6d, 0x80}, /* 19: VCLK97_75 */ 107 {0x6a, 0x6d, 0x80}, /* 19: VCLK97_75 */
108 {0x3b, 0x2c, 0x81}, /* 1A: VCLK118_25 */
103}; 109};
104 110
105static struct ast_vbios_stdtable vbios_stdtable[] = { 111static struct ast_vbios_stdtable vbios_stdtable[] = {
@@ -246,8 +252,10 @@ static struct ast_vbios_enhtable res_1360x768[] = {
246static struct ast_vbios_enhtable res_1600x900[] = { 252static struct ast_vbios_enhtable res_1600x900[] = {
247 {1760, 1600, 48, 32, 926, 900, 3, 5, VCLK97_75, /* 60Hz CVT RB */ 253 {1760, 1600, 48, 32, 926, 900, 3, 5, VCLK97_75, /* 60Hz CVT RB */
248 (SyncNP | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 60, 1, 0x3A }, 254 (SyncNP | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 60, 1, 0x3A },
249 {1760, 1600, 48, 32, 926, 900, 3, 5, VCLK97_75, /* end */ 255 {2112, 1600, 88,168, 934, 900, 3, 5, VCLK118_25, /* 60Hz CVT */
250 (SyncNP | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 0xFF, 1, 0x3A } 256 (SyncPN | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 60, 2, 0x3A },
257 {2112, 1600, 88,168, 934, 900, 3, 5, VCLK118_25, /* 60Hz CVT */
258 (SyncPN | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 0xFF, 2, 0x3A },
251}; 259};
252 260
253static struct ast_vbios_enhtable res_1920x1080[] = { 261static struct ast_vbios_enhtable res_1920x1080[] = {
@@ -261,11 +269,11 @@ static struct ast_vbios_enhtable res_1920x1080[] = {
261/* 16:10 */ 269/* 16:10 */
262static struct ast_vbios_enhtable res_1280x800[] = { 270static struct ast_vbios_enhtable res_1280x800[] = {
263 {1440, 1280, 48, 32, 823, 800, 3, 6, VCLK71, /* 60Hz RB */ 271 {1440, 1280, 48, 32, 823, 800, 3, 6, VCLK71, /* 60Hz RB */
264 (SyncNP | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 60, 1, 35 }, 272 (SyncNP | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 60, 1, 0x35 },
265 {1680, 1280, 72,128, 831, 800, 3, 6, VCLK83_5, /* 60Hz */ 273 {1680, 1280, 72,128, 831, 800, 3, 6, VCLK83_5, /* 60Hz */
266 (SyncPN | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 60, 1, 0x35 }, 274 (SyncPN | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 60, 2, 0x35 },
267 {1680, 1280, 72,128, 831, 800, 3, 6, VCLK83_5, /* 60Hz */ 275 {1680, 1280, 72,128, 831, 800, 3, 6, VCLK83_5, /* 60Hz */
268 (SyncPN | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 0xFF, 1, 0x35 }, 276 (SyncPN | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 0xFF, 2, 0x35 },
269 277
270}; 278};
271 279
@@ -273,24 +281,24 @@ static struct ast_vbios_enhtable res_1440x900[] = {
273 {1600, 1440, 48, 32, 926, 900, 3, 6, VCLK88_75, /* 60Hz RB */ 281 {1600, 1440, 48, 32, 926, 900, 3, 6, VCLK88_75, /* 60Hz RB */
274 (SyncNP | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 60, 1, 0x36 }, 282 (SyncNP | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 60, 1, 0x36 },
275 {1904, 1440, 80,152, 934, 900, 3, 6, VCLK106_5, /* 60Hz */ 283 {1904, 1440, 80,152, 934, 900, 3, 6, VCLK106_5, /* 60Hz */
276 (SyncPN | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 60, 1, 0x36 }, 284 (SyncPN | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 60, 2, 0x36 },
277 {1904, 1440, 80,152, 934, 900, 3, 6, VCLK106_5, /* 60Hz */ 285 {1904, 1440, 80,152, 934, 900, 3, 6, VCLK106_5, /* 60Hz */
278 (SyncPN | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 0xFF, 1, 0x36 }, 286 (SyncPN | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 0xFF, 2, 0x36 },
279}; 287};
280 288
281static struct ast_vbios_enhtable res_1680x1050[] = { 289static struct ast_vbios_enhtable res_1680x1050[] = {
282 {1840, 1680, 48, 32, 1080, 1050, 3, 6, VCLK119, /* 60Hz RB */ 290 {1840, 1680, 48, 32, 1080, 1050, 3, 6, VCLK119, /* 60Hz RB */
283 (SyncNP | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 60, 1, 0x37 }, 291 (SyncNP | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 60, 1, 0x37 },
284 {2240, 1680,104,176, 1089, 1050, 3, 6, VCLK146_25, /* 60Hz */ 292 {2240, 1680,104,176, 1089, 1050, 3, 6, VCLK146_25, /* 60Hz */
285 (SyncPN | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 60, 1, 0x37 }, 293 (SyncPN | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 60, 2, 0x37 },
286 {2240, 1680,104,176, 1089, 1050, 3, 6, VCLK146_25, /* 60Hz */ 294 {2240, 1680,104,176, 1089, 1050, 3, 6, VCLK146_25, /* 60Hz */
287 (SyncPN | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 0xFF, 1, 0x37 }, 295 (SyncPN | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 0xFF, 2, 0x37 },
288}; 296};
289 297
290static struct ast_vbios_enhtable res_1920x1200[] = { 298static struct ast_vbios_enhtable res_1920x1200[] = {
291 {2080, 1920, 48, 32, 1235, 1200, 3, 6, VCLK154, /* 60Hz */ 299 {2080, 1920, 48, 32, 1235, 1200, 3, 6, VCLK154, /* 60Hz RB*/
292 (SyncNP | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 60, 1, 0x34 }, 300 (SyncNP | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 60, 1, 0x34 },
293 {2080, 1920, 48, 32, 1235, 1200, 3, 6, VCLK154, /* 60Hz */ 301 {2080, 1920, 48, 32, 1235, 1200, 3, 6, VCLK154, /* 60Hz RB */
294 (SyncNP | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 0xFF, 1, 0x34 }, 302 (SyncNP | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 0xFF, 1, 0x34 },
295}; 303};
296 304
diff --git a/drivers/gpu/drm/ast/ast_ttm.c b/drivers/gpu/drm/ast/ast_ttm.c
index b8246227bab0..08f82eae6939 100644
--- a/drivers/gpu/drm/ast/ast_ttm.c
+++ b/drivers/gpu/drm/ast/ast_ttm.c
@@ -293,18 +293,22 @@ void ast_mm_fini(struct ast_private *ast)
293void ast_ttm_placement(struct ast_bo *bo, int domain) 293void ast_ttm_placement(struct ast_bo *bo, int domain)
294{ 294{
295 u32 c = 0; 295 u32 c = 0;
296 bo->placement.fpfn = 0; 296 unsigned i;
297 bo->placement.lpfn = 0; 297
298 bo->placement.placement = bo->placements; 298 bo->placement.placement = bo->placements;
299 bo->placement.busy_placement = bo->placements; 299 bo->placement.busy_placement = bo->placements;
300 if (domain & TTM_PL_FLAG_VRAM) 300 if (domain & TTM_PL_FLAG_VRAM)
301 bo->placements[c++] = TTM_PL_FLAG_WC | TTM_PL_FLAG_UNCACHED | TTM_PL_FLAG_VRAM; 301 bo->placements[c++].flags = TTM_PL_FLAG_WC | TTM_PL_FLAG_UNCACHED | TTM_PL_FLAG_VRAM;
302 if (domain & TTM_PL_FLAG_SYSTEM) 302 if (domain & TTM_PL_FLAG_SYSTEM)
303 bo->placements[c++] = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM; 303 bo->placements[c++].flags = TTM_PL_FLAG_CACHED | TTM_PL_FLAG_SYSTEM;
304 if (!c) 304 if (!c)
305 bo->placements[c++] = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM; 305 bo->placements[c++].flags = TTM_PL_FLAG_CACHED | TTM_PL_FLAG_SYSTEM;
306 bo->placement.num_placement = c; 306 bo->placement.num_placement = c;
307 bo->placement.num_busy_placement = c; 307 bo->placement.num_busy_placement = c;
308 for (i = 0; i < c; ++i) {
309 bo->placements[i].fpfn = 0;
310 bo->placements[i].lpfn = 0;
311 }
308} 312}
309 313
310int ast_bo_create(struct drm_device *dev, int size, int align, 314int ast_bo_create(struct drm_device *dev, int size, int align,
@@ -335,7 +339,7 @@ int ast_bo_create(struct drm_device *dev, int size, int align,
335 ret = ttm_bo_init(&ast->ttm.bdev, &astbo->bo, size, 339 ret = ttm_bo_init(&ast->ttm.bdev, &astbo->bo, size,
336 ttm_bo_type_device, &astbo->placement, 340 ttm_bo_type_device, &astbo->placement,
337 align >> PAGE_SHIFT, false, NULL, acc_size, 341 align >> PAGE_SHIFT, false, NULL, acc_size,
338 NULL, ast_bo_ttm_destroy); 342 NULL, NULL, ast_bo_ttm_destroy);
339 if (ret) 343 if (ret)
340 return ret; 344 return ret;
341 345
@@ -360,7 +364,7 @@ int ast_bo_pin(struct ast_bo *bo, u32 pl_flag, u64 *gpu_addr)
360 364
361 ast_ttm_placement(bo, pl_flag); 365 ast_ttm_placement(bo, pl_flag);
362 for (i = 0; i < bo->placement.num_placement; i++) 366 for (i = 0; i < bo->placement.num_placement; i++)
363 bo->placements[i] |= TTM_PL_FLAG_NO_EVICT; 367 bo->placements[i].flags |= TTM_PL_FLAG_NO_EVICT;
364 ret = ttm_bo_validate(&bo->bo, &bo->placement, false, false); 368 ret = ttm_bo_validate(&bo->bo, &bo->placement, false, false);
365 if (ret) 369 if (ret)
366 return ret; 370 return ret;
@@ -383,7 +387,7 @@ int ast_bo_unpin(struct ast_bo *bo)
383 return 0; 387 return 0;
384 388
385 for (i = 0; i < bo->placement.num_placement ; i++) 389 for (i = 0; i < bo->placement.num_placement ; i++)
386 bo->placements[i] &= ~TTM_PL_FLAG_NO_EVICT; 390 bo->placements[i].flags &= ~TTM_PL_FLAG_NO_EVICT;
387 ret = ttm_bo_validate(&bo->bo, &bo->placement, false, false); 391 ret = ttm_bo_validate(&bo->bo, &bo->placement, false, false);
388 if (ret) 392 if (ret)
389 return ret; 393 return ret;
@@ -407,7 +411,7 @@ int ast_bo_push_sysram(struct ast_bo *bo)
407 411
408 ast_ttm_placement(bo, TTM_PL_FLAG_SYSTEM); 412 ast_ttm_placement(bo, TTM_PL_FLAG_SYSTEM);
409 for (i = 0; i < bo->placement.num_placement ; i++) 413 for (i = 0; i < bo->placement.num_placement ; i++)
410 bo->placements[i] |= TTM_PL_FLAG_NO_EVICT; 414 bo->placements[i].flags |= TTM_PL_FLAG_NO_EVICT;
411 415
412 ret = ttm_bo_validate(&bo->bo, &bo->placement, false, false); 416 ret = ttm_bo_validate(&bo->bo, &bo->placement, false, false);
413 if (ret) { 417 if (ret) {
@@ -423,7 +427,7 @@ int ast_mmap(struct file *filp, struct vm_area_struct *vma)
423 struct ast_private *ast; 427 struct ast_private *ast;
424 428
425 if (unlikely(vma->vm_pgoff < DRM_FILE_PAGE_OFFSET)) 429 if (unlikely(vma->vm_pgoff < DRM_FILE_PAGE_OFFSET))
426 return drm_mmap(filp, vma); 430 return -EINVAL;
427 431
428 file_priv = filp->private_data; 432 file_priv = filp->private_data;
429 ast = file_priv->minor->dev->dev_private; 433 ast = file_priv->minor->dev->dev_private;
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-24 17:24:56 -0400