diff options
Diffstat (limited to 'drivers/gpio')
-rw-r--r-- | drivers/gpio/gpio-davinci.c | 4 | ||||
-rw-r--r-- | drivers/gpio/gpio-msm-v2.c | 4 | ||||
-rw-r--r-- | drivers/gpio/gpio-rcar.c | 3 | ||||
-rw-r--r-- | drivers/gpio/gpio-twl4030.c | 15 |
4 files changed, 19 insertions, 7 deletions
diff --git a/drivers/gpio/gpio-davinci.c b/drivers/gpio/gpio-davinci.c index 8847adf392b7..84be70157ad6 100644 --- a/drivers/gpio/gpio-davinci.c +++ b/drivers/gpio/gpio-davinci.c | |||
@@ -327,7 +327,7 @@ static int gpio_to_irq_unbanked(struct gpio_chip *chip, unsigned offset) | |||
327 | * NOTE: we assume for now that only irqs in the first gpio_chip | 327 | * NOTE: we assume for now that only irqs in the first gpio_chip |
328 | * can provide direct-mapped IRQs to AINTC (up to 32 GPIOs). | 328 | * can provide direct-mapped IRQs to AINTC (up to 32 GPIOs). |
329 | */ | 329 | */ |
330 | if (offset < d->irq_base) | 330 | if (offset < d->gpio_unbanked) |
331 | return d->gpio_irq + offset; | 331 | return d->gpio_irq + offset; |
332 | else | 332 | else |
333 | return -ENODEV; | 333 | return -ENODEV; |
@@ -419,6 +419,8 @@ static int davinci_gpio_irq_setup(struct platform_device *pdev) | |||
419 | 419 | ||
420 | /* pass "bank 0" GPIO IRQs to AINTC */ | 420 | /* pass "bank 0" GPIO IRQs to AINTC */ |
421 | chips[0].chip.to_irq = gpio_to_irq_unbanked; | 421 | chips[0].chip.to_irq = gpio_to_irq_unbanked; |
422 | chips[0].gpio_irq = bank_irq; | ||
423 | chips[0].gpio_unbanked = pdata->gpio_unbanked; | ||
422 | binten = BIT(0); | 424 | binten = BIT(0); |
423 | 425 | ||
424 | /* AINTC handles mask/unmask; GPIO handles triggering */ | 426 | /* AINTC handles mask/unmask; GPIO handles triggering */ |
diff --git a/drivers/gpio/gpio-msm-v2.c b/drivers/gpio/gpio-msm-v2.c index 7b37300973db..2baf0ddf7e02 100644 --- a/drivers/gpio/gpio-msm-v2.c +++ b/drivers/gpio/gpio-msm-v2.c | |||
@@ -252,7 +252,7 @@ static void msm_gpio_irq_mask(struct irq_data *d) | |||
252 | 252 | ||
253 | spin_lock_irqsave(&tlmm_lock, irq_flags); | 253 | spin_lock_irqsave(&tlmm_lock, irq_flags); |
254 | writel(TARGET_PROC_NONE, GPIO_INTR_CFG_SU(gpio)); | 254 | writel(TARGET_PROC_NONE, GPIO_INTR_CFG_SU(gpio)); |
255 | clear_gpio_bits(INTR_RAW_STATUS_EN | INTR_ENABLE, GPIO_INTR_CFG(gpio)); | 255 | clear_gpio_bits(BIT(INTR_RAW_STATUS_EN) | BIT(INTR_ENABLE), GPIO_INTR_CFG(gpio)); |
256 | __clear_bit(gpio, msm_gpio.enabled_irqs); | 256 | __clear_bit(gpio, msm_gpio.enabled_irqs); |
257 | spin_unlock_irqrestore(&tlmm_lock, irq_flags); | 257 | spin_unlock_irqrestore(&tlmm_lock, irq_flags); |
258 | } | 258 | } |
@@ -264,7 +264,7 @@ static void msm_gpio_irq_unmask(struct irq_data *d) | |||
264 | 264 | ||
265 | spin_lock_irqsave(&tlmm_lock, irq_flags); | 265 | spin_lock_irqsave(&tlmm_lock, irq_flags); |
266 | __set_bit(gpio, msm_gpio.enabled_irqs); | 266 | __set_bit(gpio, msm_gpio.enabled_irqs); |
267 | set_gpio_bits(INTR_RAW_STATUS_EN | INTR_ENABLE, GPIO_INTR_CFG(gpio)); | 267 | set_gpio_bits(BIT(INTR_RAW_STATUS_EN) | BIT(INTR_ENABLE), GPIO_INTR_CFG(gpio)); |
268 | writel(TARGET_PROC_SCORPION, GPIO_INTR_CFG_SU(gpio)); | 268 | writel(TARGET_PROC_SCORPION, GPIO_INTR_CFG_SU(gpio)); |
269 | spin_unlock_irqrestore(&tlmm_lock, irq_flags); | 269 | spin_unlock_irqrestore(&tlmm_lock, irq_flags); |
270 | } | 270 | } |
diff --git a/drivers/gpio/gpio-rcar.c b/drivers/gpio/gpio-rcar.c index fe088a30567a..8b7e719a68c3 100644 --- a/drivers/gpio/gpio-rcar.c +++ b/drivers/gpio/gpio-rcar.c | |||
@@ -169,7 +169,8 @@ static irqreturn_t gpio_rcar_irq_handler(int irq, void *dev_id) | |||
169 | u32 pending; | 169 | u32 pending; |
170 | unsigned int offset, irqs_handled = 0; | 170 | unsigned int offset, irqs_handled = 0; |
171 | 171 | ||
172 | while ((pending = gpio_rcar_read(p, INTDT))) { | 172 | while ((pending = gpio_rcar_read(p, INTDT) & |
173 | gpio_rcar_read(p, INTMSK))) { | ||
173 | offset = __ffs(pending); | 174 | offset = __ffs(pending); |
174 | gpio_rcar_write(p, INTCLR, BIT(offset)); | 175 | gpio_rcar_write(p, INTCLR, BIT(offset)); |
175 | generic_handle_irq(irq_find_mapping(p->irq_domain, offset)); | 176 | generic_handle_irq(irq_find_mapping(p->irq_domain, offset)); |
diff --git a/drivers/gpio/gpio-twl4030.c b/drivers/gpio/gpio-twl4030.c index b97d6a6577b9..f9996899c1f2 100644 --- a/drivers/gpio/gpio-twl4030.c +++ b/drivers/gpio/gpio-twl4030.c | |||
@@ -300,7 +300,7 @@ static int twl_direction_in(struct gpio_chip *chip, unsigned offset) | |||
300 | if (offset < TWL4030_GPIO_MAX) | 300 | if (offset < TWL4030_GPIO_MAX) |
301 | ret = twl4030_set_gpio_direction(offset, 1); | 301 | ret = twl4030_set_gpio_direction(offset, 1); |
302 | else | 302 | else |
303 | ret = -EINVAL; | 303 | ret = -EINVAL; /* LED outputs can't be set as input */ |
304 | 304 | ||
305 | if (!ret) | 305 | if (!ret) |
306 | priv->direction &= ~BIT(offset); | 306 | priv->direction &= ~BIT(offset); |
@@ -354,11 +354,20 @@ static void twl_set(struct gpio_chip *chip, unsigned offset, int value) | |||
354 | static int twl_direction_out(struct gpio_chip *chip, unsigned offset, int value) | 354 | static int twl_direction_out(struct gpio_chip *chip, unsigned offset, int value) |
355 | { | 355 | { |
356 | struct gpio_twl4030_priv *priv = to_gpio_twl4030(chip); | 356 | struct gpio_twl4030_priv *priv = to_gpio_twl4030(chip); |
357 | int ret = -EINVAL; | 357 | int ret = 0; |
358 | 358 | ||
359 | mutex_lock(&priv->mutex); | 359 | mutex_lock(&priv->mutex); |
360 | if (offset < TWL4030_GPIO_MAX) | 360 | if (offset < TWL4030_GPIO_MAX) { |
361 | ret = twl4030_set_gpio_direction(offset, 0); | 361 | ret = twl4030_set_gpio_direction(offset, 0); |
362 | if (ret) { | ||
363 | mutex_unlock(&priv->mutex); | ||
364 | return ret; | ||
365 | } | ||
366 | } | ||
367 | |||
368 | /* | ||
369 | * LED gpios i.e. offset >= TWL4030_GPIO_MAX are always output | ||
370 | */ | ||
362 | 371 | ||
363 | priv->direction |= BIT(offset); | 372 | priv->direction |= BIT(offset); |
364 | mutex_unlock(&priv->mutex); | 373 | mutex_unlock(&priv->mutex); |