diff options
Diffstat (limited to 'drivers/gpio')
74 files changed, 2598 insertions, 2806 deletions
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 4a1b5113e527..9de1515e5808 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig | |||
@@ -340,6 +340,13 @@ config GPIO_XILINX | |||
340 | help | 340 | help |
341 | Say yes here to support the Xilinx FPGA GPIO device | 341 | Say yes here to support the Xilinx FPGA GPIO device |
342 | 342 | ||
343 | config GPIO_ZYNQ | ||
344 | tristate "Xilinx Zynq GPIO support" | ||
345 | depends on ARCH_ZYNQ | ||
346 | select GPIOLIB_IRQCHIP | ||
347 | help | ||
348 | Say yes here to support Xilinx Zynq GPIO controller. | ||
349 | |||
343 | config GPIO_XTENSA | 350 | config GPIO_XTENSA |
344 | bool "Xtensa GPIO32 support" | 351 | bool "Xtensa GPIO32 support" |
345 | depends on XTENSA | 352 | depends on XTENSA |
@@ -423,7 +430,7 @@ config GPIO_GE_FPGA | |||
423 | config GPIO_LYNXPOINT | 430 | config GPIO_LYNXPOINT |
424 | tristate "Intel Lynxpoint GPIO support" | 431 | tristate "Intel Lynxpoint GPIO support" |
425 | depends on ACPI && X86 | 432 | depends on ACPI && X86 |
426 | select IRQ_DOMAIN | 433 | select GPIOLIB_IRQCHIP |
427 | help | 434 | help |
428 | driver for GPIO functionality on Intel Lynxpoint PCH chipset | 435 | driver for GPIO functionality on Intel Lynxpoint PCH chipset |
429 | Requires ACPI device enumeration code to set up a platform device. | 436 | Requires ACPI device enumeration code to set up a platform device. |
@@ -450,6 +457,19 @@ config GPIO_ARIZONA | |||
450 | help | 457 | help |
451 | Support for GPIOs on Wolfson Arizona class devices. | 458 | Support for GPIOs on Wolfson Arizona class devices. |
452 | 459 | ||
460 | config GPIO_CRYSTAL_COVE | ||
461 | tristate "GPIO support for Crystal Cove PMIC" | ||
462 | depends on INTEL_SOC_PMIC | ||
463 | select GPIOLIB_IRQCHIP | ||
464 | help | ||
465 | Support for GPIO pins on Crystal Cove PMIC. | ||
466 | |||
467 | Say Yes if you have a Intel SoC based tablet with Crystal Cove PMIC | ||
468 | inside. | ||
469 | |||
470 | This driver can also be built as a module. If so, the module will be | ||
471 | called gpio-crystalcove. | ||
472 | |||
453 | config GPIO_LP3943 | 473 | config GPIO_LP3943 |
454 | tristate "TI/National Semiconductor LP3943 GPIO expander" | 474 | tristate "TI/National Semiconductor LP3943 GPIO expander" |
455 | depends on MFD_LP3943 | 475 | depends on MFD_LP3943 |
@@ -573,6 +593,7 @@ config GPIO_SX150X | |||
573 | config GPIO_STMPE | 593 | config GPIO_STMPE |
574 | bool "STMPE GPIOs" | 594 | bool "STMPE GPIOs" |
575 | depends on MFD_STMPE | 595 | depends on MFD_STMPE |
596 | select GPIOLIB_IRQCHIP | ||
576 | help | 597 | help |
577 | This enables support for the GPIOs found on the STMPE I/O | 598 | This enables support for the GPIOs found on the STMPE I/O |
578 | Expanders. | 599 | Expanders. |
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index d10f6a9d875a..5d024e396622 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile | |||
@@ -4,7 +4,9 @@ ccflags-$(CONFIG_DEBUG_GPIO) += -DDEBUG | |||
4 | 4 | ||
5 | obj-$(CONFIG_GPIO_DEVRES) += devres.o | 5 | obj-$(CONFIG_GPIO_DEVRES) += devres.o |
6 | obj-$(CONFIG_GPIOLIB) += gpiolib.o | 6 | obj-$(CONFIG_GPIOLIB) += gpiolib.o |
7 | obj-$(CONFIG_GPIOLIB) += gpiolib-legacy.o | ||
7 | obj-$(CONFIG_OF_GPIO) += gpiolib-of.o | 8 | obj-$(CONFIG_OF_GPIO) += gpiolib-of.o |
9 | obj-$(CONFIG_GPIO_SYSFS) += gpiolib-sysfs.o | ||
8 | obj-$(CONFIG_GPIO_ACPI) += gpiolib-acpi.o | 10 | obj-$(CONFIG_GPIO_ACPI) += gpiolib-acpi.o |
9 | 11 | ||
10 | # Device drivers. Generally keep list sorted alphabetically | 12 | # Device drivers. Generally keep list sorted alphabetically |
@@ -20,6 +22,7 @@ obj-$(CONFIG_GPIO_BCM_KONA) += gpio-bcm-kona.o | |||
20 | obj-$(CONFIG_GPIO_BT8XX) += gpio-bt8xx.o | 22 | obj-$(CONFIG_GPIO_BT8XX) += gpio-bt8xx.o |
21 | obj-$(CONFIG_GPIO_CLPS711X) += gpio-clps711x.o | 23 | obj-$(CONFIG_GPIO_CLPS711X) += gpio-clps711x.o |
22 | obj-$(CONFIG_GPIO_CS5535) += gpio-cs5535.o | 24 | obj-$(CONFIG_GPIO_CS5535) += gpio-cs5535.o |
25 | obj-$(CONFIG_GPIO_CRYSTAL_COVE) += gpio-crystalcove.o | ||
23 | obj-$(CONFIG_GPIO_DA9052) += gpio-da9052.o | 26 | obj-$(CONFIG_GPIO_DA9052) += gpio-da9052.o |
24 | obj-$(CONFIG_GPIO_DA9055) += gpio-da9055.o | 27 | obj-$(CONFIG_GPIO_DA9055) += gpio-da9055.o |
25 | obj-$(CONFIG_GPIO_DAVINCI) += gpio-davinci.o | 28 | obj-$(CONFIG_GPIO_DAVINCI) += gpio-davinci.o |
@@ -101,3 +104,4 @@ obj-$(CONFIG_GPIO_WM8994) += gpio-wm8994.o | |||
101 | obj-$(CONFIG_GPIO_XILINX) += gpio-xilinx.o | 104 | obj-$(CONFIG_GPIO_XILINX) += gpio-xilinx.o |
102 | obj-$(CONFIG_GPIO_XTENSA) += gpio-xtensa.o | 105 | obj-$(CONFIG_GPIO_XTENSA) += gpio-xtensa.o |
103 | obj-$(CONFIG_GPIO_ZEVIO) += gpio-zevio.o | 106 | obj-$(CONFIG_GPIO_ZEVIO) += gpio-zevio.o |
107 | obj-$(CONFIG_GPIO_ZYNQ) += gpio-zynq.o | ||
diff --git a/drivers/gpio/devres.c b/drivers/gpio/devres.c index 65978cf85f79..41b2f40578d5 100644 --- a/drivers/gpio/devres.c +++ b/drivers/gpio/devres.c | |||
@@ -39,47 +39,53 @@ static int devm_gpiod_match(struct device *dev, void *res, void *data) | |||
39 | * devm_gpiod_get - Resource-managed gpiod_get() | 39 | * devm_gpiod_get - Resource-managed gpiod_get() |
40 | * @dev: GPIO consumer | 40 | * @dev: GPIO consumer |
41 | * @con_id: function within the GPIO consumer | 41 | * @con_id: function within the GPIO consumer |
42 | * @flags: optional GPIO initialization flags | ||
42 | * | 43 | * |
43 | * Managed gpiod_get(). GPIO descriptors returned from this function are | 44 | * Managed gpiod_get(). GPIO descriptors returned from this function are |
44 | * automatically disposed on driver detach. See gpiod_get() for detailed | 45 | * automatically disposed on driver detach. See gpiod_get() for detailed |
45 | * information about behavior and return values. | 46 | * information about behavior and return values. |
46 | */ | 47 | */ |
47 | struct gpio_desc *__must_check devm_gpiod_get(struct device *dev, | 48 | struct gpio_desc *__must_check __devm_gpiod_get(struct device *dev, |
48 | const char *con_id) | 49 | const char *con_id, |
50 | enum gpiod_flags flags) | ||
49 | { | 51 | { |
50 | return devm_gpiod_get_index(dev, con_id, 0); | 52 | return devm_gpiod_get_index(dev, con_id, 0, flags); |
51 | } | 53 | } |
52 | EXPORT_SYMBOL(devm_gpiod_get); | 54 | EXPORT_SYMBOL(__devm_gpiod_get); |
53 | 55 | ||
54 | /** | 56 | /** |
55 | * devm_gpiod_get_optional - Resource-managed gpiod_get_optional() | 57 | * devm_gpiod_get_optional - Resource-managed gpiod_get_optional() |
56 | * @dev: GPIO consumer | 58 | * @dev: GPIO consumer |
57 | * @con_id: function within the GPIO consumer | 59 | * @con_id: function within the GPIO consumer |
60 | * @flags: optional GPIO initialization flags | ||
58 | * | 61 | * |
59 | * Managed gpiod_get_optional(). GPIO descriptors returned from this function | 62 | * Managed gpiod_get_optional(). GPIO descriptors returned from this function |
60 | * are automatically disposed on driver detach. See gpiod_get_optional() for | 63 | * are automatically disposed on driver detach. See gpiod_get_optional() for |
61 | * detailed information about behavior and return values. | 64 | * detailed information about behavior and return values. |
62 | */ | 65 | */ |
63 | struct gpio_desc *__must_check devm_gpiod_get_optional(struct device *dev, | 66 | struct gpio_desc *__must_check __devm_gpiod_get_optional(struct device *dev, |
64 | const char *con_id) | 67 | const char *con_id, |
68 | enum gpiod_flags flags) | ||
65 | { | 69 | { |
66 | return devm_gpiod_get_index_optional(dev, con_id, 0); | 70 | return devm_gpiod_get_index_optional(dev, con_id, 0, flags); |
67 | } | 71 | } |
68 | EXPORT_SYMBOL(devm_gpiod_get_optional); | 72 | EXPORT_SYMBOL(__devm_gpiod_get_optional); |
69 | 73 | ||
70 | /** | 74 | /** |
71 | * devm_gpiod_get_index - Resource-managed gpiod_get_index() | 75 | * devm_gpiod_get_index - Resource-managed gpiod_get_index() |
72 | * @dev: GPIO consumer | 76 | * @dev: GPIO consumer |
73 | * @con_id: function within the GPIO consumer | 77 | * @con_id: function within the GPIO consumer |
74 | * @idx: index of the GPIO to obtain in the consumer | 78 | * @idx: index of the GPIO to obtain in the consumer |
79 | * @flags: optional GPIO initialization flags | ||
75 | * | 80 | * |
76 | * Managed gpiod_get_index(). GPIO descriptors returned from this function are | 81 | * Managed gpiod_get_index(). GPIO descriptors returned from this function are |
77 | * automatically disposed on driver detach. See gpiod_get_index() for detailed | 82 | * automatically disposed on driver detach. See gpiod_get_index() for detailed |
78 | * information about behavior and return values. | 83 | * information about behavior and return values. |
79 | */ | 84 | */ |
80 | struct gpio_desc *__must_check devm_gpiod_get_index(struct device *dev, | 85 | struct gpio_desc *__must_check __devm_gpiod_get_index(struct device *dev, |
81 | const char *con_id, | 86 | const char *con_id, |
82 | unsigned int idx) | 87 | unsigned int idx, |
88 | enum gpiod_flags flags) | ||
83 | { | 89 | { |
84 | struct gpio_desc **dr; | 90 | struct gpio_desc **dr; |
85 | struct gpio_desc *desc; | 91 | struct gpio_desc *desc; |
@@ -89,7 +95,7 @@ struct gpio_desc *__must_check devm_gpiod_get_index(struct device *dev, | |||
89 | if (!dr) | 95 | if (!dr) |
90 | return ERR_PTR(-ENOMEM); | 96 | return ERR_PTR(-ENOMEM); |
91 | 97 | ||
92 | desc = gpiod_get_index(dev, con_id, idx); | 98 | desc = gpiod_get_index(dev, con_id, idx, flags); |
93 | if (IS_ERR(desc)) { | 99 | if (IS_ERR(desc)) { |
94 | devres_free(dr); | 100 | devres_free(dr); |
95 | return desc; | 101 | return desc; |
@@ -100,26 +106,28 @@ struct gpio_desc *__must_check devm_gpiod_get_index(struct device *dev, | |||
100 | 106 | ||
101 | return desc; | 107 | return desc; |
102 | } | 108 | } |
103 | EXPORT_SYMBOL(devm_gpiod_get_index); | 109 | EXPORT_SYMBOL(__devm_gpiod_get_index); |
104 | 110 | ||
105 | /** | 111 | /** |
106 | * devm_gpiod_get_index_optional - Resource-managed gpiod_get_index_optional() | 112 | * devm_gpiod_get_index_optional - Resource-managed gpiod_get_index_optional() |
107 | * @dev: GPIO consumer | 113 | * @dev: GPIO consumer |
108 | * @con_id: function within the GPIO consumer | 114 | * @con_id: function within the GPIO consumer |
109 | * @index: index of the GPIO to obtain in the consumer | 115 | * @index: index of the GPIO to obtain in the consumer |
116 | * @flags: optional GPIO initialization flags | ||
110 | * | 117 | * |
111 | * Managed gpiod_get_index_optional(). GPIO descriptors returned from this | 118 | * Managed gpiod_get_index_optional(). GPIO descriptors returned from this |
112 | * function are automatically disposed on driver detach. See | 119 | * function are automatically disposed on driver detach. See |
113 | * gpiod_get_index_optional() for detailed information about behavior and | 120 | * gpiod_get_index_optional() for detailed information about behavior and |
114 | * return values. | 121 | * return values. |
115 | */ | 122 | */ |
116 | struct gpio_desc *__must_check devm_gpiod_get_index_optional(struct device *dev, | 123 | struct gpio_desc *__must_check __devm_gpiod_get_index_optional(struct device *dev, |
117 | const char *con_id, | 124 | const char *con_id, |
118 | unsigned int index) | 125 | unsigned int index, |
126 | enum gpiod_flags flags) | ||
119 | { | 127 | { |
120 | struct gpio_desc *desc; | 128 | struct gpio_desc *desc; |
121 | 129 | ||
122 | desc = devm_gpiod_get_index(dev, con_id, index); | 130 | desc = devm_gpiod_get_index(dev, con_id, index, flags); |
123 | if (IS_ERR(desc)) { | 131 | if (IS_ERR(desc)) { |
124 | if (PTR_ERR(desc) == -ENOENT) | 132 | if (PTR_ERR(desc) == -ENOENT) |
125 | return NULL; | 133 | return NULL; |
@@ -127,7 +135,7 @@ struct gpio_desc *__must_check devm_gpiod_get_index_optional(struct device *dev, | |||
127 | 135 | ||
128 | return desc; | 136 | return desc; |
129 | } | 137 | } |
130 | EXPORT_SYMBOL(devm_gpiod_get_index_optional); | 138 | EXPORT_SYMBOL(__devm_gpiod_get_index_optional); |
131 | 139 | ||
132 | /** | 140 | /** |
133 | * devm_gpiod_put - Resource-managed gpiod_put() | 141 | * devm_gpiod_put - Resource-managed gpiod_put() |
diff --git a/drivers/gpio/gpio-74x164.c b/drivers/gpio/gpio-74x164.c index e4ae29824c32..e3d968f751f1 100644 --- a/drivers/gpio/gpio-74x164.c +++ b/drivers/gpio/gpio-74x164.c | |||
@@ -167,13 +167,11 @@ exit_destroy: | |||
167 | static int gen_74x164_remove(struct spi_device *spi) | 167 | static int gen_74x164_remove(struct spi_device *spi) |
168 | { | 168 | { |
169 | struct gen_74x164_chip *chip = spi_get_drvdata(spi); | 169 | struct gen_74x164_chip *chip = spi_get_drvdata(spi); |
170 | int ret; | ||
171 | 170 | ||
172 | ret = gpiochip_remove(&chip->gpio_chip); | 171 | gpiochip_remove(&chip->gpio_chip); |
173 | if (!ret) | 172 | mutex_destroy(&chip->lock); |
174 | mutex_destroy(&chip->lock); | ||
175 | 173 | ||
176 | return ret; | 174 | return 0; |
177 | } | 175 | } |
178 | 176 | ||
179 | static const struct of_device_id gen_74x164_dt_ids[] = { | 177 | static const struct of_device_id gen_74x164_dt_ids[] = { |
diff --git a/drivers/gpio/gpio-adnp.c b/drivers/gpio/gpio-adnp.c index b2239d678d01..416b2200d4f1 100644 --- a/drivers/gpio/gpio-adnp.c +++ b/drivers/gpio/gpio-adnp.c | |||
@@ -585,15 +585,8 @@ static int adnp_i2c_remove(struct i2c_client *client) | |||
585 | { | 585 | { |
586 | struct adnp *adnp = i2c_get_clientdata(client); | 586 | struct adnp *adnp = i2c_get_clientdata(client); |
587 | struct device_node *np = client->dev.of_node; | 587 | struct device_node *np = client->dev.of_node; |
588 | int err; | ||
589 | |||
590 | err = gpiochip_remove(&adnp->gpio); | ||
591 | if (err < 0) { | ||
592 | dev_err(&client->dev, "%s failed: %d\n", "gpiochip_remove()", | ||
593 | err); | ||
594 | return err; | ||
595 | } | ||
596 | 588 | ||
589 | gpiochip_remove(&adnp->gpio); | ||
597 | if (of_find_property(np, "interrupt-controller", NULL)) | 590 | if (of_find_property(np, "interrupt-controller", NULL)) |
598 | adnp_irq_teardown(adnp); | 591 | adnp_irq_teardown(adnp); |
599 | 592 | ||
diff --git a/drivers/gpio/gpio-adp5520.c b/drivers/gpio/gpio-adp5520.c index f1ade8fa3218..b08bd169e568 100644 --- a/drivers/gpio/gpio-adp5520.c +++ b/drivers/gpio/gpio-adp5520.c | |||
@@ -167,15 +167,9 @@ err: | |||
167 | static int adp5520_gpio_remove(struct platform_device *pdev) | 167 | static int adp5520_gpio_remove(struct platform_device *pdev) |
168 | { | 168 | { |
169 | struct adp5520_gpio *dev; | 169 | struct adp5520_gpio *dev; |
170 | int ret; | ||
171 | 170 | ||
172 | dev = platform_get_drvdata(pdev); | 171 | dev = platform_get_drvdata(pdev); |
173 | ret = gpiochip_remove(&dev->gpio_chip); | 172 | gpiochip_remove(&dev->gpio_chip); |
174 | if (ret) { | ||
175 | dev_err(&pdev->dev, "%s failed, %d\n", | ||
176 | "gpiochip_remove()", ret); | ||
177 | return ret; | ||
178 | } | ||
179 | 173 | ||
180 | return 0; | 174 | return 0; |
181 | } | 175 | } |
diff --git a/drivers/gpio/gpio-adp5588.c b/drivers/gpio/gpio-adp5588.c index ef19bc33f2bd..3beed6ea8c65 100644 --- a/drivers/gpio/gpio-adp5588.c +++ b/drivers/gpio/gpio-adp5588.c | |||
@@ -470,11 +470,7 @@ static int adp5588_gpio_remove(struct i2c_client *client) | |||
470 | if (dev->irq_base) | 470 | if (dev->irq_base) |
471 | free_irq(dev->client->irq, dev); | 471 | free_irq(dev->client->irq, dev); |
472 | 472 | ||
473 | ret = gpiochip_remove(&dev->gpio_chip); | 473 | gpiochip_remove(&dev->gpio_chip); |
474 | if (ret) { | ||
475 | dev_err(&client->dev, "gpiochip_remove failed %d\n", ret); | ||
476 | return ret; | ||
477 | } | ||
478 | 474 | ||
479 | kfree(dev); | 475 | kfree(dev); |
480 | return 0; | 476 | return 0; |
diff --git a/drivers/gpio/gpio-amd8111.c b/drivers/gpio/gpio-amd8111.c index 94e9992f8904..3c09f1a6872a 100644 --- a/drivers/gpio/gpio-amd8111.c +++ b/drivers/gpio/gpio-amd8111.c | |||
@@ -232,8 +232,7 @@ out: | |||
232 | 232 | ||
233 | static void __exit amd_gpio_exit(void) | 233 | static void __exit amd_gpio_exit(void) |
234 | { | 234 | { |
235 | int err = gpiochip_remove(&gp.chip); | 235 | gpiochip_remove(&gp.chip); |
236 | WARN_ON(err); | ||
237 | ioport_unmap(gp.pm); | 236 | ioport_unmap(gp.pm); |
238 | release_region(gp.pmbase + PMBASE_OFFSET, PMBASE_SIZE); | 237 | release_region(gp.pmbase + PMBASE_OFFSET, PMBASE_SIZE); |
239 | } | 238 | } |
diff --git a/drivers/gpio/gpio-arizona.c b/drivers/gpio/gpio-arizona.c index 29bdff558981..fe369f5c7fa6 100644 --- a/drivers/gpio/gpio-arizona.c +++ b/drivers/gpio/gpio-arizona.c | |||
@@ -149,7 +149,8 @@ static int arizona_gpio_remove(struct platform_device *pdev) | |||
149 | { | 149 | { |
150 | struct arizona_gpio *arizona_gpio = platform_get_drvdata(pdev); | 150 | struct arizona_gpio *arizona_gpio = platform_get_drvdata(pdev); |
151 | 151 | ||
152 | return gpiochip_remove(&arizona_gpio->gpio_chip); | 152 | gpiochip_remove(&arizona_gpio->gpio_chip); |
153 | return 0; | ||
153 | } | 154 | } |
154 | 155 | ||
155 | static struct platform_driver arizona_gpio_driver = { | 156 | static struct platform_driver arizona_gpio_driver = { |
diff --git a/drivers/gpio/gpio-crystalcove.c b/drivers/gpio/gpio-crystalcove.c new file mode 100644 index 000000000000..934462f5bd22 --- /dev/null +++ b/drivers/gpio/gpio-crystalcove.c | |||
@@ -0,0 +1,380 @@ | |||
1 | /* | ||
2 | * gpio-crystalcove.c - Intel Crystal Cove GPIO Driver | ||
3 | * | ||
4 | * Copyright (C) 2012, 2014 Intel Corporation. All rights reserved. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License version | ||
8 | * 2 as published by the Free Software Foundation. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | * | ||
15 | * Author: Yang, Bin <bin.yang@intel.com> | ||
16 | */ | ||
17 | |||
18 | #include <linux/interrupt.h> | ||
19 | #include <linux/platform_device.h> | ||
20 | #include <linux/gpio.h> | ||
21 | #include <linux/seq_file.h> | ||
22 | #include <linux/bitops.h> | ||
23 | #include <linux/regmap.h> | ||
24 | #include <linux/mfd/intel_soc_pmic.h> | ||
25 | |||
26 | #define CRYSTALCOVE_GPIO_NUM 16 | ||
27 | |||
28 | #define UPDATE_IRQ_TYPE BIT(0) | ||
29 | #define UPDATE_IRQ_MASK BIT(1) | ||
30 | |||
31 | #define GPIO0IRQ 0x0b | ||
32 | #define GPIO1IRQ 0x0c | ||
33 | #define MGPIO0IRQS0 0x19 | ||
34 | #define MGPIO1IRQS0 0x1a | ||
35 | #define MGPIO0IRQSX 0x1b | ||
36 | #define MGPIO1IRQSX 0x1c | ||
37 | #define GPIO0P0CTLO 0x2b | ||
38 | #define GPIO0P0CTLI 0x33 | ||
39 | #define GPIO1P0CTLO 0x3b | ||
40 | #define GPIO1P0CTLI 0x43 | ||
41 | |||
42 | #define CTLI_INTCNT_DIS (0) | ||
43 | #define CTLI_INTCNT_NE (1 << 1) | ||
44 | #define CTLI_INTCNT_PE (2 << 1) | ||
45 | #define CTLI_INTCNT_BE (3 << 1) | ||
46 | |||
47 | #define CTLO_DIR_IN (0) | ||
48 | #define CTLO_DIR_OUT (1 << 5) | ||
49 | |||
50 | #define CTLO_DRV_CMOS (0) | ||
51 | #define CTLO_DRV_OD (1 << 4) | ||
52 | |||
53 | #define CTLO_DRV_REN (1 << 3) | ||
54 | |||
55 | #define CTLO_RVAL_2KDW (0) | ||
56 | #define CTLO_RVAL_2KUP (1 << 1) | ||
57 | #define CTLO_RVAL_50KDW (2 << 1) | ||
58 | #define CTLO_RVAL_50KUP (3 << 1) | ||
59 | |||
60 | #define CTLO_INPUT_SET (CTLO_DRV_CMOS | CTLO_DRV_REN | CTLO_RVAL_2KUP) | ||
61 | #define CTLO_OUTPUT_SET (CTLO_DIR_OUT | CTLO_INPUT_SET) | ||
62 | |||
63 | enum ctrl_register { | ||
64 | CTRL_IN, | ||
65 | CTRL_OUT, | ||
66 | }; | ||
67 | |||
68 | /** | ||
69 | * struct crystalcove_gpio - Crystal Cove GPIO controller | ||
70 | * @buslock: for bus lock/sync and unlock. | ||
71 | * @chip: the abstract gpio_chip structure. | ||
72 | * @regmap: the regmap from the parent device. | ||
73 | * @update: pending IRQ setting update, to be written to the chip upon unlock. | ||
74 | * @intcnt_value: the Interrupt Detect value to be written. | ||
75 | * @set_irq_mask: true if the IRQ mask needs to be set, false to clear. | ||
76 | */ | ||
77 | struct crystalcove_gpio { | ||
78 | struct mutex buslock; /* irq_bus_lock */ | ||
79 | struct gpio_chip chip; | ||
80 | struct regmap *regmap; | ||
81 | int update; | ||
82 | int intcnt_value; | ||
83 | bool set_irq_mask; | ||
84 | }; | ||
85 | |||
86 | static inline struct crystalcove_gpio *to_cg(struct gpio_chip *gc) | ||
87 | { | ||
88 | return container_of(gc, struct crystalcove_gpio, chip); | ||
89 | } | ||
90 | |||
91 | static inline int to_reg(int gpio, enum ctrl_register reg_type) | ||
92 | { | ||
93 | int reg; | ||
94 | |||
95 | if (reg_type == CTRL_IN) { | ||
96 | if (gpio < 8) | ||
97 | reg = GPIO0P0CTLI; | ||
98 | else | ||
99 | reg = GPIO1P0CTLI; | ||
100 | } else { | ||
101 | if (gpio < 8) | ||
102 | reg = GPIO0P0CTLO; | ||
103 | else | ||
104 | reg = GPIO1P0CTLO; | ||
105 | } | ||
106 | |||
107 | return reg + gpio % 8; | ||
108 | } | ||
109 | |||
110 | static void crystalcove_update_irq_mask(struct crystalcove_gpio *cg, | ||
111 | int gpio) | ||
112 | { | ||
113 | u8 mirqs0 = gpio < 8 ? MGPIO0IRQS0 : MGPIO1IRQS0; | ||
114 | int mask = BIT(gpio % 8); | ||
115 | |||
116 | if (cg->set_irq_mask) | ||
117 | regmap_update_bits(cg->regmap, mirqs0, mask, mask); | ||
118 | else | ||
119 | regmap_update_bits(cg->regmap, mirqs0, mask, 0); | ||
120 | } | ||
121 | |||
122 | static void crystalcove_update_irq_ctrl(struct crystalcove_gpio *cg, int gpio) | ||
123 | { | ||
124 | int reg = to_reg(gpio, CTRL_IN); | ||
125 | |||
126 | regmap_update_bits(cg->regmap, reg, CTLI_INTCNT_BE, cg->intcnt_value); | ||
127 | } | ||
128 | |||
129 | static int crystalcove_gpio_dir_in(struct gpio_chip *chip, unsigned gpio) | ||
130 | { | ||
131 | struct crystalcove_gpio *cg = to_cg(chip); | ||
132 | |||
133 | return regmap_write(cg->regmap, to_reg(gpio, CTRL_OUT), | ||
134 | CTLO_INPUT_SET); | ||
135 | } | ||
136 | |||
137 | static int crystalcove_gpio_dir_out(struct gpio_chip *chip, unsigned gpio, | ||
138 | int value) | ||
139 | { | ||
140 | struct crystalcove_gpio *cg = to_cg(chip); | ||
141 | |||
142 | return regmap_write(cg->regmap, to_reg(gpio, CTRL_OUT), | ||
143 | CTLO_OUTPUT_SET | value); | ||
144 | } | ||
145 | |||
146 | static int crystalcove_gpio_get(struct gpio_chip *chip, unsigned gpio) | ||
147 | { | ||
148 | struct crystalcove_gpio *cg = to_cg(chip); | ||
149 | int ret; | ||
150 | unsigned int val; | ||
151 | |||
152 | ret = regmap_read(cg->regmap, to_reg(gpio, CTRL_IN), &val); | ||
153 | if (ret) | ||
154 | return ret; | ||
155 | |||
156 | return val & 0x1; | ||
157 | } | ||
158 | |||
159 | static void crystalcove_gpio_set(struct gpio_chip *chip, | ||
160 | unsigned gpio, int value) | ||
161 | { | ||
162 | struct crystalcove_gpio *cg = to_cg(chip); | ||
163 | |||
164 | if (value) | ||
165 | regmap_update_bits(cg->regmap, to_reg(gpio, CTRL_OUT), 1, 1); | ||
166 | else | ||
167 | regmap_update_bits(cg->regmap, to_reg(gpio, CTRL_OUT), 1, 0); | ||
168 | } | ||
169 | |||
170 | static int crystalcove_irq_type(struct irq_data *data, unsigned type) | ||
171 | { | ||
172 | struct crystalcove_gpio *cg = to_cg(irq_data_get_irq_chip_data(data)); | ||
173 | |||
174 | switch (type) { | ||
175 | case IRQ_TYPE_NONE: | ||
176 | cg->intcnt_value = CTLI_INTCNT_DIS; | ||
177 | break; | ||
178 | case IRQ_TYPE_EDGE_BOTH: | ||
179 | cg->intcnt_value = CTLI_INTCNT_BE; | ||
180 | break; | ||
181 | case IRQ_TYPE_EDGE_RISING: | ||
182 | cg->intcnt_value = CTLI_INTCNT_PE; | ||
183 | break; | ||
184 | case IRQ_TYPE_EDGE_FALLING: | ||
185 | cg->intcnt_value = CTLI_INTCNT_NE; | ||
186 | break; | ||
187 | default: | ||
188 | return -EINVAL; | ||
189 | } | ||
190 | |||
191 | cg->update |= UPDATE_IRQ_TYPE; | ||
192 | |||
193 | return 0; | ||
194 | } | ||
195 | |||
196 | static void crystalcove_bus_lock(struct irq_data *data) | ||
197 | { | ||
198 | struct crystalcove_gpio *cg = to_cg(irq_data_get_irq_chip_data(data)); | ||
199 | |||
200 | mutex_lock(&cg->buslock); | ||
201 | } | ||
202 | |||
203 | static void crystalcove_bus_sync_unlock(struct irq_data *data) | ||
204 | { | ||
205 | struct crystalcove_gpio *cg = to_cg(irq_data_get_irq_chip_data(data)); | ||
206 | int gpio = data->hwirq; | ||
207 | |||
208 | if (cg->update & UPDATE_IRQ_TYPE) | ||
209 | crystalcove_update_irq_ctrl(cg, gpio); | ||
210 | if (cg->update & UPDATE_IRQ_MASK) | ||
211 | crystalcove_update_irq_mask(cg, gpio); | ||
212 | cg->update = 0; | ||
213 | |||
214 | mutex_unlock(&cg->buslock); | ||
215 | } | ||
216 | |||
217 | static void crystalcove_irq_unmask(struct irq_data *data) | ||
218 | { | ||
219 | struct crystalcove_gpio *cg = to_cg(irq_data_get_irq_chip_data(data)); | ||
220 | |||
221 | cg->set_irq_mask = false; | ||
222 | cg->update |= UPDATE_IRQ_MASK; | ||
223 | } | ||
224 | |||
225 | static void crystalcove_irq_mask(struct irq_data *data) | ||
226 | { | ||
227 | struct crystalcove_gpio *cg = to_cg(irq_data_get_irq_chip_data(data)); | ||
228 | |||
229 | cg->set_irq_mask = true; | ||
230 | cg->update |= UPDATE_IRQ_MASK; | ||
231 | } | ||
232 | |||
233 | static struct irq_chip crystalcove_irqchip = { | ||
234 | .name = "Crystal Cove", | ||
235 | .irq_mask = crystalcove_irq_mask, | ||
236 | .irq_unmask = crystalcove_irq_unmask, | ||
237 | .irq_set_type = crystalcove_irq_type, | ||
238 | .irq_bus_lock = crystalcove_bus_lock, | ||
239 | .irq_bus_sync_unlock = crystalcove_bus_sync_unlock, | ||
240 | }; | ||
241 | |||
242 | static irqreturn_t crystalcove_gpio_irq_handler(int irq, void *data) | ||
243 | { | ||
244 | struct crystalcove_gpio *cg = data; | ||
245 | unsigned int p0, p1; | ||
246 | int pending; | ||
247 | int gpio; | ||
248 | unsigned int virq; | ||
249 | |||
250 | if (regmap_read(cg->regmap, GPIO0IRQ, &p0) || | ||
251 | regmap_read(cg->regmap, GPIO1IRQ, &p1)) | ||
252 | return IRQ_NONE; | ||
253 | |||
254 | regmap_write(cg->regmap, GPIO0IRQ, p0); | ||
255 | regmap_write(cg->regmap, GPIO1IRQ, p1); | ||
256 | |||
257 | pending = p0 | p1 << 8; | ||
258 | |||
259 | for (gpio = 0; gpio < cg->chip.ngpio; gpio++) { | ||
260 | if (pending & BIT(gpio)) { | ||
261 | virq = irq_find_mapping(cg->chip.irqdomain, gpio); | ||
262 | generic_handle_irq(virq); | ||
263 | } | ||
264 | } | ||
265 | |||
266 | return IRQ_HANDLED; | ||
267 | } | ||
268 | |||
269 | static void crystalcove_gpio_dbg_show(struct seq_file *s, | ||
270 | struct gpio_chip *chip) | ||
271 | { | ||
272 | struct crystalcove_gpio *cg = to_cg(chip); | ||
273 | int gpio, offset; | ||
274 | unsigned int ctlo, ctli, mirqs0, mirqsx, irq; | ||
275 | |||
276 | for (gpio = 0; gpio < cg->chip.ngpio; gpio++) { | ||
277 | regmap_read(cg->regmap, to_reg(gpio, CTRL_OUT), &ctlo); | ||
278 | regmap_read(cg->regmap, to_reg(gpio, CTRL_IN), &ctli); | ||
279 | regmap_read(cg->regmap, gpio < 8 ? MGPIO0IRQS0 : MGPIO1IRQS0, | ||
280 | &mirqs0); | ||
281 | regmap_read(cg->regmap, gpio < 8 ? MGPIO0IRQSX : MGPIO1IRQSX, | ||
282 | &mirqsx); | ||
283 | regmap_read(cg->regmap, gpio < 8 ? GPIO0IRQ : GPIO1IRQ, | ||
284 | &irq); | ||
285 | |||
286 | offset = gpio % 8; | ||
287 | seq_printf(s, " gpio-%-2d %s %s %s %s ctlo=%2x,%s %s %s\n", | ||
288 | gpio, ctlo & CTLO_DIR_OUT ? "out" : "in ", | ||
289 | ctli & 0x1 ? "hi" : "lo", | ||
290 | ctli & CTLI_INTCNT_NE ? "fall" : " ", | ||
291 | ctli & CTLI_INTCNT_PE ? "rise" : " ", | ||
292 | ctlo, | ||
293 | mirqs0 & BIT(offset) ? "s0 mask " : "s0 unmask", | ||
294 | mirqsx & BIT(offset) ? "sx mask " : "sx unmask", | ||
295 | irq & BIT(offset) ? "pending" : " "); | ||
296 | } | ||
297 | } | ||
298 | |||
299 | static int crystalcove_gpio_probe(struct platform_device *pdev) | ||
300 | { | ||
301 | int irq = platform_get_irq(pdev, 0); | ||
302 | struct crystalcove_gpio *cg; | ||
303 | int retval; | ||
304 | struct device *dev = pdev->dev.parent; | ||
305 | struct intel_soc_pmic *pmic = dev_get_drvdata(dev); | ||
306 | |||
307 | if (irq < 0) | ||
308 | return irq; | ||
309 | |||
310 | cg = devm_kzalloc(&pdev->dev, sizeof(*cg), GFP_KERNEL); | ||
311 | if (!cg) | ||
312 | return -ENOMEM; | ||
313 | |||
314 | platform_set_drvdata(pdev, cg); | ||
315 | |||
316 | mutex_init(&cg->buslock); | ||
317 | cg->chip.label = KBUILD_MODNAME; | ||
318 | cg->chip.direction_input = crystalcove_gpio_dir_in; | ||
319 | cg->chip.direction_output = crystalcove_gpio_dir_out; | ||
320 | cg->chip.get = crystalcove_gpio_get; | ||
321 | cg->chip.set = crystalcove_gpio_set; | ||
322 | cg->chip.base = -1; | ||
323 | cg->chip.ngpio = CRYSTALCOVE_GPIO_NUM; | ||
324 | cg->chip.can_sleep = true; | ||
325 | cg->chip.dev = dev; | ||
326 | cg->chip.dbg_show = crystalcove_gpio_dbg_show; | ||
327 | cg->regmap = pmic->regmap; | ||
328 | |||
329 | retval = gpiochip_add(&cg->chip); | ||
330 | if (retval) { | ||
331 | dev_warn(&pdev->dev, "add gpio chip error: %d\n", retval); | ||
332 | return retval; | ||
333 | } | ||
334 | |||
335 | gpiochip_irqchip_add(&cg->chip, &crystalcove_irqchip, 0, | ||
336 | handle_simple_irq, IRQ_TYPE_NONE); | ||
337 | |||
338 | retval = request_threaded_irq(irq, NULL, crystalcove_gpio_irq_handler, | ||
339 | IRQF_ONESHOT, KBUILD_MODNAME, cg); | ||
340 | |||
341 | if (retval) { | ||
342 | dev_warn(&pdev->dev, "request irq failed: %d\n", retval); | ||
343 | goto out_remove_gpio; | ||
344 | } | ||
345 | |||
346 | return 0; | ||
347 | |||
348 | out_remove_gpio: | ||
349 | WARN_ON(gpiochip_remove(&cg->chip)); | ||
350 | return retval; | ||
351 | } | ||
352 | |||
353 | static int crystalcove_gpio_remove(struct platform_device *pdev) | ||
354 | { | ||
355 | struct crystalcove_gpio *cg = platform_get_drvdata(pdev); | ||
356 | int irq = platform_get_irq(pdev, 0); | ||
357 | int err; | ||
358 | |||
359 | err = gpiochip_remove(&cg->chip); | ||
360 | |||
361 | if (irq >= 0) | ||
362 | free_irq(irq, cg); | ||
363 | |||
364 | return err; | ||
365 | } | ||
366 | |||
367 | static struct platform_driver crystalcove_gpio_driver = { | ||
368 | .probe = crystalcove_gpio_probe, | ||
369 | .remove = crystalcove_gpio_remove, | ||
370 | .driver = { | ||
371 | .name = "crystal_cove_gpio", | ||
372 | .owner = THIS_MODULE, | ||
373 | }, | ||
374 | }; | ||
375 | |||
376 | module_platform_driver(crystalcove_gpio_driver); | ||
377 | |||
378 | MODULE_AUTHOR("Yang, Bin <bin.yang@intel.com>"); | ||
379 | MODULE_DESCRIPTION("Intel Crystal Cove GPIO Driver"); | ||
380 | MODULE_LICENSE("GPL v2"); | ||
diff --git a/drivers/gpio/gpio-cs5535.c b/drivers/gpio/gpio-cs5535.c index c0a3aeba6f21..92ec58fa9236 100644 --- a/drivers/gpio/gpio-cs5535.c +++ b/drivers/gpio/gpio-cs5535.c | |||
@@ -358,14 +358,8 @@ done: | |||
358 | static int cs5535_gpio_remove(struct platform_device *pdev) | 358 | static int cs5535_gpio_remove(struct platform_device *pdev) |
359 | { | 359 | { |
360 | struct resource *r; | 360 | struct resource *r; |
361 | int err; | ||
362 | 361 | ||
363 | err = gpiochip_remove(&cs5535_gpio_chip.chip); | 362 | gpiochip_remove(&cs5535_gpio_chip.chip); |
364 | if (err) { | ||
365 | /* uhh? */ | ||
366 | dev_err(&pdev->dev, "unable to remove gpio_chip?\n"); | ||
367 | return err; | ||
368 | } | ||
369 | 363 | ||
370 | r = platform_get_resource(pdev, IORESOURCE_IO, 0); | 364 | r = platform_get_resource(pdev, IORESOURCE_IO, 0); |
371 | release_region(r->start, resource_size(r)); | 365 | release_region(r->start, resource_size(r)); |
diff --git a/drivers/gpio/gpio-da9052.c b/drivers/gpio/gpio-da9052.c index 416cdf786b05..c5bccd4dec96 100644 --- a/drivers/gpio/gpio-da9052.c +++ b/drivers/gpio/gpio-da9052.c | |||
@@ -237,7 +237,8 @@ static int da9052_gpio_remove(struct platform_device *pdev) | |||
237 | { | 237 | { |
238 | struct da9052_gpio *gpio = platform_get_drvdata(pdev); | 238 | struct da9052_gpio *gpio = platform_get_drvdata(pdev); |
239 | 239 | ||
240 | return gpiochip_remove(&gpio->gp); | 240 | gpiochip_remove(&gpio->gp); |
241 | return 0; | ||
241 | } | 242 | } |
242 | 243 | ||
243 | static struct platform_driver da9052_gpio_driver = { | 244 | static struct platform_driver da9052_gpio_driver = { |
diff --git a/drivers/gpio/gpio-da9055.c b/drivers/gpio/gpio-da9055.c index f992997bc301..9167c4331081 100644 --- a/drivers/gpio/gpio-da9055.c +++ b/drivers/gpio/gpio-da9055.c | |||
@@ -174,7 +174,8 @@ static int da9055_gpio_remove(struct platform_device *pdev) | |||
174 | { | 174 | { |
175 | struct da9055_gpio *gpio = platform_get_drvdata(pdev); | 175 | struct da9055_gpio *gpio = platform_get_drvdata(pdev); |
176 | 176 | ||
177 | return gpiochip_remove(&gpio->gp); | 177 | gpiochip_remove(&gpio->gp); |
178 | return 0; | ||
178 | } | 179 | } |
179 | 180 | ||
180 | static struct platform_driver da9055_gpio_driver = { | 181 | static struct platform_driver da9055_gpio_driver = { |
diff --git a/drivers/gpio/gpio-dwapb.c b/drivers/gpio/gpio-dwapb.c index cd3b81435274..d6618a6e2399 100644 --- a/drivers/gpio/gpio-dwapb.c +++ b/drivers/gpio/gpio-dwapb.c | |||
@@ -359,7 +359,7 @@ static void dwapb_gpio_unregister(struct dwapb_gpio *gpio) | |||
359 | 359 | ||
360 | for (m = 0; m < gpio->nr_ports; ++m) | 360 | for (m = 0; m < gpio->nr_ports; ++m) |
361 | if (gpio->ports[m].is_registered) | 361 | if (gpio->ports[m].is_registered) |
362 | WARN_ON(gpiochip_remove(&gpio->ports[m].bgc.gc)); | 362 | gpiochip_remove(&gpio->ports[m].bgc.gc); |
363 | } | 363 | } |
364 | 364 | ||
365 | static int dwapb_gpio_probe(struct platform_device *pdev) | 365 | static int dwapb_gpio_probe(struct platform_device *pdev) |
diff --git a/drivers/gpio/gpio-em.c b/drivers/gpio/gpio-em.c index cde36054c387..fe49ec3cdb7d 100644 --- a/drivers/gpio/gpio-em.c +++ b/drivers/gpio/gpio-em.c | |||
@@ -409,11 +409,8 @@ err0: | |||
409 | static int em_gio_remove(struct platform_device *pdev) | 409 | static int em_gio_remove(struct platform_device *pdev) |
410 | { | 410 | { |
411 | struct em_gio_priv *p = platform_get_drvdata(pdev); | 411 | struct em_gio_priv *p = platform_get_drvdata(pdev); |
412 | int ret; | ||
413 | 412 | ||
414 | ret = gpiochip_remove(&p->gpio_chip); | 413 | gpiochip_remove(&p->gpio_chip); |
415 | if (ret) | ||
416 | return ret; | ||
417 | 414 | ||
418 | irq_domain_remove(p->irq_domain); | 415 | irq_domain_remove(p->irq_domain); |
419 | return 0; | 416 | return 0; |
diff --git a/drivers/gpio/gpio-f7188x.c b/drivers/gpio/gpio-f7188x.c index 8f73ee093739..fd3202f968ff 100644 --- a/drivers/gpio/gpio-f7188x.c +++ b/drivers/gpio/gpio-f7188x.c | |||
@@ -317,13 +317,7 @@ static int f7188x_gpio_probe(struct platform_device *pdev) | |||
317 | err_gpiochip: | 317 | err_gpiochip: |
318 | for (i = i - 1; i >= 0; i--) { | 318 | for (i = i - 1; i >= 0; i--) { |
319 | struct f7188x_gpio_bank *bank = &data->bank[i]; | 319 | struct f7188x_gpio_bank *bank = &data->bank[i]; |
320 | int tmp; | 320 | gpiochip_remove(&bank->chip); |
321 | |||
322 | tmp = gpiochip_remove(&bank->chip); | ||
323 | if (tmp < 0) | ||
324 | dev_err(&pdev->dev, | ||
325 | "Failed to remove gpiochip %d: %d\n", | ||
326 | i, tmp); | ||
327 | } | 321 | } |
328 | 322 | ||
329 | return err; | 323 | return err; |
@@ -331,20 +325,12 @@ err_gpiochip: | |||
331 | 325 | ||
332 | static int f7188x_gpio_remove(struct platform_device *pdev) | 326 | static int f7188x_gpio_remove(struct platform_device *pdev) |
333 | { | 327 | { |
334 | int err; | ||
335 | int i; | 328 | int i; |
336 | struct f7188x_gpio_data *data = platform_get_drvdata(pdev); | 329 | struct f7188x_gpio_data *data = platform_get_drvdata(pdev); |
337 | 330 | ||
338 | for (i = 0; i < data->nr_bank; i++) { | 331 | for (i = 0; i < data->nr_bank; i++) { |
339 | struct f7188x_gpio_bank *bank = &data->bank[i]; | 332 | struct f7188x_gpio_bank *bank = &data->bank[i]; |
340 | 333 | gpiochip_remove(&bank->chip); | |
341 | err = gpiochip_remove(&bank->chip); | ||
342 | if (err) { | ||
343 | dev_err(&pdev->dev, | ||
344 | "Failed to remove GPIO gpiochip %d: %d\n", | ||
345 | i, err); | ||
346 | return err; | ||
347 | } | ||
348 | } | 334 | } |
349 | 335 | ||
350 | return 0; | 336 | return 0; |
diff --git a/drivers/gpio/gpio-generic.c b/drivers/gpio/gpio-generic.c index fea8c82bb8fc..16f6115e5bdb 100644 --- a/drivers/gpio/gpio-generic.c +++ b/drivers/gpio/gpio-generic.c | |||
@@ -398,7 +398,8 @@ static int bgpio_request(struct gpio_chip *chip, unsigned gpio_pin) | |||
398 | 398 | ||
399 | int bgpio_remove(struct bgpio_chip *bgc) | 399 | int bgpio_remove(struct bgpio_chip *bgc) |
400 | { | 400 | { |
401 | return gpiochip_remove(&bgc->gc); | 401 | gpiochip_remove(&bgc->gc); |
402 | return 0; | ||
402 | } | 403 | } |
403 | EXPORT_SYMBOL_GPL(bgpio_remove); | 404 | EXPORT_SYMBOL_GPL(bgpio_remove); |
404 | 405 | ||
diff --git a/drivers/gpio/gpio-grgpio.c b/drivers/gpio/gpio-grgpio.c index 3c3f515b7916..66ad3df9d9cf 100644 --- a/drivers/gpio/gpio-grgpio.c +++ b/drivers/gpio/gpio-grgpio.c | |||
@@ -468,9 +468,7 @@ static int grgpio_remove(struct platform_device *ofdev) | |||
468 | } | 468 | } |
469 | } | 469 | } |
470 | 470 | ||
471 | ret = gpiochip_remove(&priv->bgc.gc); | 471 | gpiochip_remove(&priv->bgc.gc); |
472 | if (ret) | ||
473 | goto out; | ||
474 | 472 | ||
475 | if (priv->domain) | 473 | if (priv->domain) |
476 | irq_domain_remove(priv->domain); | 474 | irq_domain_remove(priv->domain); |
diff --git a/drivers/gpio/gpio-ich.c b/drivers/gpio/gpio-ich.c index 70304220a479..3784e81e7762 100644 --- a/drivers/gpio/gpio-ich.c +++ b/drivers/gpio/gpio-ich.c | |||
@@ -514,14 +514,7 @@ add_err: | |||
514 | 514 | ||
515 | static int ichx_gpio_remove(struct platform_device *pdev) | 515 | static int ichx_gpio_remove(struct platform_device *pdev) |
516 | { | 516 | { |
517 | int err; | 517 | gpiochip_remove(&ichx_priv.chip); |
518 | |||
519 | err = gpiochip_remove(&ichx_priv.chip); | ||
520 | if (err) { | ||
521 | dev_err(&pdev->dev, "%s failed, %d\n", | ||
522 | "gpiochip_remove()", err); | ||
523 | return err; | ||
524 | } | ||
525 | 518 | ||
526 | ichx_gpio_release_regions(ichx_priv.gpio_base, ichx_priv.use_gpio); | 519 | ichx_gpio_release_regions(ichx_priv.gpio_base, ichx_priv.use_gpio); |
527 | if (ichx_priv.pm_base) | 520 | if (ichx_priv.pm_base) |
diff --git a/drivers/gpio/gpio-intel-mid.c b/drivers/gpio/gpio-intel-mid.c index 118a6bf455d9..aa28c65eb6b4 100644 --- a/drivers/gpio/gpio-intel-mid.c +++ b/drivers/gpio/gpio-intel-mid.c | |||
@@ -28,12 +28,10 @@ | |||
28 | #include <linux/stddef.h> | 28 | #include <linux/stddef.h> |
29 | #include <linux/interrupt.h> | 29 | #include <linux/interrupt.h> |
30 | #include <linux/init.h> | 30 | #include <linux/init.h> |
31 | #include <linux/irq.h> | ||
32 | #include <linux/io.h> | 31 | #include <linux/io.h> |
33 | #include <linux/gpio.h> | 32 | #include <linux/gpio/driver.h> |
34 | #include <linux/slab.h> | 33 | #include <linux/slab.h> |
35 | #include <linux/pm_runtime.h> | 34 | #include <linux/pm_runtime.h> |
36 | #include <linux/irqdomain.h> | ||
37 | 35 | ||
38 | #define INTEL_MID_IRQ_TYPE_EDGE (1 << 0) | 36 | #define INTEL_MID_IRQ_TYPE_EDGE (1 << 0) |
39 | #define INTEL_MID_IRQ_TYPE_LEVEL (1 << 1) | 37 | #define INTEL_MID_IRQ_TYPE_LEVEL (1 << 1) |
@@ -78,10 +76,12 @@ struct intel_mid_gpio { | |||
78 | void __iomem *reg_base; | 76 | void __iomem *reg_base; |
79 | spinlock_t lock; | 77 | spinlock_t lock; |
80 | struct pci_dev *pdev; | 78 | struct pci_dev *pdev; |
81 | struct irq_domain *domain; | ||
82 | }; | 79 | }; |
83 | 80 | ||
84 | #define to_intel_gpio_priv(chip) container_of(chip, struct intel_mid_gpio, chip) | 81 | static inline struct intel_mid_gpio *to_intel_gpio_priv(struct gpio_chip *gc) |
82 | { | ||
83 | return container_of(gc, struct intel_mid_gpio, chip); | ||
84 | } | ||
85 | 85 | ||
86 | static void __iomem *gpio_reg(struct gpio_chip *chip, unsigned offset, | 86 | static void __iomem *gpio_reg(struct gpio_chip *chip, unsigned offset, |
87 | enum GPIO_REG reg_type) | 87 | enum GPIO_REG reg_type) |
@@ -182,15 +182,10 @@ static int intel_gpio_direction_output(struct gpio_chip *chip, | |||
182 | return 0; | 182 | return 0; |
183 | } | 183 | } |
184 | 184 | ||
185 | static int intel_gpio_to_irq(struct gpio_chip *chip, unsigned offset) | ||
186 | { | ||
187 | struct intel_mid_gpio *priv = to_intel_gpio_priv(chip); | ||
188 | return irq_create_mapping(priv->domain, offset); | ||
189 | } | ||
190 | |||
191 | static int intel_mid_irq_type(struct irq_data *d, unsigned type) | 185 | static int intel_mid_irq_type(struct irq_data *d, unsigned type) |
192 | { | 186 | { |
193 | struct intel_mid_gpio *priv = irq_data_get_irq_chip_data(d); | 187 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
188 | struct intel_mid_gpio *priv = to_intel_gpio_priv(gc); | ||
194 | u32 gpio = irqd_to_hwirq(d); | 189 | u32 gpio = irqd_to_hwirq(d); |
195 | unsigned long flags; | 190 | unsigned long flags; |
196 | u32 value; | 191 | u32 value; |
@@ -231,33 +226,11 @@ static void intel_mid_irq_mask(struct irq_data *d) | |||
231 | { | 226 | { |
232 | } | 227 | } |
233 | 228 | ||
234 | static int intel_mid_irq_reqres(struct irq_data *d) | ||
235 | { | ||
236 | struct intel_mid_gpio *priv = irq_data_get_irq_chip_data(d); | ||
237 | |||
238 | if (gpio_lock_as_irq(&priv->chip, irqd_to_hwirq(d))) { | ||
239 | dev_err(priv->chip.dev, | ||
240 | "unable to lock HW IRQ %lu for IRQ\n", | ||
241 | irqd_to_hwirq(d)); | ||
242 | return -EINVAL; | ||
243 | } | ||
244 | return 0; | ||
245 | } | ||
246 | |||
247 | static void intel_mid_irq_relres(struct irq_data *d) | ||
248 | { | ||
249 | struct intel_mid_gpio *priv = irq_data_get_irq_chip_data(d); | ||
250 | |||
251 | gpio_unlock_as_irq(&priv->chip, irqd_to_hwirq(d)); | ||
252 | } | ||
253 | |||
254 | static struct irq_chip intel_mid_irqchip = { | 229 | static struct irq_chip intel_mid_irqchip = { |
255 | .name = "INTEL_MID-GPIO", | 230 | .name = "INTEL_MID-GPIO", |
256 | .irq_mask = intel_mid_irq_mask, | 231 | .irq_mask = intel_mid_irq_mask, |
257 | .irq_unmask = intel_mid_irq_unmask, | 232 | .irq_unmask = intel_mid_irq_unmask, |
258 | .irq_set_type = intel_mid_irq_type, | 233 | .irq_set_type = intel_mid_irq_type, |
259 | .irq_request_resources = intel_mid_irq_reqres, | ||
260 | .irq_release_resources = intel_mid_irq_relres, | ||
261 | }; | 234 | }; |
262 | 235 | ||
263 | static const struct intel_mid_gpio_ddata gpio_lincroft = { | 236 | static const struct intel_mid_gpio_ddata gpio_lincroft = { |
@@ -330,8 +303,9 @@ MODULE_DEVICE_TABLE(pci, intel_gpio_ids); | |||
330 | 303 | ||
331 | static void intel_mid_irq_handler(unsigned irq, struct irq_desc *desc) | 304 | static void intel_mid_irq_handler(unsigned irq, struct irq_desc *desc) |
332 | { | 305 | { |
306 | struct gpio_chip *gc = irq_desc_get_handler_data(desc); | ||
307 | struct intel_mid_gpio *priv = to_intel_gpio_priv(gc); | ||
333 | struct irq_data *data = irq_desc_get_irq_data(desc); | 308 | struct irq_data *data = irq_desc_get_irq_data(desc); |
334 | struct intel_mid_gpio *priv = irq_data_get_irq_handler_data(data); | ||
335 | struct irq_chip *chip = irq_data_get_irq_chip(data); | 309 | struct irq_chip *chip = irq_data_get_irq_chip(data); |
336 | u32 base, gpio, mask; | 310 | u32 base, gpio, mask; |
337 | unsigned long pending; | 311 | unsigned long pending; |
@@ -345,7 +319,7 @@ static void intel_mid_irq_handler(unsigned irq, struct irq_desc *desc) | |||
345 | mask = BIT(gpio); | 319 | mask = BIT(gpio); |
346 | /* Clear before handling so we can't lose an edge */ | 320 | /* Clear before handling so we can't lose an edge */ |
347 | writel(mask, gedr); | 321 | writel(mask, gedr); |
348 | generic_handle_irq(irq_find_mapping(priv->domain, | 322 | generic_handle_irq(irq_find_mapping(gc->irqdomain, |
349 | base + gpio)); | 323 | base + gpio)); |
350 | } | 324 | } |
351 | } | 325 | } |
@@ -371,23 +345,6 @@ static void intel_mid_irq_init_hw(struct intel_mid_gpio *priv) | |||
371 | } | 345 | } |
372 | } | 346 | } |
373 | 347 | ||
374 | static int intel_gpio_irq_map(struct irq_domain *d, unsigned int irq, | ||
375 | irq_hw_number_t hwirq) | ||
376 | { | ||
377 | struct intel_mid_gpio *priv = d->host_data; | ||
378 | |||
379 | irq_set_chip_and_handler(irq, &intel_mid_irqchip, handle_simple_irq); | ||
380 | irq_set_chip_data(irq, priv); | ||
381 | irq_set_irq_type(irq, IRQ_TYPE_NONE); | ||
382 | |||
383 | return 0; | ||
384 | } | ||
385 | |||
386 | static const struct irq_domain_ops intel_gpio_irq_ops = { | ||
387 | .map = intel_gpio_irq_map, | ||
388 | .xlate = irq_domain_xlate_twocell, | ||
389 | }; | ||
390 | |||
391 | static int intel_gpio_runtime_idle(struct device *dev) | 348 | static int intel_gpio_runtime_idle(struct device *dev) |
392 | { | 349 | { |
393 | int err = pm_schedule_suspend(dev, 500); | 350 | int err = pm_schedule_suspend(dev, 500); |
@@ -441,7 +398,6 @@ static int intel_gpio_probe(struct pci_dev *pdev, | |||
441 | priv->chip.direction_output = intel_gpio_direction_output; | 398 | priv->chip.direction_output = intel_gpio_direction_output; |
442 | priv->chip.get = intel_gpio_get; | 399 | priv->chip.get = intel_gpio_get; |
443 | priv->chip.set = intel_gpio_set; | 400 | priv->chip.set = intel_gpio_set; |
444 | priv->chip.to_irq = intel_gpio_to_irq; | ||
445 | priv->chip.base = gpio_base; | 401 | priv->chip.base = gpio_base; |
446 | priv->chip.ngpio = ddata->ngpio; | 402 | priv->chip.ngpio = ddata->ngpio; |
447 | priv->chip.can_sleep = false; | 403 | priv->chip.can_sleep = false; |
@@ -449,11 +405,6 @@ static int intel_gpio_probe(struct pci_dev *pdev, | |||
449 | 405 | ||
450 | spin_lock_init(&priv->lock); | 406 | spin_lock_init(&priv->lock); |
451 | 407 | ||
452 | priv->domain = irq_domain_add_simple(pdev->dev.of_node, ddata->ngpio, | ||
453 | irq_base, &intel_gpio_irq_ops, priv); | ||
454 | if (!priv->domain) | ||
455 | return -ENOMEM; | ||
456 | |||
457 | pci_set_drvdata(pdev, priv); | 408 | pci_set_drvdata(pdev, priv); |
458 | retval = gpiochip_add(&priv->chip); | 409 | retval = gpiochip_add(&priv->chip); |
459 | if (retval) { | 410 | if (retval) { |
@@ -461,10 +412,23 @@ static int intel_gpio_probe(struct pci_dev *pdev, | |||
461 | return retval; | 412 | return retval; |
462 | } | 413 | } |
463 | 414 | ||
415 | retval = gpiochip_irqchip_add(&priv->chip, | ||
416 | &intel_mid_irqchip, | ||
417 | irq_base, | ||
418 | handle_simple_irq, | ||
419 | IRQ_TYPE_NONE); | ||
420 | if (retval) { | ||
421 | dev_err(&pdev->dev, | ||
422 | "could not connect irqchip to gpiochip\n"); | ||
423 | return retval; | ||
424 | } | ||
425 | |||
464 | intel_mid_irq_init_hw(priv); | 426 | intel_mid_irq_init_hw(priv); |
465 | 427 | ||
466 | irq_set_handler_data(pdev->irq, priv); | 428 | gpiochip_set_chained_irqchip(&priv->chip, |
467 | irq_set_chained_handler(pdev->irq, intel_mid_irq_handler); | 429 | &intel_mid_irqchip, |
430 | pdev->irq, | ||
431 | intel_mid_irq_handler); | ||
468 | 432 | ||
469 | pm_runtime_put_noidle(&pdev->dev); | 433 | pm_runtime_put_noidle(&pdev->dev); |
470 | pm_runtime_allow(&pdev->dev); | 434 | pm_runtime_allow(&pdev->dev); |
diff --git a/drivers/gpio/gpio-it8761e.c b/drivers/gpio/gpio-it8761e.c index 278b81317010..dadfc245cf09 100644 --- a/drivers/gpio/gpio-it8761e.c +++ b/drivers/gpio/gpio-it8761e.c | |||
@@ -217,11 +217,7 @@ gpiochip_add_err: | |||
217 | static void __exit it8761e_gpio_exit(void) | 217 | static void __exit it8761e_gpio_exit(void) |
218 | { | 218 | { |
219 | if (gpio_ba) { | 219 | if (gpio_ba) { |
220 | int ret = gpiochip_remove(&it8761e_gpio_chip); | 220 | gpiochip_remove(&it8761e_gpio_chip); |
221 | |||
222 | WARN(ret, "%s(): gpiochip_remove() failed, ret=%d\n", | ||
223 | __func__, ret); | ||
224 | |||
225 | release_region(gpio_ba, GPIO_IOSIZE); | 221 | release_region(gpio_ba, GPIO_IOSIZE); |
226 | gpio_ba = 0; | 222 | gpio_ba = 0; |
227 | } | 223 | } |
diff --git a/drivers/gpio/gpio-janz-ttl.c b/drivers/gpio/gpio-janz-ttl.c index 42852eaaf020..29ffe22ad97a 100644 --- a/drivers/gpio/gpio-janz-ttl.c +++ b/drivers/gpio/gpio-janz-ttl.c | |||
@@ -194,14 +194,8 @@ static int ttl_probe(struct platform_device *pdev) | |||
194 | static int ttl_remove(struct platform_device *pdev) | 194 | static int ttl_remove(struct platform_device *pdev) |
195 | { | 195 | { |
196 | struct ttl_module *mod = platform_get_drvdata(pdev); | 196 | struct ttl_module *mod = platform_get_drvdata(pdev); |
197 | struct device *dev = &pdev->dev; | ||
198 | int ret; | ||
199 | 197 | ||
200 | ret = gpiochip_remove(&mod->gpio); | 198 | gpiochip_remove(&mod->gpio); |
201 | if (ret) { | ||
202 | dev_err(dev, "unable to remove GPIO chip\n"); | ||
203 | return ret; | ||
204 | } | ||
205 | 199 | ||
206 | return 0; | 200 | return 0; |
207 | } | 201 | } |
diff --git a/drivers/gpio/gpio-kempld.c b/drivers/gpio/gpio-kempld.c index 1e5e51987d31..fd150adeebf9 100644 --- a/drivers/gpio/gpio-kempld.c +++ b/drivers/gpio/gpio-kempld.c | |||
@@ -199,7 +199,8 @@ static int kempld_gpio_remove(struct platform_device *pdev) | |||
199 | { | 199 | { |
200 | struct kempld_gpio_data *gpio = platform_get_drvdata(pdev); | 200 | struct kempld_gpio_data *gpio = platform_get_drvdata(pdev); |
201 | 201 | ||
202 | return gpiochip_remove(&gpio->chip); | 202 | gpiochip_remove(&gpio->chip); |
203 | return 0; | ||
203 | } | 204 | } |
204 | 205 | ||
205 | static struct platform_driver kempld_gpio_driver = { | 206 | static struct platform_driver kempld_gpio_driver = { |
diff --git a/drivers/gpio/gpio-lp3943.c b/drivers/gpio/gpio-lp3943.c index a0341c92bcb4..6bbdad805b78 100644 --- a/drivers/gpio/gpio-lp3943.c +++ b/drivers/gpio/gpio-lp3943.c | |||
@@ -216,7 +216,8 @@ static int lp3943_gpio_remove(struct platform_device *pdev) | |||
216 | { | 216 | { |
217 | struct lp3943_gpio *lp3943_gpio = platform_get_drvdata(pdev); | 217 | struct lp3943_gpio *lp3943_gpio = platform_get_drvdata(pdev); |
218 | 218 | ||
219 | return gpiochip_remove(&lp3943_gpio->chip); | 219 | gpiochip_remove(&lp3943_gpio->chip); |
220 | return 0; | ||
220 | } | 221 | } |
221 | 222 | ||
222 | static const struct of_device_id lp3943_gpio_of_match[] = { | 223 | static const struct of_device_id lp3943_gpio_of_match[] = { |
diff --git a/drivers/gpio/gpio-lpc32xx.c b/drivers/gpio/gpio-lpc32xx.c index 225344d66404..b9b9799b368b 100644 --- a/drivers/gpio/gpio-lpc32xx.c +++ b/drivers/gpio/gpio-lpc32xx.c | |||
@@ -560,7 +560,7 @@ static int lpc32xx_gpio_probe(struct platform_device *pdev) | |||
560 | } | 560 | } |
561 | 561 | ||
562 | #ifdef CONFIG_OF | 562 | #ifdef CONFIG_OF |
563 | static struct of_device_id lpc32xx_gpio_of_match[] = { | 563 | static const struct of_device_id lpc32xx_gpio_of_match[] = { |
564 | { .compatible = "nxp,lpc3220-gpio", }, | 564 | { .compatible = "nxp,lpc3220-gpio", }, |
565 | { }, | 565 | { }, |
566 | }; | 566 | }; |
diff --git a/drivers/gpio/gpio-lynxpoint.c b/drivers/gpio/gpio-lynxpoint.c index 2bea89b72508..ff9eb911b5e4 100644 --- a/drivers/gpio/gpio-lynxpoint.c +++ b/drivers/gpio/gpio-lynxpoint.c | |||
@@ -25,9 +25,7 @@ | |||
25 | #include <linux/types.h> | 25 | #include <linux/types.h> |
26 | #include <linux/bitops.h> | 26 | #include <linux/bitops.h> |
27 | #include <linux/interrupt.h> | 27 | #include <linux/interrupt.h> |
28 | #include <linux/irq.h> | ||
29 | #include <linux/gpio.h> | 28 | #include <linux/gpio.h> |
30 | #include <linux/irqdomain.h> | ||
31 | #include <linux/slab.h> | 29 | #include <linux/slab.h> |
32 | #include <linux/acpi.h> | 30 | #include <linux/acpi.h> |
33 | #include <linux/platform_device.h> | 31 | #include <linux/platform_device.h> |
@@ -62,7 +60,6 @@ | |||
62 | 60 | ||
63 | struct lp_gpio { | 61 | struct lp_gpio { |
64 | struct gpio_chip chip; | 62 | struct gpio_chip chip; |
65 | struct irq_domain *domain; | ||
66 | struct platform_device *pdev; | 63 | struct platform_device *pdev; |
67 | spinlock_t lock; | 64 | spinlock_t lock; |
68 | unsigned long reg_base; | 65 | unsigned long reg_base; |
@@ -151,7 +148,8 @@ static void lp_gpio_free(struct gpio_chip *chip, unsigned offset) | |||
151 | 148 | ||
152 | static int lp_irq_type(struct irq_data *d, unsigned type) | 149 | static int lp_irq_type(struct irq_data *d, unsigned type) |
153 | { | 150 | { |
154 | struct lp_gpio *lg = irq_data_get_irq_chip_data(d); | 151 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
152 | struct lp_gpio *lg = container_of(gc, struct lp_gpio, chip); | ||
155 | u32 hwirq = irqd_to_hwirq(d); | 153 | u32 hwirq = irqd_to_hwirq(d); |
156 | unsigned long flags; | 154 | unsigned long flags; |
157 | u32 value; | 155 | u32 value; |
@@ -236,16 +234,11 @@ static int lp_gpio_direction_output(struct gpio_chip *chip, | |||
236 | return 0; | 234 | return 0; |
237 | } | 235 | } |
238 | 236 | ||
239 | static int lp_gpio_to_irq(struct gpio_chip *chip, unsigned offset) | ||
240 | { | ||
241 | struct lp_gpio *lg = container_of(chip, struct lp_gpio, chip); | ||
242 | return irq_create_mapping(lg->domain, offset); | ||
243 | } | ||
244 | |||
245 | static void lp_gpio_irq_handler(unsigned hwirq, struct irq_desc *desc) | 237 | static void lp_gpio_irq_handler(unsigned hwirq, struct irq_desc *desc) |
246 | { | 238 | { |
247 | struct irq_data *data = irq_desc_get_irq_data(desc); | 239 | struct irq_data *data = irq_desc_get_irq_data(desc); |
248 | struct lp_gpio *lg = irq_data_get_irq_handler_data(data); | 240 | struct gpio_chip *gc = irq_desc_get_handler_data(desc); |
241 | struct lp_gpio *lg = container_of(gc, struct lp_gpio, chip); | ||
249 | struct irq_chip *chip = irq_data_get_irq_chip(data); | 242 | struct irq_chip *chip = irq_data_get_irq_chip(data); |
250 | u32 base, pin, mask; | 243 | u32 base, pin, mask; |
251 | unsigned long reg, ena, pending; | 244 | unsigned long reg, ena, pending; |
@@ -262,7 +255,7 @@ static void lp_gpio_irq_handler(unsigned hwirq, struct irq_desc *desc) | |||
262 | mask = BIT(pin); | 255 | mask = BIT(pin); |
263 | /* Clear before handling so we don't lose an edge */ | 256 | /* Clear before handling so we don't lose an edge */ |
264 | outl(mask, reg); | 257 | outl(mask, reg); |
265 | irq = irq_find_mapping(lg->domain, base + pin); | 258 | irq = irq_find_mapping(lg->chip.irqdomain, base + pin); |
266 | generic_handle_irq(irq); | 259 | generic_handle_irq(irq); |
267 | } | 260 | } |
268 | } | 261 | } |
@@ -279,7 +272,8 @@ static void lp_irq_mask(struct irq_data *d) | |||
279 | 272 | ||
280 | static void lp_irq_enable(struct irq_data *d) | 273 | static void lp_irq_enable(struct irq_data *d) |
281 | { | 274 | { |
282 | struct lp_gpio *lg = irq_data_get_irq_chip_data(d); | 275 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
276 | struct lp_gpio *lg = container_of(gc, struct lp_gpio, chip); | ||
283 | u32 hwirq = irqd_to_hwirq(d); | 277 | u32 hwirq = irqd_to_hwirq(d); |
284 | unsigned long reg = lp_gpio_reg(&lg->chip, hwirq, LP_INT_ENABLE); | 278 | unsigned long reg = lp_gpio_reg(&lg->chip, hwirq, LP_INT_ENABLE); |
285 | unsigned long flags; | 279 | unsigned long flags; |
@@ -291,7 +285,8 @@ static void lp_irq_enable(struct irq_data *d) | |||
291 | 285 | ||
292 | static void lp_irq_disable(struct irq_data *d) | 286 | static void lp_irq_disable(struct irq_data *d) |
293 | { | 287 | { |
294 | struct lp_gpio *lg = irq_data_get_irq_chip_data(d); | 288 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
289 | struct lp_gpio *lg = container_of(gc, struct lp_gpio, chip); | ||
295 | u32 hwirq = irqd_to_hwirq(d); | 290 | u32 hwirq = irqd_to_hwirq(d); |
296 | unsigned long reg = lp_gpio_reg(&lg->chip, hwirq, LP_INT_ENABLE); | 291 | unsigned long reg = lp_gpio_reg(&lg->chip, hwirq, LP_INT_ENABLE); |
297 | unsigned long flags; | 292 | unsigned long flags; |
@@ -301,26 +296,6 @@ static void lp_irq_disable(struct irq_data *d) | |||
301 | spin_unlock_irqrestore(&lg->lock, flags); | 296 | spin_unlock_irqrestore(&lg->lock, flags); |
302 | } | 297 | } |
303 | 298 | ||
304 | static int lp_irq_reqres(struct irq_data *d) | ||
305 | { | ||
306 | struct lp_gpio *lg = irq_data_get_irq_chip_data(d); | ||
307 | |||
308 | if (gpio_lock_as_irq(&lg->chip, irqd_to_hwirq(d))) { | ||
309 | dev_err(lg->chip.dev, | ||
310 | "unable to lock HW IRQ %lu for IRQ\n", | ||
311 | irqd_to_hwirq(d)); | ||
312 | return -EINVAL; | ||
313 | } | ||
314 | return 0; | ||
315 | } | ||
316 | |||
317 | static void lp_irq_relres(struct irq_data *d) | ||
318 | { | ||
319 | struct lp_gpio *lg = irq_data_get_irq_chip_data(d); | ||
320 | |||
321 | gpio_unlock_as_irq(&lg->chip, irqd_to_hwirq(d)); | ||
322 | } | ||
323 | |||
324 | static struct irq_chip lp_irqchip = { | 299 | static struct irq_chip lp_irqchip = { |
325 | .name = "LP-GPIO", | 300 | .name = "LP-GPIO", |
326 | .irq_mask = lp_irq_mask, | 301 | .irq_mask = lp_irq_mask, |
@@ -328,8 +303,6 @@ static struct irq_chip lp_irqchip = { | |||
328 | .irq_enable = lp_irq_enable, | 303 | .irq_enable = lp_irq_enable, |
329 | .irq_disable = lp_irq_disable, | 304 | .irq_disable = lp_irq_disable, |
330 | .irq_set_type = lp_irq_type, | 305 | .irq_set_type = lp_irq_type, |
331 | .irq_request_resources = lp_irq_reqres, | ||
332 | .irq_release_resources = lp_irq_relres, | ||
333 | .flags = IRQCHIP_SKIP_SET_WAKE, | 306 | .flags = IRQCHIP_SKIP_SET_WAKE, |
334 | }; | 307 | }; |
335 | 308 | ||
@@ -348,22 +321,6 @@ static void lp_gpio_irq_init_hw(struct lp_gpio *lg) | |||
348 | } | 321 | } |
349 | } | 322 | } |
350 | 323 | ||
351 | static int lp_gpio_irq_map(struct irq_domain *d, unsigned int irq, | ||
352 | irq_hw_number_t hwirq) | ||
353 | { | ||
354 | struct lp_gpio *lg = d->host_data; | ||
355 | |||
356 | irq_set_chip_and_handler(irq, &lp_irqchip, handle_simple_irq); | ||
357 | irq_set_chip_data(irq, lg); | ||
358 | irq_set_irq_type(irq, IRQ_TYPE_NONE); | ||
359 | |||
360 | return 0; | ||
361 | } | ||
362 | |||
363 | static const struct irq_domain_ops lp_gpio_irq_ops = { | ||
364 | .map = lp_gpio_irq_map, | ||
365 | }; | ||
366 | |||
367 | static int lp_gpio_probe(struct platform_device *pdev) | 324 | static int lp_gpio_probe(struct platform_device *pdev) |
368 | { | 325 | { |
369 | struct lp_gpio *lg; | 326 | struct lp_gpio *lg; |
@@ -371,7 +328,6 @@ static int lp_gpio_probe(struct platform_device *pdev) | |||
371 | struct resource *io_rc, *irq_rc; | 328 | struct resource *io_rc, *irq_rc; |
372 | struct device *dev = &pdev->dev; | 329 | struct device *dev = &pdev->dev; |
373 | unsigned long reg_len; | 330 | unsigned long reg_len; |
374 | unsigned hwirq; | ||
375 | int ret = -ENODEV; | 331 | int ret = -ENODEV; |
376 | 332 | ||
377 | lg = devm_kzalloc(dev, sizeof(struct lp_gpio), GFP_KERNEL); | 333 | lg = devm_kzalloc(dev, sizeof(struct lp_gpio), GFP_KERNEL); |
@@ -414,27 +370,28 @@ static int lp_gpio_probe(struct platform_device *pdev) | |||
414 | gc->can_sleep = false; | 370 | gc->can_sleep = false; |
415 | gc->dev = dev; | 371 | gc->dev = dev; |
416 | 372 | ||
373 | ret = gpiochip_add(gc); | ||
374 | if (ret) { | ||
375 | dev_err(dev, "failed adding lp-gpio chip\n"); | ||
376 | return ret; | ||
377 | } | ||
378 | |||
417 | /* set up interrupts */ | 379 | /* set up interrupts */ |
418 | if (irq_rc && irq_rc->start) { | 380 | if (irq_rc && irq_rc->start) { |
419 | hwirq = irq_rc->start; | ||
420 | gc->to_irq = lp_gpio_to_irq; | ||
421 | |||
422 | lg->domain = irq_domain_add_linear(NULL, LP_NUM_GPIO, | ||
423 | &lp_gpio_irq_ops, lg); | ||
424 | if (!lg->domain) | ||
425 | return -ENXIO; | ||
426 | |||
427 | lp_gpio_irq_init_hw(lg); | 381 | lp_gpio_irq_init_hw(lg); |
382 | ret = gpiochip_irqchip_add(gc, &lp_irqchip, 0, | ||
383 | handle_simple_irq, IRQ_TYPE_NONE); | ||
384 | if (ret) { | ||
385 | dev_err(dev, "failed to add irqchip\n"); | ||
386 | gpiochip_remove(gc); | ||
387 | return ret; | ||
388 | } | ||
428 | 389 | ||
429 | irq_set_handler_data(hwirq, lg); | 390 | gpiochip_set_chained_irqchip(gc, &lp_irqchip, |
430 | irq_set_chained_handler(hwirq, lp_gpio_irq_handler); | 391 | (unsigned)irq_rc->start, |
392 | lp_gpio_irq_handler); | ||
431 | } | 393 | } |
432 | 394 | ||
433 | ret = gpiochip_add(gc); | ||
434 | if (ret) { | ||
435 | dev_err(dev, "failed adding lp-gpio chip\n"); | ||
436 | return ret; | ||
437 | } | ||
438 | pm_runtime_enable(dev); | 395 | pm_runtime_enable(dev); |
439 | 396 | ||
440 | return 0; | 397 | return 0; |
@@ -465,11 +422,8 @@ MODULE_DEVICE_TABLE(acpi, lynxpoint_gpio_acpi_match); | |||
465 | static int lp_gpio_remove(struct platform_device *pdev) | 422 | static int lp_gpio_remove(struct platform_device *pdev) |
466 | { | 423 | { |
467 | struct lp_gpio *lg = platform_get_drvdata(pdev); | 424 | struct lp_gpio *lg = platform_get_drvdata(pdev); |
468 | int err; | ||
469 | pm_runtime_disable(&pdev->dev); | 425 | pm_runtime_disable(&pdev->dev); |
470 | err = gpiochip_remove(&lg->chip); | 426 | gpiochip_remove(&lg->chip); |
471 | if (err) | ||
472 | dev_warn(&pdev->dev, "failed to remove gpio_chip.\n"); | ||
473 | return 0; | 427 | return 0; |
474 | } | 428 | } |
475 | 429 | ||
diff --git a/drivers/gpio/gpio-max730x.c b/drivers/gpio/gpio-max730x.c index 0814584fcdc1..18ab89e20806 100644 --- a/drivers/gpio/gpio-max730x.c +++ b/drivers/gpio/gpio-max730x.c | |||
@@ -228,21 +228,16 @@ EXPORT_SYMBOL_GPL(__max730x_probe); | |||
228 | int __max730x_remove(struct device *dev) | 228 | int __max730x_remove(struct device *dev) |
229 | { | 229 | { |
230 | struct max7301 *ts = dev_get_drvdata(dev); | 230 | struct max7301 *ts = dev_get_drvdata(dev); |
231 | int ret; | ||
232 | 231 | ||
233 | if (ts == NULL) | 232 | if (ts == NULL) |
234 | return -ENODEV; | 233 | return -ENODEV; |
235 | 234 | ||
236 | /* Power down the chip and disable IRQ output */ | 235 | /* Power down the chip and disable IRQ output */ |
237 | ts->write(dev, 0x04, 0x00); | 236 | ts->write(dev, 0x04, 0x00); |
238 | 237 | gpiochip_remove(&ts->chip); | |
239 | ret = gpiochip_remove(&ts->chip); | 238 | mutex_destroy(&ts->lock); |
240 | if (!ret) | 239 | kfree(ts); |
241 | mutex_destroy(&ts->lock); | 240 | return 0; |
242 | else | ||
243 | dev_err(dev, "Failed to remove GPIO controller: %d\n", ret); | ||
244 | |||
245 | return ret; | ||
246 | } | 241 | } |
247 | EXPORT_SYMBOL_GPL(__max730x_remove); | 242 | EXPORT_SYMBOL_GPL(__max730x_remove); |
248 | 243 | ||
diff --git a/drivers/gpio/gpio-max732x.c b/drivers/gpio/gpio-max732x.c index 7c36f2b0983d..6c676225b886 100644 --- a/drivers/gpio/gpio-max732x.c +++ b/drivers/gpio/gpio-max732x.c | |||
@@ -676,12 +676,7 @@ static int max732x_remove(struct i2c_client *client) | |||
676 | } | 676 | } |
677 | } | 677 | } |
678 | 678 | ||
679 | ret = gpiochip_remove(&chip->gpio_chip); | 679 | gpiochip_remove(&chip->gpio_chip); |
680 | if (ret) { | ||
681 | dev_err(&client->dev, "%s failed, %d\n", | ||
682 | "gpiochip_remove()", ret); | ||
683 | return ret; | ||
684 | } | ||
685 | 680 | ||
686 | max732x_irq_teardown(chip); | 681 | max732x_irq_teardown(chip); |
687 | 682 | ||
diff --git a/drivers/gpio/gpio-mc33880.c b/drivers/gpio/gpio-mc33880.c index 553a80a5eaf3..4e3e160e5db2 100644 --- a/drivers/gpio/gpio-mc33880.c +++ b/drivers/gpio/gpio-mc33880.c | |||
@@ -149,20 +149,15 @@ exit_destroy: | |||
149 | static int mc33880_remove(struct spi_device *spi) | 149 | static int mc33880_remove(struct spi_device *spi) |
150 | { | 150 | { |
151 | struct mc33880 *mc; | 151 | struct mc33880 *mc; |
152 | int ret; | ||
153 | 152 | ||
154 | mc = spi_get_drvdata(spi); | 153 | mc = spi_get_drvdata(spi); |
155 | if (mc == NULL) | 154 | if (mc == NULL) |
156 | return -ENODEV; | 155 | return -ENODEV; |
157 | 156 | ||
158 | ret = gpiochip_remove(&mc->chip); | 157 | gpiochip_remove(&mc->chip); |
159 | if (!ret) | 158 | mutex_destroy(&mc->lock); |
160 | mutex_destroy(&mc->lock); | ||
161 | else | ||
162 | dev_err(&spi->dev, "Failed to remove the GPIO controller: %d\n", | ||
163 | ret); | ||
164 | 159 | ||
165 | return ret; | 160 | return 0; |
166 | } | 161 | } |
167 | 162 | ||
168 | static struct spi_driver mc33880_driver = { | 163 | static struct spi_driver mc33880_driver = { |
diff --git a/drivers/gpio/gpio-mc9s08dz60.c b/drivers/gpio/gpio-mc9s08dz60.c index dce35ff00db7..d62b4f8182bf 100644 --- a/drivers/gpio/gpio-mc9s08dz60.c +++ b/drivers/gpio/gpio-mc9s08dz60.c | |||
@@ -118,7 +118,8 @@ static int mc9s08dz60_remove(struct i2c_client *client) | |||
118 | 118 | ||
119 | mc9s = i2c_get_clientdata(client); | 119 | mc9s = i2c_get_clientdata(client); |
120 | 120 | ||
121 | return gpiochip_remove(&mc9s->chip); | 121 | gpiochip_remove(&mc9s->chip); |
122 | return 0; | ||
122 | } | 123 | } |
123 | 124 | ||
124 | static const struct i2c_device_id mc9s08dz60_id[] = { | 125 | static const struct i2c_device_id mc9s08dz60_id[] = { |
diff --git a/drivers/gpio/gpio-mcp23s08.c b/drivers/gpio/gpio-mcp23s08.c index fe7c0e211f9a..6f183d9b487e 100644 --- a/drivers/gpio/gpio-mcp23s08.c +++ b/drivers/gpio/gpio-mcp23s08.c | |||
@@ -812,16 +812,14 @@ fail: | |||
812 | static int mcp230xx_remove(struct i2c_client *client) | 812 | static int mcp230xx_remove(struct i2c_client *client) |
813 | { | 813 | { |
814 | struct mcp23s08 *mcp = i2c_get_clientdata(client); | 814 | struct mcp23s08 *mcp = i2c_get_clientdata(client); |
815 | int status; | ||
816 | 815 | ||
817 | if (client->irq && mcp->irq_controller) | 816 | if (client->irq && mcp->irq_controller) |
818 | mcp23s08_irq_teardown(mcp); | 817 | mcp23s08_irq_teardown(mcp); |
819 | 818 | ||
820 | status = gpiochip_remove(&mcp->chip); | 819 | gpiochip_remove(&mcp->chip); |
821 | if (status == 0) | 820 | kfree(mcp); |
822 | kfree(mcp); | ||
823 | 821 | ||
824 | return status; | 822 | return 0; |
825 | } | 823 | } |
826 | 824 | ||
827 | static const struct i2c_device_id mcp230xx_id[] = { | 825 | static const struct i2c_device_id mcp230xx_id[] = { |
@@ -900,8 +898,6 @@ static int mcp23s08_probe(struct spi_device *spi) | |||
900 | if (spi_present_mask & (1 << addr)) | 898 | if (spi_present_mask & (1 << addr)) |
901 | chips++; | 899 | chips++; |
902 | } | 900 | } |
903 | if (!chips) | ||
904 | return -ENODEV; | ||
905 | } else { | 901 | } else { |
906 | type = spi_get_device_id(spi)->driver_data; | 902 | type = spi_get_device_id(spi)->driver_data; |
907 | pdata = dev_get_platdata(&spi->dev); | 903 | pdata = dev_get_platdata(&spi->dev); |
@@ -940,10 +936,6 @@ static int mcp23s08_probe(struct spi_device *spi) | |||
940 | if (!(spi_present_mask & (1 << addr))) | 936 | if (!(spi_present_mask & (1 << addr))) |
941 | continue; | 937 | continue; |
942 | chips--; | 938 | chips--; |
943 | if (chips < 0) { | ||
944 | dev_err(&spi->dev, "FATAL: invalid negative chip id\n"); | ||
945 | goto fail; | ||
946 | } | ||
947 | data->mcp[addr] = &data->chip[chips]; | 939 | data->mcp[addr] = &data->chip[chips]; |
948 | status = mcp23s08_probe_one(data->mcp[addr], &spi->dev, spi, | 940 | status = mcp23s08_probe_one(data->mcp[addr], &spi->dev, spi, |
949 | 0x40 | (addr << 1), type, base, | 941 | 0x40 | (addr << 1), type, base, |
@@ -966,13 +958,10 @@ static int mcp23s08_probe(struct spi_device *spi) | |||
966 | 958 | ||
967 | fail: | 959 | fail: |
968 | for (addr = 0; addr < ARRAY_SIZE(data->mcp); addr++) { | 960 | for (addr = 0; addr < ARRAY_SIZE(data->mcp); addr++) { |
969 | int tmp; | ||
970 | 961 | ||
971 | if (!data->mcp[addr]) | 962 | if (!data->mcp[addr]) |
972 | continue; | 963 | continue; |
973 | tmp = gpiochip_remove(&data->mcp[addr]->chip); | 964 | gpiochip_remove(&data->mcp[addr]->chip); |
974 | if (tmp < 0) | ||
975 | dev_err(&spi->dev, "%s --> %d\n", "remove", tmp); | ||
976 | } | 965 | } |
977 | kfree(data); | 966 | kfree(data); |
978 | return status; | 967 | return status; |
@@ -982,23 +971,16 @@ static int mcp23s08_remove(struct spi_device *spi) | |||
982 | { | 971 | { |
983 | struct mcp23s08_driver_data *data = spi_get_drvdata(spi); | 972 | struct mcp23s08_driver_data *data = spi_get_drvdata(spi); |
984 | unsigned addr; | 973 | unsigned addr; |
985 | int status = 0; | ||
986 | 974 | ||
987 | for (addr = 0; addr < ARRAY_SIZE(data->mcp); addr++) { | 975 | for (addr = 0; addr < ARRAY_SIZE(data->mcp); addr++) { |
988 | int tmp; | ||
989 | 976 | ||
990 | if (!data->mcp[addr]) | 977 | if (!data->mcp[addr]) |
991 | continue; | 978 | continue; |
992 | 979 | ||
993 | tmp = gpiochip_remove(&data->mcp[addr]->chip); | 980 | gpiochip_remove(&data->mcp[addr]->chip); |
994 | if (tmp < 0) { | ||
995 | dev_err(&spi->dev, "%s --> %d\n", "remove", tmp); | ||
996 | status = tmp; | ||
997 | } | ||
998 | } | 981 | } |
999 | if (status == 0) | 982 | kfree(data); |
1000 | kfree(data); | 983 | return 0; |
1001 | return status; | ||
1002 | } | 984 | } |
1003 | 985 | ||
1004 | static const struct spi_device_id mcp23s08_ids[] = { | 986 | static const struct spi_device_id mcp23s08_ids[] = { |
diff --git a/drivers/gpio/gpio-ml-ioh.c b/drivers/gpio/gpio-ml-ioh.c index d51329d23d38..5536108aa9db 100644 --- a/drivers/gpio/gpio-ml-ioh.c +++ b/drivers/gpio/gpio-ml-ioh.c | |||
@@ -497,8 +497,7 @@ err_irq_alloc_descs: | |||
497 | err_gpiochip_add: | 497 | err_gpiochip_add: |
498 | while (--i >= 0) { | 498 | while (--i >= 0) { |
499 | chip--; | 499 | chip--; |
500 | if (gpiochip_remove(&chip->gpio)) | 500 | gpiochip_remove(&chip->gpio); |
501 | dev_err(&pdev->dev, "Failed gpiochip_remove(%d)\n", i); | ||
502 | } | 501 | } |
503 | kfree(chip_save); | 502 | kfree(chip_save); |
504 | 503 | ||
@@ -519,7 +518,6 @@ err_pci_enable: | |||
519 | 518 | ||
520 | static void ioh_gpio_remove(struct pci_dev *pdev) | 519 | static void ioh_gpio_remove(struct pci_dev *pdev) |
521 | { | 520 | { |
522 | int err; | ||
523 | int i; | 521 | int i; |
524 | struct ioh_gpio *chip = pci_get_drvdata(pdev); | 522 | struct ioh_gpio *chip = pci_get_drvdata(pdev); |
525 | void *chip_save; | 523 | void *chip_save; |
@@ -530,9 +528,7 @@ static void ioh_gpio_remove(struct pci_dev *pdev) | |||
530 | 528 | ||
531 | for (i = 0; i < 8; i++, chip++) { | 529 | for (i = 0; i < 8; i++, chip++) { |
532 | irq_free_descs(chip->irq_base, num_ports[i]); | 530 | irq_free_descs(chip->irq_base, num_ports[i]); |
533 | err = gpiochip_remove(&chip->gpio); | 531 | gpiochip_remove(&chip->gpio); |
534 | if (err) | ||
535 | dev_err(&pdev->dev, "Failed gpiochip_remove\n"); | ||
536 | } | 532 | } |
537 | 533 | ||
538 | chip = chip_save; | 534 | chip = chip_save; |
diff --git a/drivers/gpio/gpio-msm-v2.c b/drivers/gpio/gpio-msm-v2.c index a3351acd4963..94f57670df9a 100644 --- a/drivers/gpio/gpio-msm-v2.c +++ b/drivers/gpio/gpio-msm-v2.c | |||
@@ -438,10 +438,7 @@ MODULE_DEVICE_TABLE(of, msm_gpio_of_match); | |||
438 | 438 | ||
439 | static int msm_gpio_remove(struct platform_device *dev) | 439 | static int msm_gpio_remove(struct platform_device *dev) |
440 | { | 440 | { |
441 | int ret = gpiochip_remove(&msm_gpio.gpio_chip); | 441 | gpiochip_remove(&msm_gpio.gpio_chip); |
442 | |||
443 | if (ret < 0) | ||
444 | return ret; | ||
445 | 442 | ||
446 | irq_set_handler(msm_gpio.summary_irq, NULL); | 443 | irq_set_handler(msm_gpio.summary_irq, NULL); |
447 | 444 | ||
diff --git a/drivers/gpio/gpio-mxc.c b/drivers/gpio/gpio-mxc.c index db83b3c0a449..f4e54a92e04a 100644 --- a/drivers/gpio/gpio-mxc.c +++ b/drivers/gpio/gpio-mxc.c | |||
@@ -485,7 +485,7 @@ static int mxc_gpio_probe(struct platform_device *pdev) | |||
485 | out_irqdesc_free: | 485 | out_irqdesc_free: |
486 | irq_free_descs(irq_base, 32); | 486 | irq_free_descs(irq_base, 32); |
487 | out_gpiochip_remove: | 487 | out_gpiochip_remove: |
488 | WARN_ON(gpiochip_remove(&port->bgc.gc) < 0); | 488 | gpiochip_remove(&port->bgc.gc); |
489 | out_bgpio_remove: | 489 | out_bgpio_remove: |
490 | bgpio_remove(&port->bgc); | 490 | bgpio_remove(&port->bgc); |
491 | out_bgio: | 491 | out_bgio: |
diff --git a/drivers/gpio/gpio-octeon.c b/drivers/gpio/gpio-octeon.c index dbb08546b9ec..5c5770c99c80 100644 --- a/drivers/gpio/gpio-octeon.c +++ b/drivers/gpio/gpio-octeon.c | |||
@@ -129,7 +129,8 @@ out: | |||
129 | static int octeon_gpio_remove(struct platform_device *pdev) | 129 | static int octeon_gpio_remove(struct platform_device *pdev) |
130 | { | 130 | { |
131 | struct gpio_chip *chip = pdev->dev.platform_data; | 131 | struct gpio_chip *chip = pdev->dev.platform_data; |
132 | return gpiochip_remove(chip); | 132 | gpiochip_remove(chip); |
133 | return 0; | ||
133 | } | 134 | } |
134 | 135 | ||
135 | static struct of_device_id octeon_gpio_match[] = { | 136 | static struct of_device_id octeon_gpio_match[] = { |
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c index 00f29aa1fb9d..174932165fcb 100644 --- a/drivers/gpio/gpio-omap.c +++ b/drivers/gpio/gpio-omap.c | |||
@@ -24,7 +24,6 @@ | |||
24 | #include <linux/pm.h> | 24 | #include <linux/pm.h> |
25 | #include <linux/of.h> | 25 | #include <linux/of.h> |
26 | #include <linux/of_device.h> | 26 | #include <linux/of_device.h> |
27 | #include <linux/irqchip/chained_irq.h> | ||
28 | #include <linux/gpio.h> | 27 | #include <linux/gpio.h> |
29 | #include <linux/bitops.h> | 28 | #include <linux/bitops.h> |
30 | #include <linux/platform_data/gpio-omap.h> | 29 | #include <linux/platform_data/gpio-omap.h> |
@@ -89,18 +88,19 @@ struct gpio_bank { | |||
89 | #define BANK_USED(bank) (bank->mod_usage || bank->irq_usage) | 88 | #define BANK_USED(bank) (bank->mod_usage || bank->irq_usage) |
90 | #define LINE_USED(line, offset) (line & (BIT(offset))) | 89 | #define LINE_USED(line, offset) (line & (BIT(offset))) |
91 | 90 | ||
92 | static int irq_to_gpio(struct gpio_bank *bank, unsigned int gpio_irq) | 91 | static int omap_irq_to_gpio(struct gpio_bank *bank, unsigned int gpio_irq) |
93 | { | 92 | { |
94 | return bank->chip.base + gpio_irq; | 93 | return bank->chip.base + gpio_irq; |
95 | } | 94 | } |
96 | 95 | ||
97 | static inline struct gpio_bank *_irq_data_get_bank(struct irq_data *d) | 96 | static inline struct gpio_bank *omap_irq_data_get_bank(struct irq_data *d) |
98 | { | 97 | { |
99 | struct gpio_chip *chip = irq_data_get_irq_chip_data(d); | 98 | struct gpio_chip *chip = irq_data_get_irq_chip_data(d); |
100 | return container_of(chip, struct gpio_bank, chip); | 99 | return container_of(chip, struct gpio_bank, chip); |
101 | } | 100 | } |
102 | 101 | ||
103 | static void _set_gpio_direction(struct gpio_bank *bank, int gpio, int is_input) | 102 | static void omap_set_gpio_direction(struct gpio_bank *bank, int gpio, |
103 | int is_input) | ||
104 | { | 104 | { |
105 | void __iomem *reg = bank->base; | 105 | void __iomem *reg = bank->base; |
106 | u32 l; | 106 | u32 l; |
@@ -117,7 +117,8 @@ static void _set_gpio_direction(struct gpio_bank *bank, int gpio, int is_input) | |||
117 | 117 | ||
118 | 118 | ||
119 | /* set data out value using dedicate set/clear register */ | 119 | /* set data out value using dedicate set/clear register */ |
120 | static void _set_gpio_dataout_reg(struct gpio_bank *bank, int gpio, int enable) | 120 | static void omap_set_gpio_dataout_reg(struct gpio_bank *bank, int gpio, |
121 | int enable) | ||
121 | { | 122 | { |
122 | void __iomem *reg = bank->base; | 123 | void __iomem *reg = bank->base; |
123 | u32 l = GPIO_BIT(bank, gpio); | 124 | u32 l = GPIO_BIT(bank, gpio); |
@@ -134,7 +135,8 @@ static void _set_gpio_dataout_reg(struct gpio_bank *bank, int gpio, int enable) | |||
134 | } | 135 | } |
135 | 136 | ||
136 | /* set data out value using mask register */ | 137 | /* set data out value using mask register */ |
137 | static void _set_gpio_dataout_mask(struct gpio_bank *bank, int gpio, int enable) | 138 | static void omap_set_gpio_dataout_mask(struct gpio_bank *bank, int gpio, |
139 | int enable) | ||
138 | { | 140 | { |
139 | void __iomem *reg = bank->base + bank->regs->dataout; | 141 | void __iomem *reg = bank->base + bank->regs->dataout; |
140 | u32 gpio_bit = GPIO_BIT(bank, gpio); | 142 | u32 gpio_bit = GPIO_BIT(bank, gpio); |
@@ -149,21 +151,21 @@ static void _set_gpio_dataout_mask(struct gpio_bank *bank, int gpio, int enable) | |||
149 | bank->context.dataout = l; | 151 | bank->context.dataout = l; |
150 | } | 152 | } |
151 | 153 | ||
152 | static int _get_gpio_datain(struct gpio_bank *bank, int offset) | 154 | static int omap_get_gpio_datain(struct gpio_bank *bank, int offset) |
153 | { | 155 | { |
154 | void __iomem *reg = bank->base + bank->regs->datain; | 156 | void __iomem *reg = bank->base + bank->regs->datain; |
155 | 157 | ||
156 | return (readl_relaxed(reg) & (BIT(offset))) != 0; | 158 | return (readl_relaxed(reg) & (BIT(offset))) != 0; |
157 | } | 159 | } |
158 | 160 | ||
159 | static int _get_gpio_dataout(struct gpio_bank *bank, int offset) | 161 | static int omap_get_gpio_dataout(struct gpio_bank *bank, int offset) |
160 | { | 162 | { |
161 | void __iomem *reg = bank->base + bank->regs->dataout; | 163 | void __iomem *reg = bank->base + bank->regs->dataout; |
162 | 164 | ||
163 | return (readl_relaxed(reg) & (BIT(offset))) != 0; | 165 | return (readl_relaxed(reg) & (BIT(offset))) != 0; |
164 | } | 166 | } |
165 | 167 | ||
166 | static inline void _gpio_rmw(void __iomem *base, u32 reg, u32 mask, bool set) | 168 | static inline void omap_gpio_rmw(void __iomem *base, u32 reg, u32 mask, bool set) |
167 | { | 169 | { |
168 | int l = readl_relaxed(base + reg); | 170 | int l = readl_relaxed(base + reg); |
169 | 171 | ||
@@ -175,7 +177,7 @@ static inline void _gpio_rmw(void __iomem *base, u32 reg, u32 mask, bool set) | |||
175 | writel_relaxed(l, base + reg); | 177 | writel_relaxed(l, base + reg); |
176 | } | 178 | } |
177 | 179 | ||
178 | static inline void _gpio_dbck_enable(struct gpio_bank *bank) | 180 | static inline void omap_gpio_dbck_enable(struct gpio_bank *bank) |
179 | { | 181 | { |
180 | if (bank->dbck_enable_mask && !bank->dbck_enabled) { | 182 | if (bank->dbck_enable_mask && !bank->dbck_enabled) { |
181 | clk_prepare_enable(bank->dbck); | 183 | clk_prepare_enable(bank->dbck); |
@@ -186,7 +188,7 @@ static inline void _gpio_dbck_enable(struct gpio_bank *bank) | |||
186 | } | 188 | } |
187 | } | 189 | } |
188 | 190 | ||
189 | static inline void _gpio_dbck_disable(struct gpio_bank *bank) | 191 | static inline void omap_gpio_dbck_disable(struct gpio_bank *bank) |
190 | { | 192 | { |
191 | if (bank->dbck_enable_mask && bank->dbck_enabled) { | 193 | if (bank->dbck_enable_mask && bank->dbck_enabled) { |
192 | /* | 194 | /* |
@@ -202,7 +204,7 @@ static inline void _gpio_dbck_disable(struct gpio_bank *bank) | |||
202 | } | 204 | } |
203 | 205 | ||
204 | /** | 206 | /** |
205 | * _set_gpio_debounce - low level gpio debounce time | 207 | * omap2_set_gpio_debounce - low level gpio debounce time |
206 | * @bank: the gpio bank we're acting upon | 208 | * @bank: the gpio bank we're acting upon |
207 | * @gpio: the gpio number on this @gpio | 209 | * @gpio: the gpio number on this @gpio |
208 | * @debounce: debounce time to use | 210 | * @debounce: debounce time to use |
@@ -210,8 +212,8 @@ static inline void _gpio_dbck_disable(struct gpio_bank *bank) | |||
210 | * OMAP's debounce time is in 31us steps so we need | 212 | * OMAP's debounce time is in 31us steps so we need |
211 | * to convert and round up to the closest unit. | 213 | * to convert and round up to the closest unit. |
212 | */ | 214 | */ |
213 | static void _set_gpio_debounce(struct gpio_bank *bank, unsigned gpio, | 215 | static void omap2_set_gpio_debounce(struct gpio_bank *bank, unsigned gpio, |
214 | unsigned debounce) | 216 | unsigned debounce) |
215 | { | 217 | { |
216 | void __iomem *reg; | 218 | void __iomem *reg; |
217 | u32 val; | 219 | u32 val; |
@@ -252,7 +254,7 @@ static void _set_gpio_debounce(struct gpio_bank *bank, unsigned gpio, | |||
252 | * used within _gpio_dbck_enable() is still not initialized at | 254 | * used within _gpio_dbck_enable() is still not initialized at |
253 | * that point. Therefore we have to enable dbck here. | 255 | * that point. Therefore we have to enable dbck here. |
254 | */ | 256 | */ |
255 | _gpio_dbck_enable(bank); | 257 | omap_gpio_dbck_enable(bank); |
256 | if (bank->dbck_enable_mask) { | 258 | if (bank->dbck_enable_mask) { |
257 | bank->context.debounce = debounce; | 259 | bank->context.debounce = debounce; |
258 | bank->context.debounce_en = val; | 260 | bank->context.debounce_en = val; |
@@ -260,7 +262,7 @@ static void _set_gpio_debounce(struct gpio_bank *bank, unsigned gpio, | |||
260 | } | 262 | } |
261 | 263 | ||
262 | /** | 264 | /** |
263 | * _clear_gpio_debounce - clear debounce settings for a gpio | 265 | * omap_clear_gpio_debounce - clear debounce settings for a gpio |
264 | * @bank: the gpio bank we're acting upon | 266 | * @bank: the gpio bank we're acting upon |
265 | * @gpio: the gpio number on this @gpio | 267 | * @gpio: the gpio number on this @gpio |
266 | * | 268 | * |
@@ -269,7 +271,7 @@ static void _set_gpio_debounce(struct gpio_bank *bank, unsigned gpio, | |||
269 | * time too. The debounce clock will also be disabled when calling this function | 271 | * time too. The debounce clock will also be disabled when calling this function |
270 | * if this is the only gpio in the bank using debounce. | 272 | * if this is the only gpio in the bank using debounce. |
271 | */ | 273 | */ |
272 | static void _clear_gpio_debounce(struct gpio_bank *bank, unsigned gpio) | 274 | static void omap_clear_gpio_debounce(struct gpio_bank *bank, unsigned gpio) |
273 | { | 275 | { |
274 | u32 gpio_bit = GPIO_BIT(bank, gpio); | 276 | u32 gpio_bit = GPIO_BIT(bank, gpio); |
275 | 277 | ||
@@ -293,20 +295,20 @@ static void _clear_gpio_debounce(struct gpio_bank *bank, unsigned gpio) | |||
293 | } | 295 | } |
294 | } | 296 | } |
295 | 297 | ||
296 | static inline void set_gpio_trigger(struct gpio_bank *bank, int gpio, | 298 | static inline void omap_set_gpio_trigger(struct gpio_bank *bank, int gpio, |
297 | unsigned trigger) | 299 | unsigned trigger) |
298 | { | 300 | { |
299 | void __iomem *base = bank->base; | 301 | void __iomem *base = bank->base; |
300 | u32 gpio_bit = BIT(gpio); | 302 | u32 gpio_bit = BIT(gpio); |
301 | 303 | ||
302 | _gpio_rmw(base, bank->regs->leveldetect0, gpio_bit, | 304 | omap_gpio_rmw(base, bank->regs->leveldetect0, gpio_bit, |
303 | trigger & IRQ_TYPE_LEVEL_LOW); | 305 | trigger & IRQ_TYPE_LEVEL_LOW); |
304 | _gpio_rmw(base, bank->regs->leveldetect1, gpio_bit, | 306 | omap_gpio_rmw(base, bank->regs->leveldetect1, gpio_bit, |
305 | trigger & IRQ_TYPE_LEVEL_HIGH); | 307 | trigger & IRQ_TYPE_LEVEL_HIGH); |
306 | _gpio_rmw(base, bank->regs->risingdetect, gpio_bit, | 308 | omap_gpio_rmw(base, bank->regs->risingdetect, gpio_bit, |
307 | trigger & IRQ_TYPE_EDGE_RISING); | 309 | trigger & IRQ_TYPE_EDGE_RISING); |
308 | _gpio_rmw(base, bank->regs->fallingdetect, gpio_bit, | 310 | omap_gpio_rmw(base, bank->regs->fallingdetect, gpio_bit, |
309 | trigger & IRQ_TYPE_EDGE_FALLING); | 311 | trigger & IRQ_TYPE_EDGE_FALLING); |
310 | 312 | ||
311 | bank->context.leveldetect0 = | 313 | bank->context.leveldetect0 = |
312 | readl_relaxed(bank->base + bank->regs->leveldetect0); | 314 | readl_relaxed(bank->base + bank->regs->leveldetect0); |
@@ -318,7 +320,7 @@ static inline void set_gpio_trigger(struct gpio_bank *bank, int gpio, | |||
318 | readl_relaxed(bank->base + bank->regs->fallingdetect); | 320 | readl_relaxed(bank->base + bank->regs->fallingdetect); |
319 | 321 | ||
320 | if (likely(!(bank->non_wakeup_gpios & gpio_bit))) { | 322 | if (likely(!(bank->non_wakeup_gpios & gpio_bit))) { |
321 | _gpio_rmw(base, bank->regs->wkup_en, gpio_bit, trigger != 0); | 323 | omap_gpio_rmw(base, bank->regs->wkup_en, gpio_bit, trigger != 0); |
322 | bank->context.wake_en = | 324 | bank->context.wake_en = |
323 | readl_relaxed(bank->base + bank->regs->wkup_en); | 325 | readl_relaxed(bank->base + bank->regs->wkup_en); |
324 | } | 326 | } |
@@ -354,7 +356,7 @@ exit: | |||
354 | * This only applies to chips that can't do both rising and falling edge | 356 | * This only applies to chips that can't do both rising and falling edge |
355 | * detection at once. For all other chips, this function is a noop. | 357 | * detection at once. For all other chips, this function is a noop. |
356 | */ | 358 | */ |
357 | static void _toggle_gpio_edge_triggering(struct gpio_bank *bank, int gpio) | 359 | static void omap_toggle_gpio_edge_triggering(struct gpio_bank *bank, int gpio) |
358 | { | 360 | { |
359 | void __iomem *reg = bank->base; | 361 | void __iomem *reg = bank->base; |
360 | u32 l = 0; | 362 | u32 l = 0; |
@@ -373,18 +375,18 @@ static void _toggle_gpio_edge_triggering(struct gpio_bank *bank, int gpio) | |||
373 | writel_relaxed(l, reg); | 375 | writel_relaxed(l, reg); |
374 | } | 376 | } |
375 | #else | 377 | #else |
376 | static void _toggle_gpio_edge_triggering(struct gpio_bank *bank, int gpio) {} | 378 | static void omap_toggle_gpio_edge_triggering(struct gpio_bank *bank, int gpio) {} |
377 | #endif | 379 | #endif |
378 | 380 | ||
379 | static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, | 381 | static int omap_set_gpio_triggering(struct gpio_bank *bank, int gpio, |
380 | unsigned trigger) | 382 | unsigned trigger) |
381 | { | 383 | { |
382 | void __iomem *reg = bank->base; | 384 | void __iomem *reg = bank->base; |
383 | void __iomem *base = bank->base; | 385 | void __iomem *base = bank->base; |
384 | u32 l = 0; | 386 | u32 l = 0; |
385 | 387 | ||
386 | if (bank->regs->leveldetect0 && bank->regs->wkup_en) { | 388 | if (bank->regs->leveldetect0 && bank->regs->wkup_en) { |
387 | set_gpio_trigger(bank, gpio, trigger); | 389 | omap_set_gpio_trigger(bank, gpio, trigger); |
388 | } else if (bank->regs->irqctrl) { | 390 | } else if (bank->regs->irqctrl) { |
389 | reg += bank->regs->irqctrl; | 391 | reg += bank->regs->irqctrl; |
390 | 392 | ||
@@ -414,7 +416,7 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, | |||
414 | l |= BIT(gpio << 1); | 416 | l |= BIT(gpio << 1); |
415 | 417 | ||
416 | /* Enable wake-up during idle for dynamic tick */ | 418 | /* Enable wake-up during idle for dynamic tick */ |
417 | _gpio_rmw(base, bank->regs->wkup_en, BIT(gpio), trigger); | 419 | omap_gpio_rmw(base, bank->regs->wkup_en, BIT(gpio), trigger); |
418 | bank->context.wake_en = | 420 | bank->context.wake_en = |
419 | readl_relaxed(bank->base + bank->regs->wkup_en); | 421 | readl_relaxed(bank->base + bank->regs->wkup_en); |
420 | writel_relaxed(l, reg); | 422 | writel_relaxed(l, reg); |
@@ -422,7 +424,7 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, | |||
422 | return 0; | 424 | return 0; |
423 | } | 425 | } |
424 | 426 | ||
425 | static void _enable_gpio_module(struct gpio_bank *bank, unsigned offset) | 427 | static void omap_enable_gpio_module(struct gpio_bank *bank, unsigned offset) |
426 | { | 428 | { |
427 | if (bank->regs->pinctrl) { | 429 | if (bank->regs->pinctrl) { |
428 | void __iomem *reg = bank->base + bank->regs->pinctrl; | 430 | void __iomem *reg = bank->base + bank->regs->pinctrl; |
@@ -443,7 +445,7 @@ static void _enable_gpio_module(struct gpio_bank *bank, unsigned offset) | |||
443 | } | 445 | } |
444 | } | 446 | } |
445 | 447 | ||
446 | static void _disable_gpio_module(struct gpio_bank *bank, unsigned offset) | 448 | static void omap_disable_gpio_module(struct gpio_bank *bank, unsigned offset) |
447 | { | 449 | { |
448 | void __iomem *base = bank->base; | 450 | void __iomem *base = bank->base; |
449 | 451 | ||
@@ -451,7 +453,7 @@ static void _disable_gpio_module(struct gpio_bank *bank, unsigned offset) | |||
451 | !LINE_USED(bank->mod_usage, offset) && | 453 | !LINE_USED(bank->mod_usage, offset) && |
452 | !LINE_USED(bank->irq_usage, offset)) { | 454 | !LINE_USED(bank->irq_usage, offset)) { |
453 | /* Disable wake-up during idle for dynamic tick */ | 455 | /* Disable wake-up during idle for dynamic tick */ |
454 | _gpio_rmw(base, bank->regs->wkup_en, BIT(offset), 0); | 456 | omap_gpio_rmw(base, bank->regs->wkup_en, BIT(offset), 0); |
455 | bank->context.wake_en = | 457 | bank->context.wake_en = |
456 | readl_relaxed(bank->base + bank->regs->wkup_en); | 458 | readl_relaxed(bank->base + bank->regs->wkup_en); |
457 | } | 459 | } |
@@ -468,16 +470,16 @@ static void _disable_gpio_module(struct gpio_bank *bank, unsigned offset) | |||
468 | } | 470 | } |
469 | } | 471 | } |
470 | 472 | ||
471 | static int gpio_is_input(struct gpio_bank *bank, int mask) | 473 | static int omap_gpio_is_input(struct gpio_bank *bank, int mask) |
472 | { | 474 | { |
473 | void __iomem *reg = bank->base + bank->regs->direction; | 475 | void __iomem *reg = bank->base + bank->regs->direction; |
474 | 476 | ||
475 | return readl_relaxed(reg) & mask; | 477 | return readl_relaxed(reg) & mask; |
476 | } | 478 | } |
477 | 479 | ||
478 | static int gpio_irq_type(struct irq_data *d, unsigned type) | 480 | static int omap_gpio_irq_type(struct irq_data *d, unsigned type) |
479 | { | 481 | { |
480 | struct gpio_bank *bank = _irq_data_get_bank(d); | 482 | struct gpio_bank *bank = omap_irq_data_get_bank(d); |
481 | unsigned gpio = 0; | 483 | unsigned gpio = 0; |
482 | int retval; | 484 | int retval; |
483 | unsigned long flags; | 485 | unsigned long flags; |
@@ -492,7 +494,7 @@ static int gpio_irq_type(struct irq_data *d, unsigned type) | |||
492 | #endif | 494 | #endif |
493 | 495 | ||
494 | if (!gpio) | 496 | if (!gpio) |
495 | gpio = irq_to_gpio(bank, d->hwirq); | 497 | gpio = omap_irq_to_gpio(bank, d->hwirq); |
496 | 498 | ||
497 | if (type & ~IRQ_TYPE_SENSE_MASK) | 499 | if (type & ~IRQ_TYPE_SENSE_MASK) |
498 | return -EINVAL; | 500 | return -EINVAL; |
@@ -503,11 +505,11 @@ static int gpio_irq_type(struct irq_data *d, unsigned type) | |||
503 | 505 | ||
504 | spin_lock_irqsave(&bank->lock, flags); | 506 | spin_lock_irqsave(&bank->lock, flags); |
505 | offset = GPIO_INDEX(bank, gpio); | 507 | offset = GPIO_INDEX(bank, gpio); |
506 | retval = _set_gpio_triggering(bank, offset, type); | 508 | retval = omap_set_gpio_triggering(bank, offset, type); |
507 | if (!LINE_USED(bank->mod_usage, offset)) { | 509 | if (!LINE_USED(bank->mod_usage, offset)) { |
508 | _enable_gpio_module(bank, offset); | 510 | omap_enable_gpio_module(bank, offset); |
509 | _set_gpio_direction(bank, offset, 1); | 511 | omap_set_gpio_direction(bank, offset, 1); |
510 | } else if (!gpio_is_input(bank, BIT(offset))) { | 512 | } else if (!omap_gpio_is_input(bank, BIT(offset))) { |
511 | spin_unlock_irqrestore(&bank->lock, flags); | 513 | spin_unlock_irqrestore(&bank->lock, flags); |
512 | return -EINVAL; | 514 | return -EINVAL; |
513 | } | 515 | } |
@@ -523,7 +525,7 @@ static int gpio_irq_type(struct irq_data *d, unsigned type) | |||
523 | return retval; | 525 | return retval; |
524 | } | 526 | } |
525 | 527 | ||
526 | static void _clear_gpio_irqbank(struct gpio_bank *bank, int gpio_mask) | 528 | static void omap_clear_gpio_irqbank(struct gpio_bank *bank, int gpio_mask) |
527 | { | 529 | { |
528 | void __iomem *reg = bank->base; | 530 | void __iomem *reg = bank->base; |
529 | 531 | ||
@@ -540,12 +542,12 @@ static void _clear_gpio_irqbank(struct gpio_bank *bank, int gpio_mask) | |||
540 | readl_relaxed(reg); | 542 | readl_relaxed(reg); |
541 | } | 543 | } |
542 | 544 | ||
543 | static inline void _clear_gpio_irqstatus(struct gpio_bank *bank, int gpio) | 545 | static inline void omap_clear_gpio_irqstatus(struct gpio_bank *bank, int gpio) |
544 | { | 546 | { |
545 | _clear_gpio_irqbank(bank, GPIO_BIT(bank, gpio)); | 547 | omap_clear_gpio_irqbank(bank, GPIO_BIT(bank, gpio)); |
546 | } | 548 | } |
547 | 549 | ||
548 | static u32 _get_gpio_irqbank_mask(struct gpio_bank *bank) | 550 | static u32 omap_get_gpio_irqbank_mask(struct gpio_bank *bank) |
549 | { | 551 | { |
550 | void __iomem *reg = bank->base; | 552 | void __iomem *reg = bank->base; |
551 | u32 l; | 553 | u32 l; |
@@ -559,7 +561,7 @@ static u32 _get_gpio_irqbank_mask(struct gpio_bank *bank) | |||
559 | return l; | 561 | return l; |
560 | } | 562 | } |
561 | 563 | ||
562 | static void _enable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask) | 564 | static void omap_enable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask) |
563 | { | 565 | { |
564 | void __iomem *reg = bank->base; | 566 | void __iomem *reg = bank->base; |
565 | u32 l; | 567 | u32 l; |
@@ -581,7 +583,7 @@ static void _enable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask) | |||
581 | writel_relaxed(l, reg); | 583 | writel_relaxed(l, reg); |
582 | } | 584 | } |
583 | 585 | ||
584 | static void _disable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask) | 586 | static void omap_disable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask) |
585 | { | 587 | { |
586 | void __iomem *reg = bank->base; | 588 | void __iomem *reg = bank->base; |
587 | u32 l; | 589 | u32 l; |
@@ -603,12 +605,13 @@ static void _disable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask) | |||
603 | writel_relaxed(l, reg); | 605 | writel_relaxed(l, reg); |
604 | } | 606 | } |
605 | 607 | ||
606 | static inline void _set_gpio_irqenable(struct gpio_bank *bank, int gpio, int enable) | 608 | static inline void omap_set_gpio_irqenable(struct gpio_bank *bank, int gpio, |
609 | int enable) | ||
607 | { | 610 | { |
608 | if (enable) | 611 | if (enable) |
609 | _enable_gpio_irqbank(bank, GPIO_BIT(bank, gpio)); | 612 | omap_enable_gpio_irqbank(bank, GPIO_BIT(bank, gpio)); |
610 | else | 613 | else |
611 | _disable_gpio_irqbank(bank, GPIO_BIT(bank, gpio)); | 614 | omap_disable_gpio_irqbank(bank, GPIO_BIT(bank, gpio)); |
612 | } | 615 | } |
613 | 616 | ||
614 | /* | 617 | /* |
@@ -619,7 +622,7 @@ static inline void _set_gpio_irqenable(struct gpio_bank *bank, int gpio, int ena | |||
619 | * enabled. When system is suspended, only selected GPIO interrupts need | 622 | * enabled. When system is suspended, only selected GPIO interrupts need |
620 | * to have wake-up enabled. | 623 | * to have wake-up enabled. |
621 | */ | 624 | */ |
622 | static int _set_gpio_wakeup(struct gpio_bank *bank, int gpio, int enable) | 625 | static int omap_set_gpio_wakeup(struct gpio_bank *bank, int gpio, int enable) |
623 | { | 626 | { |
624 | u32 gpio_bit = GPIO_BIT(bank, gpio); | 627 | u32 gpio_bit = GPIO_BIT(bank, gpio); |
625 | unsigned long flags; | 628 | unsigned long flags; |
@@ -642,22 +645,22 @@ static int _set_gpio_wakeup(struct gpio_bank *bank, int gpio, int enable) | |||
642 | return 0; | 645 | return 0; |
643 | } | 646 | } |
644 | 647 | ||
645 | static void _reset_gpio(struct gpio_bank *bank, int gpio) | 648 | static void omap_reset_gpio(struct gpio_bank *bank, int gpio) |
646 | { | 649 | { |
647 | _set_gpio_direction(bank, GPIO_INDEX(bank, gpio), 1); | 650 | omap_set_gpio_direction(bank, GPIO_INDEX(bank, gpio), 1); |
648 | _set_gpio_irqenable(bank, gpio, 0); | 651 | omap_set_gpio_irqenable(bank, gpio, 0); |
649 | _clear_gpio_irqstatus(bank, gpio); | 652 | omap_clear_gpio_irqstatus(bank, gpio); |
650 | _set_gpio_triggering(bank, GPIO_INDEX(bank, gpio), IRQ_TYPE_NONE); | 653 | omap_set_gpio_triggering(bank, GPIO_INDEX(bank, gpio), IRQ_TYPE_NONE); |
651 | _clear_gpio_debounce(bank, gpio); | 654 | omap_clear_gpio_debounce(bank, gpio); |
652 | } | 655 | } |
653 | 656 | ||
654 | /* Use disable_irq_wake() and enable_irq_wake() functions from drivers */ | 657 | /* Use disable_irq_wake() and enable_irq_wake() functions from drivers */ |
655 | static int gpio_wake_enable(struct irq_data *d, unsigned int enable) | 658 | static int omap_gpio_wake_enable(struct irq_data *d, unsigned int enable) |
656 | { | 659 | { |
657 | struct gpio_bank *bank = _irq_data_get_bank(d); | 660 | struct gpio_bank *bank = omap_irq_data_get_bank(d); |
658 | unsigned int gpio = irq_to_gpio(bank, d->hwirq); | 661 | unsigned int gpio = omap_irq_to_gpio(bank, d->hwirq); |
659 | 662 | ||
660 | return _set_gpio_wakeup(bank, gpio, enable); | 663 | return omap_set_gpio_wakeup(bank, gpio, enable); |
661 | } | 664 | } |
662 | 665 | ||
663 | static int omap_gpio_request(struct gpio_chip *chip, unsigned offset) | 666 | static int omap_gpio_request(struct gpio_chip *chip, unsigned offset) |
@@ -678,8 +681,8 @@ static int omap_gpio_request(struct gpio_chip *chip, unsigned offset) | |||
678 | * not already been requested. | 681 | * not already been requested. |
679 | */ | 682 | */ |
680 | if (!LINE_USED(bank->irq_usage, offset)) { | 683 | if (!LINE_USED(bank->irq_usage, offset)) { |
681 | _set_gpio_triggering(bank, offset, IRQ_TYPE_NONE); | 684 | omap_set_gpio_triggering(bank, offset, IRQ_TYPE_NONE); |
682 | _enable_gpio_module(bank, offset); | 685 | omap_enable_gpio_module(bank, offset); |
683 | } | 686 | } |
684 | bank->mod_usage |= BIT(offset); | 687 | bank->mod_usage |= BIT(offset); |
685 | spin_unlock_irqrestore(&bank->lock, flags); | 688 | spin_unlock_irqrestore(&bank->lock, flags); |
@@ -694,8 +697,8 @@ static void omap_gpio_free(struct gpio_chip *chip, unsigned offset) | |||
694 | 697 | ||
695 | spin_lock_irqsave(&bank->lock, flags); | 698 | spin_lock_irqsave(&bank->lock, flags); |
696 | bank->mod_usage &= ~(BIT(offset)); | 699 | bank->mod_usage &= ~(BIT(offset)); |
697 | _disable_gpio_module(bank, offset); | 700 | omap_disable_gpio_module(bank, offset); |
698 | _reset_gpio(bank, bank->chip.base + offset); | 701 | omap_reset_gpio(bank, bank->chip.base + offset); |
699 | spin_unlock_irqrestore(&bank->lock, flags); | 702 | spin_unlock_irqrestore(&bank->lock, flags); |
700 | 703 | ||
701 | /* | 704 | /* |
@@ -715,7 +718,7 @@ static void omap_gpio_free(struct gpio_chip *chip, unsigned offset) | |||
715 | * line's interrupt handler has been run, we may miss some nested | 718 | * line's interrupt handler has been run, we may miss some nested |
716 | * interrupts. | 719 | * interrupts. |
717 | */ | 720 | */ |
718 | static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc) | 721 | static void omap_gpio_irq_handler(unsigned int irq, struct irq_desc *desc) |
719 | { | 722 | { |
720 | void __iomem *isr_reg = NULL; | 723 | void __iomem *isr_reg = NULL; |
721 | u32 isr; | 724 | u32 isr; |
@@ -738,7 +741,7 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc) | |||
738 | u32 isr_saved, level_mask = 0; | 741 | u32 isr_saved, level_mask = 0; |
739 | u32 enabled; | 742 | u32 enabled; |
740 | 743 | ||
741 | enabled = _get_gpio_irqbank_mask(bank); | 744 | enabled = omap_get_gpio_irqbank_mask(bank); |
742 | isr_saved = isr = readl_relaxed(isr_reg) & enabled; | 745 | isr_saved = isr = readl_relaxed(isr_reg) & enabled; |
743 | 746 | ||
744 | if (bank->level_mask) | 747 | if (bank->level_mask) |
@@ -747,9 +750,9 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc) | |||
747 | /* clear edge sensitive interrupts before handler(s) are | 750 | /* clear edge sensitive interrupts before handler(s) are |
748 | called so that we don't miss any interrupt occurred while | 751 | called so that we don't miss any interrupt occurred while |
749 | executing them */ | 752 | executing them */ |
750 | _disable_gpio_irqbank(bank, isr_saved & ~level_mask); | 753 | omap_disable_gpio_irqbank(bank, isr_saved & ~level_mask); |
751 | _clear_gpio_irqbank(bank, isr_saved & ~level_mask); | 754 | omap_clear_gpio_irqbank(bank, isr_saved & ~level_mask); |
752 | _enable_gpio_irqbank(bank, isr_saved & ~level_mask); | 755 | omap_enable_gpio_irqbank(bank, isr_saved & ~level_mask); |
753 | 756 | ||
754 | /* if there is only edge sensitive GPIO pin interrupts | 757 | /* if there is only edge sensitive GPIO pin interrupts |
755 | configured, we could unmask GPIO bank interrupt immediately */ | 758 | configured, we could unmask GPIO bank interrupt immediately */ |
@@ -773,7 +776,7 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc) | |||
773 | * This will be indicated in the bank toggle_mask. | 776 | * This will be indicated in the bank toggle_mask. |
774 | */ | 777 | */ |
775 | if (bank->toggle_mask & (BIT(bit))) | 778 | if (bank->toggle_mask & (BIT(bit))) |
776 | _toggle_gpio_edge_triggering(bank, bit); | 779 | omap_toggle_gpio_edge_triggering(bank, bit); |
777 | 780 | ||
778 | generic_handle_irq(irq_find_mapping(bank->chip.irqdomain, | 781 | generic_handle_irq(irq_find_mapping(bank->chip.irqdomain, |
779 | bit)); | 782 | bit)); |
@@ -789,18 +792,18 @@ exit: | |||
789 | pm_runtime_put(bank->dev); | 792 | pm_runtime_put(bank->dev); |
790 | } | 793 | } |
791 | 794 | ||
792 | static void gpio_irq_shutdown(struct irq_data *d) | 795 | static void omap_gpio_irq_shutdown(struct irq_data *d) |
793 | { | 796 | { |
794 | struct gpio_bank *bank = _irq_data_get_bank(d); | 797 | struct gpio_bank *bank = omap_irq_data_get_bank(d); |
795 | unsigned int gpio = irq_to_gpio(bank, d->hwirq); | 798 | unsigned int gpio = omap_irq_to_gpio(bank, d->hwirq); |
796 | unsigned long flags; | 799 | unsigned long flags; |
797 | unsigned offset = GPIO_INDEX(bank, gpio); | 800 | unsigned offset = GPIO_INDEX(bank, gpio); |
798 | 801 | ||
799 | spin_lock_irqsave(&bank->lock, flags); | 802 | spin_lock_irqsave(&bank->lock, flags); |
800 | gpio_unlock_as_irq(&bank->chip, offset); | 803 | gpio_unlock_as_irq(&bank->chip, offset); |
801 | bank->irq_usage &= ~(BIT(offset)); | 804 | bank->irq_usage &= ~(BIT(offset)); |
802 | _disable_gpio_module(bank, offset); | 805 | omap_disable_gpio_module(bank, offset); |
803 | _reset_gpio(bank, gpio); | 806 | omap_reset_gpio(bank, gpio); |
804 | spin_unlock_irqrestore(&bank->lock, flags); | 807 | spin_unlock_irqrestore(&bank->lock, flags); |
805 | 808 | ||
806 | /* | 809 | /* |
@@ -811,57 +814,57 @@ static void gpio_irq_shutdown(struct irq_data *d) | |||
811 | pm_runtime_put(bank->dev); | 814 | pm_runtime_put(bank->dev); |
812 | } | 815 | } |
813 | 816 | ||
814 | static void gpio_ack_irq(struct irq_data *d) | 817 | static void omap_gpio_ack_irq(struct irq_data *d) |
815 | { | 818 | { |
816 | struct gpio_bank *bank = _irq_data_get_bank(d); | 819 | struct gpio_bank *bank = omap_irq_data_get_bank(d); |
817 | unsigned int gpio = irq_to_gpio(bank, d->hwirq); | 820 | unsigned int gpio = omap_irq_to_gpio(bank, d->hwirq); |
818 | 821 | ||
819 | _clear_gpio_irqstatus(bank, gpio); | 822 | omap_clear_gpio_irqstatus(bank, gpio); |
820 | } | 823 | } |
821 | 824 | ||
822 | static void gpio_mask_irq(struct irq_data *d) | 825 | static void omap_gpio_mask_irq(struct irq_data *d) |
823 | { | 826 | { |
824 | struct gpio_bank *bank = _irq_data_get_bank(d); | 827 | struct gpio_bank *bank = omap_irq_data_get_bank(d); |
825 | unsigned int gpio = irq_to_gpio(bank, d->hwirq); | 828 | unsigned int gpio = omap_irq_to_gpio(bank, d->hwirq); |
826 | unsigned long flags; | 829 | unsigned long flags; |
827 | 830 | ||
828 | spin_lock_irqsave(&bank->lock, flags); | 831 | spin_lock_irqsave(&bank->lock, flags); |
829 | _set_gpio_irqenable(bank, gpio, 0); | 832 | omap_set_gpio_irqenable(bank, gpio, 0); |
830 | _set_gpio_triggering(bank, GPIO_INDEX(bank, gpio), IRQ_TYPE_NONE); | 833 | omap_set_gpio_triggering(bank, GPIO_INDEX(bank, gpio), IRQ_TYPE_NONE); |
831 | spin_unlock_irqrestore(&bank->lock, flags); | 834 | spin_unlock_irqrestore(&bank->lock, flags); |
832 | } | 835 | } |
833 | 836 | ||
834 | static void gpio_unmask_irq(struct irq_data *d) | 837 | static void omap_gpio_unmask_irq(struct irq_data *d) |
835 | { | 838 | { |
836 | struct gpio_bank *bank = _irq_data_get_bank(d); | 839 | struct gpio_bank *bank = omap_irq_data_get_bank(d); |
837 | unsigned int gpio = irq_to_gpio(bank, d->hwirq); | 840 | unsigned int gpio = omap_irq_to_gpio(bank, d->hwirq); |
838 | unsigned int irq_mask = GPIO_BIT(bank, gpio); | 841 | unsigned int irq_mask = GPIO_BIT(bank, gpio); |
839 | u32 trigger = irqd_get_trigger_type(d); | 842 | u32 trigger = irqd_get_trigger_type(d); |
840 | unsigned long flags; | 843 | unsigned long flags; |
841 | 844 | ||
842 | spin_lock_irqsave(&bank->lock, flags); | 845 | spin_lock_irqsave(&bank->lock, flags); |
843 | if (trigger) | 846 | if (trigger) |
844 | _set_gpio_triggering(bank, GPIO_INDEX(bank, gpio), trigger); | 847 | omap_set_gpio_triggering(bank, GPIO_INDEX(bank, gpio), trigger); |
845 | 848 | ||
846 | /* For level-triggered GPIOs, the clearing must be done after | 849 | /* For level-triggered GPIOs, the clearing must be done after |
847 | * the HW source is cleared, thus after the handler has run */ | 850 | * the HW source is cleared, thus after the handler has run */ |
848 | if (bank->level_mask & irq_mask) { | 851 | if (bank->level_mask & irq_mask) { |
849 | _set_gpio_irqenable(bank, gpio, 0); | 852 | omap_set_gpio_irqenable(bank, gpio, 0); |
850 | _clear_gpio_irqstatus(bank, gpio); | 853 | omap_clear_gpio_irqstatus(bank, gpio); |
851 | } | 854 | } |
852 | 855 | ||
853 | _set_gpio_irqenable(bank, gpio, 1); | 856 | omap_set_gpio_irqenable(bank, gpio, 1); |
854 | spin_unlock_irqrestore(&bank->lock, flags); | 857 | spin_unlock_irqrestore(&bank->lock, flags); |
855 | } | 858 | } |
856 | 859 | ||
857 | static struct irq_chip gpio_irq_chip = { | 860 | static struct irq_chip gpio_irq_chip = { |
858 | .name = "GPIO", | 861 | .name = "GPIO", |
859 | .irq_shutdown = gpio_irq_shutdown, | 862 | .irq_shutdown = omap_gpio_irq_shutdown, |
860 | .irq_ack = gpio_ack_irq, | 863 | .irq_ack = omap_gpio_ack_irq, |
861 | .irq_mask = gpio_mask_irq, | 864 | .irq_mask = omap_gpio_mask_irq, |
862 | .irq_unmask = gpio_unmask_irq, | 865 | .irq_unmask = omap_gpio_unmask_irq, |
863 | .irq_set_type = gpio_irq_type, | 866 | .irq_set_type = omap_gpio_irq_type, |
864 | .irq_set_wake = gpio_wake_enable, | 867 | .irq_set_wake = omap_gpio_wake_enable, |
865 | }; | 868 | }; |
866 | 869 | ||
867 | /*---------------------------------------------------------------------*/ | 870 | /*---------------------------------------------------------------------*/ |
@@ -918,7 +921,7 @@ static struct platform_device omap_mpuio_device = { | |||
918 | /* could list the /proc/iomem resources */ | 921 | /* could list the /proc/iomem resources */ |
919 | }; | 922 | }; |
920 | 923 | ||
921 | static inline void mpuio_init(struct gpio_bank *bank) | 924 | static inline void omap_mpuio_init(struct gpio_bank *bank) |
922 | { | 925 | { |
923 | platform_set_drvdata(&omap_mpuio_device, bank); | 926 | platform_set_drvdata(&omap_mpuio_device, bank); |
924 | 927 | ||
@@ -928,7 +931,7 @@ static inline void mpuio_init(struct gpio_bank *bank) | |||
928 | 931 | ||
929 | /*---------------------------------------------------------------------*/ | 932 | /*---------------------------------------------------------------------*/ |
930 | 933 | ||
931 | static int gpio_get_direction(struct gpio_chip *chip, unsigned offset) | 934 | static int omap_gpio_get_direction(struct gpio_chip *chip, unsigned offset) |
932 | { | 935 | { |
933 | struct gpio_bank *bank; | 936 | struct gpio_bank *bank; |
934 | unsigned long flags; | 937 | unsigned long flags; |
@@ -943,19 +946,19 @@ static int gpio_get_direction(struct gpio_chip *chip, unsigned offset) | |||
943 | return dir; | 946 | return dir; |
944 | } | 947 | } |
945 | 948 | ||
946 | static int gpio_input(struct gpio_chip *chip, unsigned offset) | 949 | static int omap_gpio_input(struct gpio_chip *chip, unsigned offset) |
947 | { | 950 | { |
948 | struct gpio_bank *bank; | 951 | struct gpio_bank *bank; |
949 | unsigned long flags; | 952 | unsigned long flags; |
950 | 953 | ||
951 | bank = container_of(chip, struct gpio_bank, chip); | 954 | bank = container_of(chip, struct gpio_bank, chip); |
952 | spin_lock_irqsave(&bank->lock, flags); | 955 | spin_lock_irqsave(&bank->lock, flags); |
953 | _set_gpio_direction(bank, offset, 1); | 956 | omap_set_gpio_direction(bank, offset, 1); |
954 | spin_unlock_irqrestore(&bank->lock, flags); | 957 | spin_unlock_irqrestore(&bank->lock, flags); |
955 | return 0; | 958 | return 0; |
956 | } | 959 | } |
957 | 960 | ||
958 | static int gpio_get(struct gpio_chip *chip, unsigned offset) | 961 | static int omap_gpio_get(struct gpio_chip *chip, unsigned offset) |
959 | { | 962 | { |
960 | struct gpio_bank *bank; | 963 | struct gpio_bank *bank; |
961 | u32 mask; | 964 | u32 mask; |
@@ -963,13 +966,13 @@ static int gpio_get(struct gpio_chip *chip, unsigned offset) | |||
963 | bank = container_of(chip, struct gpio_bank, chip); | 966 | bank = container_of(chip, struct gpio_bank, chip); |
964 | mask = (BIT(offset)); | 967 | mask = (BIT(offset)); |
965 | 968 | ||
966 | if (gpio_is_input(bank, mask)) | 969 | if (omap_gpio_is_input(bank, mask)) |
967 | return _get_gpio_datain(bank, offset); | 970 | return omap_get_gpio_datain(bank, offset); |
968 | else | 971 | else |
969 | return _get_gpio_dataout(bank, offset); | 972 | return omap_get_gpio_dataout(bank, offset); |
970 | } | 973 | } |
971 | 974 | ||
972 | static int gpio_output(struct gpio_chip *chip, unsigned offset, int value) | 975 | static int omap_gpio_output(struct gpio_chip *chip, unsigned offset, int value) |
973 | { | 976 | { |
974 | struct gpio_bank *bank; | 977 | struct gpio_bank *bank; |
975 | unsigned long flags; | 978 | unsigned long flags; |
@@ -977,13 +980,13 @@ static int gpio_output(struct gpio_chip *chip, unsigned offset, int value) | |||
977 | bank = container_of(chip, struct gpio_bank, chip); | 980 | bank = container_of(chip, struct gpio_bank, chip); |
978 | spin_lock_irqsave(&bank->lock, flags); | 981 | spin_lock_irqsave(&bank->lock, flags); |
979 | bank->set_dataout(bank, offset, value); | 982 | bank->set_dataout(bank, offset, value); |
980 | _set_gpio_direction(bank, offset, 0); | 983 | omap_set_gpio_direction(bank, offset, 0); |
981 | spin_unlock_irqrestore(&bank->lock, flags); | 984 | spin_unlock_irqrestore(&bank->lock, flags); |
982 | return 0; | 985 | return 0; |
983 | } | 986 | } |
984 | 987 | ||
985 | static int gpio_debounce(struct gpio_chip *chip, unsigned offset, | 988 | static int omap_gpio_debounce(struct gpio_chip *chip, unsigned offset, |
986 | unsigned debounce) | 989 | unsigned debounce) |
987 | { | 990 | { |
988 | struct gpio_bank *bank; | 991 | struct gpio_bank *bank; |
989 | unsigned long flags; | 992 | unsigned long flags; |
@@ -991,13 +994,13 @@ static int gpio_debounce(struct gpio_chip *chip, unsigned offset, | |||
991 | bank = container_of(chip, struct gpio_bank, chip); | 994 | bank = container_of(chip, struct gpio_bank, chip); |
992 | 995 | ||
993 | spin_lock_irqsave(&bank->lock, flags); | 996 | spin_lock_irqsave(&bank->lock, flags); |
994 | _set_gpio_debounce(bank, offset, debounce); | 997 | omap2_set_gpio_debounce(bank, offset, debounce); |
995 | spin_unlock_irqrestore(&bank->lock, flags); | 998 | spin_unlock_irqrestore(&bank->lock, flags); |
996 | 999 | ||
997 | return 0; | 1000 | return 0; |
998 | } | 1001 | } |
999 | 1002 | ||
1000 | static void gpio_set(struct gpio_chip *chip, unsigned offset, int value) | 1003 | static void omap_gpio_set(struct gpio_chip *chip, unsigned offset, int value) |
1001 | { | 1004 | { |
1002 | struct gpio_bank *bank; | 1005 | struct gpio_bank *bank; |
1003 | unsigned long flags; | 1006 | unsigned long flags; |
@@ -1025,11 +1028,6 @@ static void __init omap_gpio_show_rev(struct gpio_bank *bank) | |||
1025 | called = true; | 1028 | called = true; |
1026 | } | 1029 | } |
1027 | 1030 | ||
1028 | /* This lock class tells lockdep that GPIO irqs are in a different | ||
1029 | * category than their parents, so it won't report false recursion. | ||
1030 | */ | ||
1031 | static struct lock_class_key gpio_lock_class; | ||
1032 | |||
1033 | static void omap_gpio_mod_init(struct gpio_bank *bank) | 1031 | static void omap_gpio_mod_init(struct gpio_bank *bank) |
1034 | { | 1032 | { |
1035 | void __iomem *base = bank->base; | 1033 | void __iomem *base = bank->base; |
@@ -1043,8 +1041,10 @@ static void omap_gpio_mod_init(struct gpio_bank *bank) | |||
1043 | return; | 1041 | return; |
1044 | } | 1042 | } |
1045 | 1043 | ||
1046 | _gpio_rmw(base, bank->regs->irqenable, l, bank->regs->irqenable_inv); | 1044 | omap_gpio_rmw(base, bank->regs->irqenable, l, |
1047 | _gpio_rmw(base, bank->regs->irqstatus, l, !bank->regs->irqenable_inv); | 1045 | bank->regs->irqenable_inv); |
1046 | omap_gpio_rmw(base, bank->regs->irqstatus, l, | ||
1047 | !bank->regs->irqenable_inv); | ||
1048 | if (bank->regs->debounce_en) | 1048 | if (bank->regs->debounce_en) |
1049 | writel_relaxed(0, base + bank->regs->debounce_en); | 1049 | writel_relaxed(0, base + bank->regs->debounce_en); |
1050 | 1050 | ||
@@ -1078,10 +1078,10 @@ omap_mpuio_alloc_gc(struct gpio_bank *bank, unsigned int irq_start, | |||
1078 | /* NOTE: No ack required, reading IRQ status clears it. */ | 1078 | /* NOTE: No ack required, reading IRQ status clears it. */ |
1079 | ct->chip.irq_mask = irq_gc_mask_set_bit; | 1079 | ct->chip.irq_mask = irq_gc_mask_set_bit; |
1080 | ct->chip.irq_unmask = irq_gc_mask_clr_bit; | 1080 | ct->chip.irq_unmask = irq_gc_mask_clr_bit; |
1081 | ct->chip.irq_set_type = gpio_irq_type; | 1081 | ct->chip.irq_set_type = omap_gpio_irq_type; |
1082 | 1082 | ||
1083 | if (bank->regs->wkup_en) | 1083 | if (bank->regs->wkup_en) |
1084 | ct->chip.irq_set_wake = gpio_wake_enable; | 1084 | ct->chip.irq_set_wake = omap_gpio_wake_enable; |
1085 | 1085 | ||
1086 | ct->regs.mask = OMAP_MPUIO_GPIO_INT / bank->stride; | 1086 | ct->regs.mask = OMAP_MPUIO_GPIO_INT / bank->stride; |
1087 | irq_setup_generic_chip(gc, IRQ_MSK(num), IRQ_GC_INIT_MASK_CACHE, | 1087 | irq_setup_generic_chip(gc, IRQ_MSK(num), IRQ_GC_INIT_MASK_CACHE, |
@@ -1101,12 +1101,12 @@ static int omap_gpio_chip_init(struct gpio_bank *bank) | |||
1101 | */ | 1101 | */ |
1102 | bank->chip.request = omap_gpio_request; | 1102 | bank->chip.request = omap_gpio_request; |
1103 | bank->chip.free = omap_gpio_free; | 1103 | bank->chip.free = omap_gpio_free; |
1104 | bank->chip.get_direction = gpio_get_direction; | 1104 | bank->chip.get_direction = omap_gpio_get_direction; |
1105 | bank->chip.direction_input = gpio_input; | 1105 | bank->chip.direction_input = omap_gpio_input; |
1106 | bank->chip.get = gpio_get; | 1106 | bank->chip.get = omap_gpio_get; |
1107 | bank->chip.direction_output = gpio_output; | 1107 | bank->chip.direction_output = omap_gpio_output; |
1108 | bank->chip.set_debounce = gpio_debounce; | 1108 | bank->chip.set_debounce = omap_gpio_debounce; |
1109 | bank->chip.set = gpio_set; | 1109 | bank->chip.set = omap_gpio_set; |
1110 | if (bank->is_mpuio) { | 1110 | if (bank->is_mpuio) { |
1111 | bank->chip.label = "mpuio"; | 1111 | bank->chip.label = "mpuio"; |
1112 | if (bank->regs->wkup_en) | 1112 | if (bank->regs->wkup_en) |
@@ -1138,7 +1138,7 @@ static int omap_gpio_chip_init(struct gpio_bank *bank) | |||
1138 | #endif | 1138 | #endif |
1139 | 1139 | ||
1140 | ret = gpiochip_irqchip_add(&bank->chip, &gpio_irq_chip, | 1140 | ret = gpiochip_irqchip_add(&bank->chip, &gpio_irq_chip, |
1141 | irq_base, gpio_irq_handler, | 1141 | irq_base, omap_gpio_irq_handler, |
1142 | IRQ_TYPE_NONE); | 1142 | IRQ_TYPE_NONE); |
1143 | 1143 | ||
1144 | if (ret) { | 1144 | if (ret) { |
@@ -1148,11 +1148,10 @@ static int omap_gpio_chip_init(struct gpio_bank *bank) | |||
1148 | } | 1148 | } |
1149 | 1149 | ||
1150 | gpiochip_set_chained_irqchip(&bank->chip, &gpio_irq_chip, | 1150 | gpiochip_set_chained_irqchip(&bank->chip, &gpio_irq_chip, |
1151 | bank->irq, gpio_irq_handler); | 1151 | bank->irq, omap_gpio_irq_handler); |
1152 | 1152 | ||
1153 | for (j = 0; j < bank->width; j++) { | 1153 | for (j = 0; j < bank->width; j++) { |
1154 | int irq = irq_find_mapping(bank->chip.irqdomain, j); | 1154 | int irq = irq_find_mapping(bank->chip.irqdomain, j); |
1155 | irq_set_lockdep_class(irq, &gpio_lock_class); | ||
1156 | if (bank->is_mpuio) { | 1155 | if (bank->is_mpuio) { |
1157 | omap_mpuio_alloc_gc(bank, irq, bank->width); | 1156 | omap_mpuio_alloc_gc(bank, irq, bank->width); |
1158 | irq_set_chip_and_handler(irq, NULL, NULL); | 1157 | irq_set_chip_and_handler(irq, NULL, NULL); |
@@ -1217,9 +1216,9 @@ static int omap_gpio_probe(struct platform_device *pdev) | |||
1217 | } | 1216 | } |
1218 | 1217 | ||
1219 | if (bank->regs->set_dataout && bank->regs->clr_dataout) | 1218 | if (bank->regs->set_dataout && bank->regs->clr_dataout) |
1220 | bank->set_dataout = _set_gpio_dataout_reg; | 1219 | bank->set_dataout = omap_set_gpio_dataout_reg; |
1221 | else | 1220 | else |
1222 | bank->set_dataout = _set_gpio_dataout_mask; | 1221 | bank->set_dataout = omap_set_gpio_dataout_mask; |
1223 | 1222 | ||
1224 | spin_lock_init(&bank->lock); | 1223 | spin_lock_init(&bank->lock); |
1225 | 1224 | ||
@@ -1238,7 +1237,7 @@ static int omap_gpio_probe(struct platform_device *pdev) | |||
1238 | pm_runtime_get_sync(bank->dev); | 1237 | pm_runtime_get_sync(bank->dev); |
1239 | 1238 | ||
1240 | if (bank->is_mpuio) | 1239 | if (bank->is_mpuio) |
1241 | mpuio_init(bank); | 1240 | omap_mpuio_init(bank); |
1242 | 1241 | ||
1243 | omap_gpio_mod_init(bank); | 1242 | omap_gpio_mod_init(bank); |
1244 | 1243 | ||
@@ -1320,7 +1319,7 @@ update_gpio_context_count: | |||
1320 | bank->context_loss_count = | 1319 | bank->context_loss_count = |
1321 | bank->get_context_loss_count(bank->dev); | 1320 | bank->get_context_loss_count(bank->dev); |
1322 | 1321 | ||
1323 | _gpio_dbck_disable(bank); | 1322 | omap_gpio_dbck_disable(bank); |
1324 | spin_unlock_irqrestore(&bank->lock, flags); | 1323 | spin_unlock_irqrestore(&bank->lock, flags); |
1325 | 1324 | ||
1326 | return 0; | 1325 | return 0; |
@@ -1351,7 +1350,7 @@ static int omap_gpio_runtime_resume(struct device *dev) | |||
1351 | bank->get_context_loss_count(bank->dev); | 1350 | bank->get_context_loss_count(bank->dev); |
1352 | } | 1351 | } |
1353 | 1352 | ||
1354 | _gpio_dbck_enable(bank); | 1353 | omap_gpio_dbck_enable(bank); |
1355 | 1354 | ||
1356 | /* | 1355 | /* |
1357 | * In ->runtime_suspend(), level-triggered, wakeup-enabled | 1356 | * In ->runtime_suspend(), level-triggered, wakeup-enabled |
diff --git a/drivers/gpio/gpio-palmas.c b/drivers/gpio/gpio-palmas.c index 86bdbe362068..171a6389f9ce 100644 --- a/drivers/gpio/gpio-palmas.c +++ b/drivers/gpio/gpio-palmas.c | |||
@@ -210,7 +210,8 @@ static int palmas_gpio_remove(struct platform_device *pdev) | |||
210 | { | 210 | { |
211 | struct palmas_gpio *palmas_gpio = platform_get_drvdata(pdev); | 211 | struct palmas_gpio *palmas_gpio = platform_get_drvdata(pdev); |
212 | 212 | ||
213 | return gpiochip_remove(&palmas_gpio->gpio_chip); | 213 | gpiochip_remove(&palmas_gpio->gpio_chip); |
214 | return 0; | ||
214 | } | 215 | } |
215 | 216 | ||
216 | static struct platform_driver palmas_gpio_driver = { | 217 | static struct platform_driver palmas_gpio_driver = { |
diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c index e721a37c3473..f9961eea2120 100644 --- a/drivers/gpio/gpio-pca953x.c +++ b/drivers/gpio/gpio-pca953x.c | |||
@@ -765,12 +765,7 @@ static int pca953x_remove(struct i2c_client *client) | |||
765 | } | 765 | } |
766 | } | 766 | } |
767 | 767 | ||
768 | ret = gpiochip_remove(&chip->gpio_chip); | 768 | gpiochip_remove(&chip->gpio_chip); |
769 | if (ret) { | ||
770 | dev_err(&client->dev, "%s failed, %d\n", | ||
771 | "gpiochip_remove()", ret); | ||
772 | return ret; | ||
773 | } | ||
774 | 769 | ||
775 | return 0; | 770 | return 0; |
776 | } | 771 | } |
diff --git a/drivers/gpio/gpio-pcf857x.c b/drivers/gpio/gpio-pcf857x.c index 27b46751ea7e..236708ad0a5b 100644 --- a/drivers/gpio/gpio-pcf857x.c +++ b/drivers/gpio/gpio-pcf857x.c | |||
@@ -444,9 +444,7 @@ static int pcf857x_remove(struct i2c_client *client) | |||
444 | if (client->irq) | 444 | if (client->irq) |
445 | pcf857x_irq_domain_cleanup(gpio); | 445 | pcf857x_irq_domain_cleanup(gpio); |
446 | 446 | ||
447 | status = gpiochip_remove(&gpio->chip); | 447 | gpiochip_remove(&gpio->chip); |
448 | if (status) | ||
449 | dev_err(&client->dev, "%s --> %d\n", "remove", status); | ||
450 | return status; | 448 | return status; |
451 | } | 449 | } |
452 | 450 | ||
diff --git a/drivers/gpio/gpio-pch.c b/drivers/gpio/gpio-pch.c index d6eac9b17db9..e0ac549dccb5 100644 --- a/drivers/gpio/gpio-pch.c +++ b/drivers/gpio/gpio-pch.c | |||
@@ -426,9 +426,7 @@ end: | |||
426 | 426 | ||
427 | err_request_irq: | 427 | err_request_irq: |
428 | irq_free_descs(irq_base, gpio_pins[chip->ioh]); | 428 | irq_free_descs(irq_base, gpio_pins[chip->ioh]); |
429 | 429 | gpiochip_remove(&chip->gpio); | |
430 | if (gpiochip_remove(&chip->gpio)) | ||
431 | dev_err(&pdev->dev, "%s gpiochip_remove failed\n", __func__); | ||
432 | 430 | ||
433 | err_gpiochip_add: | 431 | err_gpiochip_add: |
434 | pci_iounmap(pdev, chip->base); | 432 | pci_iounmap(pdev, chip->base); |
@@ -447,7 +445,6 @@ err_pci_enable: | |||
447 | 445 | ||
448 | static void pch_gpio_remove(struct pci_dev *pdev) | 446 | static void pch_gpio_remove(struct pci_dev *pdev) |
449 | { | 447 | { |
450 | int err; | ||
451 | struct pch_gpio *chip = pci_get_drvdata(pdev); | 448 | struct pch_gpio *chip = pci_get_drvdata(pdev); |
452 | 449 | ||
453 | if (chip->irq_base != -1) { | 450 | if (chip->irq_base != -1) { |
@@ -456,10 +453,7 @@ static void pch_gpio_remove(struct pci_dev *pdev) | |||
456 | irq_free_descs(chip->irq_base, gpio_pins[chip->ioh]); | 453 | irq_free_descs(chip->irq_base, gpio_pins[chip->ioh]); |
457 | } | 454 | } |
458 | 455 | ||
459 | err = gpiochip_remove(&chip->gpio); | 456 | gpiochip_remove(&chip->gpio); |
460 | if (err) | ||
461 | dev_err(&pdev->dev, "Failed gpiochip_remove\n"); | ||
462 | |||
463 | pci_iounmap(pdev, chip->base); | 457 | pci_iounmap(pdev, chip->base); |
464 | pci_release_regions(pdev); | 458 | pci_release_regions(pdev); |
465 | pci_disable_device(pdev); | 459 | pci_disable_device(pdev); |
diff --git a/drivers/gpio/gpio-pxa.c b/drivers/gpio/gpio-pxa.c index 42e6e64f2120..ad3feec0075e 100644 --- a/drivers/gpio/gpio-pxa.c +++ b/drivers/gpio/gpio-pxa.c | |||
@@ -498,7 +498,7 @@ static int pxa_gpio_nums(struct platform_device *pdev) | |||
498 | } | 498 | } |
499 | 499 | ||
500 | #ifdef CONFIG_OF | 500 | #ifdef CONFIG_OF |
501 | static struct of_device_id pxa_gpio_dt_ids[] = { | 501 | static const struct of_device_id pxa_gpio_dt_ids[] = { |
502 | { .compatible = "intel,pxa25x-gpio", .data = &pxa25x_id, }, | 502 | { .compatible = "intel,pxa25x-gpio", .data = &pxa25x_id, }, |
503 | { .compatible = "intel,pxa26x-gpio", .data = &pxa26x_id, }, | 503 | { .compatible = "intel,pxa26x-gpio", .data = &pxa26x_id, }, |
504 | { .compatible = "intel,pxa27x-gpio", .data = &pxa27x_id, }, | 504 | { .compatible = "intel,pxa27x-gpio", .data = &pxa27x_id, }, |
@@ -649,6 +649,11 @@ static int pxa_gpio_probe(struct platform_device *pdev) | |||
649 | handle_edge_irq); | 649 | handle_edge_irq); |
650 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); | 650 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); |
651 | } | 651 | } |
652 | } else { | ||
653 | if (irq0 > 0) | ||
654 | irq_set_chained_handler(irq0, pxa_gpio_demux_handler); | ||
655 | if (irq1 > 0) | ||
656 | irq_set_chained_handler(irq1, pxa_gpio_demux_handler); | ||
652 | } | 657 | } |
653 | 658 | ||
654 | irq_set_chained_handler(irq_mux, pxa_gpio_demux_handler); | 659 | irq_set_chained_handler(irq_mux, pxa_gpio_demux_handler); |
diff --git a/drivers/gpio/gpio-rc5t583.c b/drivers/gpio/gpio-rc5t583.c index 562b0c4d9cc8..769233d2da6d 100644 --- a/drivers/gpio/gpio-rc5t583.c +++ b/drivers/gpio/gpio-rc5t583.c | |||
@@ -148,7 +148,8 @@ static int rc5t583_gpio_remove(struct platform_device *pdev) | |||
148 | { | 148 | { |
149 | struct rc5t583_gpio *rc5t583_gpio = platform_get_drvdata(pdev); | 149 | struct rc5t583_gpio *rc5t583_gpio = platform_get_drvdata(pdev); |
150 | 150 | ||
151 | return gpiochip_remove(&rc5t583_gpio->gpio_chip); | 151 | gpiochip_remove(&rc5t583_gpio->gpio_chip); |
152 | return 0; | ||
152 | } | 153 | } |
153 | 154 | ||
154 | static struct platform_driver rc5t583_gpio_driver = { | 155 | static struct platform_driver rc5t583_gpio_driver = { |
diff --git a/drivers/gpio/gpio-rcar.c b/drivers/gpio/gpio-rcar.c index 0c9f803fc1ac..bf6c09450fee 100644 --- a/drivers/gpio/gpio-rcar.c +++ b/drivers/gpio/gpio-rcar.c | |||
@@ -240,9 +240,9 @@ static int gpio_rcar_get(struct gpio_chip *chip, unsigned offset) | |||
240 | /* testing on r8a7790 shows that INDT does not show correct pin state | 240 | /* testing on r8a7790 shows that INDT does not show correct pin state |
241 | * when configured as output, so use OUTDT in case of output pins */ | 241 | * when configured as output, so use OUTDT in case of output pins */ |
242 | if (gpio_rcar_read(gpio_to_priv(chip), INOUTSEL) & bit) | 242 | if (gpio_rcar_read(gpio_to_priv(chip), INOUTSEL) & bit) |
243 | return (int)(gpio_rcar_read(gpio_to_priv(chip), OUTDT) & bit); | 243 | return !!(gpio_rcar_read(gpio_to_priv(chip), OUTDT) & bit); |
244 | else | 244 | else |
245 | return (int)(gpio_rcar_read(gpio_to_priv(chip), INDT) & bit); | 245 | return !!(gpio_rcar_read(gpio_to_priv(chip), INDT) & bit); |
246 | } | 246 | } |
247 | 247 | ||
248 | static void gpio_rcar_set(struct gpio_chip *chip, unsigned offset, int value) | 248 | static void gpio_rcar_set(struct gpio_chip *chip, unsigned offset, int value) |
@@ -284,6 +284,7 @@ static int gpio_rcar_irq_domain_map(struct irq_domain *h, unsigned int irq, | |||
284 | 284 | ||
285 | static struct irq_domain_ops gpio_rcar_irq_domain_ops = { | 285 | static struct irq_domain_ops gpio_rcar_irq_domain_ops = { |
286 | .map = gpio_rcar_irq_domain_map, | 286 | .map = gpio_rcar_irq_domain_map, |
287 | .xlate = irq_domain_xlate_twocell, | ||
287 | }; | 288 | }; |
288 | 289 | ||
289 | struct gpio_rcar_info { | 290 | struct gpio_rcar_info { |
@@ -471,11 +472,8 @@ err0: | |||
471 | static int gpio_rcar_remove(struct platform_device *pdev) | 472 | static int gpio_rcar_remove(struct platform_device *pdev) |
472 | { | 473 | { |
473 | struct gpio_rcar_priv *p = platform_get_drvdata(pdev); | 474 | struct gpio_rcar_priv *p = platform_get_drvdata(pdev); |
474 | int ret; | ||
475 | 475 | ||
476 | ret = gpiochip_remove(&p->gpio_chip); | 476 | gpiochip_remove(&p->gpio_chip); |
477 | if (ret) | ||
478 | return ret; | ||
479 | 477 | ||
480 | irq_domain_remove(p->irq_domain); | 478 | irq_domain_remove(p->irq_domain); |
481 | pm_runtime_put(&pdev->dev); | 479 | pm_runtime_put(&pdev->dev); |
diff --git a/drivers/gpio/gpio-rdc321x.c b/drivers/gpio/gpio-rdc321x.c index 9fa7e53331c9..d729bc8a554d 100644 --- a/drivers/gpio/gpio-rdc321x.c +++ b/drivers/gpio/gpio-rdc321x.c | |||
@@ -199,14 +199,11 @@ static int rdc321x_gpio_probe(struct platform_device *pdev) | |||
199 | 199 | ||
200 | static int rdc321x_gpio_remove(struct platform_device *pdev) | 200 | static int rdc321x_gpio_remove(struct platform_device *pdev) |
201 | { | 201 | { |
202 | int ret; | ||
203 | struct rdc321x_gpio *rdc321x_gpio_dev = platform_get_drvdata(pdev); | 202 | struct rdc321x_gpio *rdc321x_gpio_dev = platform_get_drvdata(pdev); |
204 | 203 | ||
205 | ret = gpiochip_remove(&rdc321x_gpio_dev->chip); | 204 | gpiochip_remove(&rdc321x_gpio_dev->chip); |
206 | if (ret) | ||
207 | dev_err(&pdev->dev, "failed to unregister chip\n"); | ||
208 | 205 | ||
209 | return ret; | 206 | return 0; |
210 | } | 207 | } |
211 | 208 | ||
212 | static struct platform_driver rdc321x_gpio_driver = { | 209 | static struct platform_driver rdc321x_gpio_driver = { |
diff --git a/drivers/gpio/gpio-samsung.c b/drivers/gpio/gpio-samsung.c index 07105ee5c9ae..3810da47043f 100644 --- a/drivers/gpio/gpio-samsung.c +++ b/drivers/gpio/gpio-samsung.c | |||
@@ -32,10 +32,7 @@ | |||
32 | 32 | ||
33 | #include <mach/map.h> | 33 | #include <mach/map.h> |
34 | #include <mach/regs-gpio.h> | 34 | #include <mach/regs-gpio.h> |
35 | |||
36 | #if defined(CONFIG_ARCH_S3C24XX) || defined(CONFIG_ARCH_S3C64XX) | ||
37 | #include <mach/gpio-samsung.h> | 35 | #include <mach/gpio-samsung.h> |
38 | #endif | ||
39 | 36 | ||
40 | #include <plat/cpu.h> | 37 | #include <plat/cpu.h> |
41 | #include <plat/gpio-core.h> | 38 | #include <plat/gpio-core.h> |
@@ -358,47 +355,6 @@ static unsigned s3c24xx_gpio_getcfg_abank(struct samsung_gpio_chip *chip, | |||
358 | } | 355 | } |
359 | #endif | 356 | #endif |
360 | 357 | ||
361 | #if defined(CONFIG_CPU_S5P6440) || defined(CONFIG_CPU_S5P6450) | ||
362 | static int s5p64x0_gpio_setcfg_rbank(struct samsung_gpio_chip *chip, | ||
363 | unsigned int off, unsigned int cfg) | ||
364 | { | ||
365 | void __iomem *reg = chip->base; | ||
366 | unsigned int shift; | ||
367 | u32 con; | ||
368 | |||
369 | switch (off) { | ||
370 | case 0: | ||
371 | case 1: | ||
372 | case 2: | ||
373 | case 3: | ||
374 | case 4: | ||
375 | case 5: | ||
376 | shift = (off & 7) * 4; | ||
377 | reg -= 4; | ||
378 | break; | ||
379 | case 6: | ||
380 | shift = ((off + 1) & 7) * 4; | ||
381 | reg -= 4; | ||
382 | break; | ||
383 | default: | ||
384 | shift = ((off + 1) & 7) * 4; | ||
385 | break; | ||
386 | } | ||
387 | |||
388 | if (samsung_gpio_is_cfg_special(cfg)) { | ||
389 | cfg &= 0xf; | ||
390 | cfg <<= shift; | ||
391 | } | ||
392 | |||
393 | con = __raw_readl(reg); | ||
394 | con &= ~(0xf << shift); | ||
395 | con |= cfg; | ||
396 | __raw_writel(con, reg); | ||
397 | |||
398 | return 0; | ||
399 | } | ||
400 | #endif | ||
401 | |||
402 | static void __init samsung_gpiolib_set_cfg(struct samsung_gpio_cfg *chipcfg, | 358 | static void __init samsung_gpiolib_set_cfg(struct samsung_gpio_cfg *chipcfg, |
403 | int nr_chips) | 359 | int nr_chips) |
404 | { | 360 | { |
@@ -426,16 +382,6 @@ static struct samsung_gpio_cfg s3c24xx_gpiocfg_banka = { | |||
426 | }; | 382 | }; |
427 | #endif | 383 | #endif |
428 | 384 | ||
429 | #if defined(CONFIG_CPU_S5P6440) || defined(CONFIG_CPU_S5P6450) | ||
430 | static struct samsung_gpio_cfg s5p64x0_gpio_cfg_rbank = { | ||
431 | .cfg_eint = 0x3, | ||
432 | .set_config = s5p64x0_gpio_setcfg_rbank, | ||
433 | .get_config = samsung_gpio_getcfg_4bit, | ||
434 | .set_pull = samsung_gpio_setpull_updown, | ||
435 | .get_pull = samsung_gpio_getpull_updown, | ||
436 | }; | ||
437 | #endif | ||
438 | |||
439 | static struct samsung_gpio_cfg samsung_gpio_cfgs[] = { | 385 | static struct samsung_gpio_cfg samsung_gpio_cfgs[] = { |
440 | [0] = { | 386 | [0] = { |
441 | .cfg_eint = 0x0, | 387 | .cfg_eint = 0x0, |
@@ -708,91 +654,6 @@ static int s3c24xx_gpiolib_banka_output(struct gpio_chip *chip, | |||
708 | } | 654 | } |
709 | #endif | 655 | #endif |
710 | 656 | ||
711 | /* The next set of routines are for the case of s5p64x0 bank r */ | ||
712 | |||
713 | static int s5p64x0_gpiolib_rbank_input(struct gpio_chip *chip, | ||
714 | unsigned int offset) | ||
715 | { | ||
716 | struct samsung_gpio_chip *ourchip = to_samsung_gpio(chip); | ||
717 | void __iomem *base = ourchip->base; | ||
718 | void __iomem *regcon = base; | ||
719 | unsigned long con; | ||
720 | unsigned long flags; | ||
721 | |||
722 | switch (offset) { | ||
723 | case 6: | ||
724 | offset += 1; | ||
725 | case 0: | ||
726 | case 1: | ||
727 | case 2: | ||
728 | case 3: | ||
729 | case 4: | ||
730 | case 5: | ||
731 | regcon -= 4; | ||
732 | break; | ||
733 | default: | ||
734 | offset -= 7; | ||
735 | break; | ||
736 | } | ||
737 | |||
738 | samsung_gpio_lock(ourchip, flags); | ||
739 | |||
740 | con = __raw_readl(regcon); | ||
741 | con &= ~(0xf << con_4bit_shift(offset)); | ||
742 | __raw_writel(con, regcon); | ||
743 | |||
744 | samsung_gpio_unlock(ourchip, flags); | ||
745 | |||
746 | return 0; | ||
747 | } | ||
748 | |||
749 | static int s5p64x0_gpiolib_rbank_output(struct gpio_chip *chip, | ||
750 | unsigned int offset, int value) | ||
751 | { | ||
752 | struct samsung_gpio_chip *ourchip = to_samsung_gpio(chip); | ||
753 | void __iomem *base = ourchip->base; | ||
754 | void __iomem *regcon = base; | ||
755 | unsigned long con; | ||
756 | unsigned long dat; | ||
757 | unsigned long flags; | ||
758 | unsigned con_offset = offset; | ||
759 | |||
760 | switch (con_offset) { | ||
761 | case 6: | ||
762 | con_offset += 1; | ||
763 | case 0: | ||
764 | case 1: | ||
765 | case 2: | ||
766 | case 3: | ||
767 | case 4: | ||
768 | case 5: | ||
769 | regcon -= 4; | ||
770 | break; | ||
771 | default: | ||
772 | con_offset -= 7; | ||
773 | break; | ||
774 | } | ||
775 | |||
776 | samsung_gpio_lock(ourchip, flags); | ||
777 | |||
778 | con = __raw_readl(regcon); | ||
779 | con &= ~(0xf << con_4bit_shift(con_offset)); | ||
780 | con |= 0x1 << con_4bit_shift(con_offset); | ||
781 | |||
782 | dat = __raw_readl(base + GPIODAT_OFF); | ||
783 | if (value) | ||
784 | dat |= 1 << offset; | ||
785 | else | ||
786 | dat &= ~(1 << offset); | ||
787 | |||
788 | __raw_writel(con, regcon); | ||
789 | __raw_writel(dat, base + GPIODAT_OFF); | ||
790 | |||
791 | samsung_gpio_unlock(ourchip, flags); | ||
792 | |||
793 | return 0; | ||
794 | } | ||
795 | |||
796 | static void samsung_gpiolib_set(struct gpio_chip *chip, | 657 | static void samsung_gpiolib_set(struct gpio_chip *chip, |
797 | unsigned offset, int value) | 658 | unsigned offset, int value) |
798 | { | 659 | { |
@@ -999,20 +860,6 @@ static void __init samsung_gpiolib_add_4bit2_chips(struct samsung_gpio_chip *chi | |||
999 | } | 860 | } |
1000 | } | 861 | } |
1001 | 862 | ||
1002 | static void __init s5p64x0_gpiolib_add_rbank(struct samsung_gpio_chip *chip, | ||
1003 | int nr_chips) | ||
1004 | { | ||
1005 | for (; nr_chips > 0; nr_chips--, chip++) { | ||
1006 | chip->chip.direction_input = s5p64x0_gpiolib_rbank_input; | ||
1007 | chip->chip.direction_output = s5p64x0_gpiolib_rbank_output; | ||
1008 | |||
1009 | if (!chip->pm) | ||
1010 | chip->pm = __gpio_pm(&samsung_gpio_pm_4bit); | ||
1011 | |||
1012 | samsung_gpiolib_add(chip); | ||
1013 | } | ||
1014 | } | ||
1015 | |||
1016 | int samsung_gpiolib_to_irq(struct gpio_chip *chip, unsigned int offset) | 863 | int samsung_gpiolib_to_irq(struct gpio_chip *chip, unsigned int offset) |
1017 | { | 864 | { |
1018 | struct samsung_gpio_chip *samsung_chip = container_of(chip, struct samsung_gpio_chip, chip); | 865 | struct samsung_gpio_chip *samsung_chip = container_of(chip, struct samsung_gpio_chip, chip); |
@@ -1319,773 +1166,9 @@ static struct samsung_gpio_chip s3c64xx_gpios_2bit[] = { | |||
1319 | #endif | 1166 | #endif |
1320 | }; | 1167 | }; |
1321 | 1168 | ||
1322 | /* | ||
1323 | * S5P6440 GPIO bank summary: | ||
1324 | * | ||
1325 | * Bank GPIOs Style SlpCon ExtInt Group | ||
1326 | * A 6 4Bit Yes 1 | ||
1327 | * B 7 4Bit Yes 1 | ||
1328 | * C 8 4Bit Yes 2 | ||
1329 | * F 2 2Bit Yes 4 [1] | ||
1330 | * G 7 4Bit Yes 5 | ||
1331 | * H 10 4Bit[2] Yes 6 | ||
1332 | * I 16 2Bit Yes None | ||
1333 | * J 12 2Bit Yes None | ||
1334 | * N 16 2Bit No IRQ_EINT | ||
1335 | * P 8 2Bit Yes 8 | ||
1336 | * R 15 4Bit[2] Yes 8 | ||
1337 | */ | ||
1338 | |||
1339 | static struct samsung_gpio_chip s5p6440_gpios_4bit[] = { | ||
1340 | #ifdef CONFIG_CPU_S5P6440 | ||
1341 | { | ||
1342 | .chip = { | ||
1343 | .base = S5P6440_GPA(0), | ||
1344 | .ngpio = S5P6440_GPIO_A_NR, | ||
1345 | .label = "GPA", | ||
1346 | }, | ||
1347 | }, { | ||
1348 | .chip = { | ||
1349 | .base = S5P6440_GPB(0), | ||
1350 | .ngpio = S5P6440_GPIO_B_NR, | ||
1351 | .label = "GPB", | ||
1352 | }, | ||
1353 | }, { | ||
1354 | .chip = { | ||
1355 | .base = S5P6440_GPC(0), | ||
1356 | .ngpio = S5P6440_GPIO_C_NR, | ||
1357 | .label = "GPC", | ||
1358 | }, | ||
1359 | }, { | ||
1360 | .base = S5P64X0_GPG_BASE, | ||
1361 | .chip = { | ||
1362 | .base = S5P6440_GPG(0), | ||
1363 | .ngpio = S5P6440_GPIO_G_NR, | ||
1364 | .label = "GPG", | ||
1365 | }, | ||
1366 | }, | ||
1367 | #endif | ||
1368 | }; | ||
1369 | |||
1370 | static struct samsung_gpio_chip s5p6440_gpios_4bit2[] = { | ||
1371 | #ifdef CONFIG_CPU_S5P6440 | ||
1372 | { | ||
1373 | .base = S5P64X0_GPH_BASE + 0x4, | ||
1374 | .chip = { | ||
1375 | .base = S5P6440_GPH(0), | ||
1376 | .ngpio = S5P6440_GPIO_H_NR, | ||
1377 | .label = "GPH", | ||
1378 | }, | ||
1379 | }, | ||
1380 | #endif | ||
1381 | }; | ||
1382 | |||
1383 | static struct samsung_gpio_chip s5p6440_gpios_rbank[] = { | ||
1384 | #ifdef CONFIG_CPU_S5P6440 | ||
1385 | { | ||
1386 | .base = S5P64X0_GPR_BASE + 0x4, | ||
1387 | .config = &s5p64x0_gpio_cfg_rbank, | ||
1388 | .chip = { | ||
1389 | .base = S5P6440_GPR(0), | ||
1390 | .ngpio = S5P6440_GPIO_R_NR, | ||
1391 | .label = "GPR", | ||
1392 | }, | ||
1393 | }, | ||
1394 | #endif | ||
1395 | }; | ||
1396 | |||
1397 | static struct samsung_gpio_chip s5p6440_gpios_2bit[] = { | ||
1398 | #ifdef CONFIG_CPU_S5P6440 | ||
1399 | { | ||
1400 | .base = S5P64X0_GPF_BASE, | ||
1401 | .config = &samsung_gpio_cfgs[6], | ||
1402 | .chip = { | ||
1403 | .base = S5P6440_GPF(0), | ||
1404 | .ngpio = S5P6440_GPIO_F_NR, | ||
1405 | .label = "GPF", | ||
1406 | }, | ||
1407 | }, { | ||
1408 | .base = S5P64X0_GPI_BASE, | ||
1409 | .config = &samsung_gpio_cfgs[4], | ||
1410 | .chip = { | ||
1411 | .base = S5P6440_GPI(0), | ||
1412 | .ngpio = S5P6440_GPIO_I_NR, | ||
1413 | .label = "GPI", | ||
1414 | }, | ||
1415 | }, { | ||
1416 | .base = S5P64X0_GPJ_BASE, | ||
1417 | .config = &samsung_gpio_cfgs[4], | ||
1418 | .chip = { | ||
1419 | .base = S5P6440_GPJ(0), | ||
1420 | .ngpio = S5P6440_GPIO_J_NR, | ||
1421 | .label = "GPJ", | ||
1422 | }, | ||
1423 | }, { | ||
1424 | .base = S5P64X0_GPN_BASE, | ||
1425 | .config = &samsung_gpio_cfgs[5], | ||
1426 | .chip = { | ||
1427 | .base = S5P6440_GPN(0), | ||
1428 | .ngpio = S5P6440_GPIO_N_NR, | ||
1429 | .label = "GPN", | ||
1430 | }, | ||
1431 | }, { | ||
1432 | .base = S5P64X0_GPP_BASE, | ||
1433 | .config = &samsung_gpio_cfgs[6], | ||
1434 | .chip = { | ||
1435 | .base = S5P6440_GPP(0), | ||
1436 | .ngpio = S5P6440_GPIO_P_NR, | ||
1437 | .label = "GPP", | ||
1438 | }, | ||
1439 | }, | ||
1440 | #endif | ||
1441 | }; | ||
1442 | |||
1443 | /* | ||
1444 | * S5P6450 GPIO bank summary: | ||
1445 | * | ||
1446 | * Bank GPIOs Style SlpCon ExtInt Group | ||
1447 | * A 6 4Bit Yes 1 | ||
1448 | * B 7 4Bit Yes 1 | ||
1449 | * C 8 4Bit Yes 2 | ||
1450 | * D 8 4Bit Yes None | ||
1451 | * F 2 2Bit Yes None | ||
1452 | * G 14 4Bit[2] Yes 5 | ||
1453 | * H 10 4Bit[2] Yes 6 | ||
1454 | * I 16 2Bit Yes None | ||
1455 | * J 12 2Bit Yes None | ||
1456 | * K 5 4Bit Yes None | ||
1457 | * N 16 2Bit No IRQ_EINT | ||
1458 | * P 11 2Bit Yes 8 | ||
1459 | * Q 14 2Bit Yes None | ||
1460 | * R 15 4Bit[2] Yes None | ||
1461 | * S 8 2Bit Yes None | ||
1462 | * | ||
1463 | * [1] BANKF pins 14,15 do not form part of the external interrupt sources | ||
1464 | * [2] BANK has two control registers, GPxCON0 and GPxCON1 | ||
1465 | */ | ||
1466 | |||
1467 | static struct samsung_gpio_chip s5p6450_gpios_4bit[] = { | ||
1468 | #ifdef CONFIG_CPU_S5P6450 | ||
1469 | { | ||
1470 | .chip = { | ||
1471 | .base = S5P6450_GPA(0), | ||
1472 | .ngpio = S5P6450_GPIO_A_NR, | ||
1473 | .label = "GPA", | ||
1474 | }, | ||
1475 | }, { | ||
1476 | .chip = { | ||
1477 | .base = S5P6450_GPB(0), | ||
1478 | .ngpio = S5P6450_GPIO_B_NR, | ||
1479 | .label = "GPB", | ||
1480 | }, | ||
1481 | }, { | ||
1482 | .chip = { | ||
1483 | .base = S5P6450_GPC(0), | ||
1484 | .ngpio = S5P6450_GPIO_C_NR, | ||
1485 | .label = "GPC", | ||
1486 | }, | ||
1487 | }, { | ||
1488 | .chip = { | ||
1489 | .base = S5P6450_GPD(0), | ||
1490 | .ngpio = S5P6450_GPIO_D_NR, | ||
1491 | .label = "GPD", | ||
1492 | }, | ||
1493 | }, { | ||
1494 | .base = S5P6450_GPK_BASE, | ||
1495 | .chip = { | ||
1496 | .base = S5P6450_GPK(0), | ||
1497 | .ngpio = S5P6450_GPIO_K_NR, | ||
1498 | .label = "GPK", | ||
1499 | }, | ||
1500 | }, | ||
1501 | #endif | ||
1502 | }; | ||
1503 | |||
1504 | static struct samsung_gpio_chip s5p6450_gpios_4bit2[] = { | ||
1505 | #ifdef CONFIG_CPU_S5P6450 | ||
1506 | { | ||
1507 | .base = S5P64X0_GPG_BASE + 0x4, | ||
1508 | .chip = { | ||
1509 | .base = S5P6450_GPG(0), | ||
1510 | .ngpio = S5P6450_GPIO_G_NR, | ||
1511 | .label = "GPG", | ||
1512 | }, | ||
1513 | }, { | ||
1514 | .base = S5P64X0_GPH_BASE + 0x4, | ||
1515 | .chip = { | ||
1516 | .base = S5P6450_GPH(0), | ||
1517 | .ngpio = S5P6450_GPIO_H_NR, | ||
1518 | .label = "GPH", | ||
1519 | }, | ||
1520 | }, | ||
1521 | #endif | ||
1522 | }; | ||
1523 | |||
1524 | static struct samsung_gpio_chip s5p6450_gpios_rbank[] = { | ||
1525 | #ifdef CONFIG_CPU_S5P6450 | ||
1526 | { | ||
1527 | .base = S5P64X0_GPR_BASE + 0x4, | ||
1528 | .config = &s5p64x0_gpio_cfg_rbank, | ||
1529 | .chip = { | ||
1530 | .base = S5P6450_GPR(0), | ||
1531 | .ngpio = S5P6450_GPIO_R_NR, | ||
1532 | .label = "GPR", | ||
1533 | }, | ||
1534 | }, | ||
1535 | #endif | ||
1536 | }; | ||
1537 | |||
1538 | static struct samsung_gpio_chip s5p6450_gpios_2bit[] = { | ||
1539 | #ifdef CONFIG_CPU_S5P6450 | ||
1540 | { | ||
1541 | .base = S5P64X0_GPF_BASE, | ||
1542 | .config = &samsung_gpio_cfgs[6], | ||
1543 | .chip = { | ||
1544 | .base = S5P6450_GPF(0), | ||
1545 | .ngpio = S5P6450_GPIO_F_NR, | ||
1546 | .label = "GPF", | ||
1547 | }, | ||
1548 | }, { | ||
1549 | .base = S5P64X0_GPI_BASE, | ||
1550 | .config = &samsung_gpio_cfgs[4], | ||
1551 | .chip = { | ||
1552 | .base = S5P6450_GPI(0), | ||
1553 | .ngpio = S5P6450_GPIO_I_NR, | ||
1554 | .label = "GPI", | ||
1555 | }, | ||
1556 | }, { | ||
1557 | .base = S5P64X0_GPJ_BASE, | ||
1558 | .config = &samsung_gpio_cfgs[4], | ||
1559 | .chip = { | ||
1560 | .base = S5P6450_GPJ(0), | ||
1561 | .ngpio = S5P6450_GPIO_J_NR, | ||
1562 | .label = "GPJ", | ||
1563 | }, | ||
1564 | }, { | ||
1565 | .base = S5P64X0_GPN_BASE, | ||
1566 | .config = &samsung_gpio_cfgs[5], | ||
1567 | .chip = { | ||
1568 | .base = S5P6450_GPN(0), | ||
1569 | .ngpio = S5P6450_GPIO_N_NR, | ||
1570 | .label = "GPN", | ||
1571 | }, | ||
1572 | }, { | ||
1573 | .base = S5P64X0_GPP_BASE, | ||
1574 | .config = &samsung_gpio_cfgs[6], | ||
1575 | .chip = { | ||
1576 | .base = S5P6450_GPP(0), | ||
1577 | .ngpio = S5P6450_GPIO_P_NR, | ||
1578 | .label = "GPP", | ||
1579 | }, | ||
1580 | }, { | ||
1581 | .base = S5P6450_GPQ_BASE, | ||
1582 | .config = &samsung_gpio_cfgs[5], | ||
1583 | .chip = { | ||
1584 | .base = S5P6450_GPQ(0), | ||
1585 | .ngpio = S5P6450_GPIO_Q_NR, | ||
1586 | .label = "GPQ", | ||
1587 | }, | ||
1588 | }, { | ||
1589 | .base = S5P6450_GPS_BASE, | ||
1590 | .config = &samsung_gpio_cfgs[6], | ||
1591 | .chip = { | ||
1592 | .base = S5P6450_GPS(0), | ||
1593 | .ngpio = S5P6450_GPIO_S_NR, | ||
1594 | .label = "GPS", | ||
1595 | }, | ||
1596 | }, | ||
1597 | #endif | ||
1598 | }; | ||
1599 | |||
1600 | /* | ||
1601 | * S5PC100 GPIO bank summary: | ||
1602 | * | ||
1603 | * Bank GPIOs Style INT Type | ||
1604 | * A0 8 4Bit GPIO_INT0 | ||
1605 | * A1 5 4Bit GPIO_INT1 | ||
1606 | * B 8 4Bit GPIO_INT2 | ||
1607 | * C 5 4Bit GPIO_INT3 | ||
1608 | * D 7 4Bit GPIO_INT4 | ||
1609 | * E0 8 4Bit GPIO_INT5 | ||
1610 | * E1 6 4Bit GPIO_INT6 | ||
1611 | * F0 8 4Bit GPIO_INT7 | ||
1612 | * F1 8 4Bit GPIO_INT8 | ||
1613 | * F2 8 4Bit GPIO_INT9 | ||
1614 | * F3 4 4Bit GPIO_INT10 | ||
1615 | * G0 8 4Bit GPIO_INT11 | ||
1616 | * G1 3 4Bit GPIO_INT12 | ||
1617 | * G2 7 4Bit GPIO_INT13 | ||
1618 | * G3 7 4Bit GPIO_INT14 | ||
1619 | * H0 8 4Bit WKUP_INT | ||
1620 | * H1 8 4Bit WKUP_INT | ||
1621 | * H2 8 4Bit WKUP_INT | ||
1622 | * H3 8 4Bit WKUP_INT | ||
1623 | * I 8 4Bit GPIO_INT15 | ||
1624 | * J0 8 4Bit GPIO_INT16 | ||
1625 | * J1 5 4Bit GPIO_INT17 | ||
1626 | * J2 8 4Bit GPIO_INT18 | ||
1627 | * J3 8 4Bit GPIO_INT19 | ||
1628 | * J4 4 4Bit GPIO_INT20 | ||
1629 | * K0 8 4Bit None | ||
1630 | * K1 6 4Bit None | ||
1631 | * K2 8 4Bit None | ||
1632 | * K3 8 4Bit None | ||
1633 | * L0 8 4Bit None | ||
1634 | * L1 8 4Bit None | ||
1635 | * L2 8 4Bit None | ||
1636 | * L3 8 4Bit None | ||
1637 | */ | ||
1638 | |||
1639 | static struct samsung_gpio_chip s5pc100_gpios_4bit[] = { | ||
1640 | #ifdef CONFIG_CPU_S5PC100 | ||
1641 | { | ||
1642 | .chip = { | ||
1643 | .base = S5PC100_GPA0(0), | ||
1644 | .ngpio = S5PC100_GPIO_A0_NR, | ||
1645 | .label = "GPA0", | ||
1646 | }, | ||
1647 | }, { | ||
1648 | .chip = { | ||
1649 | .base = S5PC100_GPA1(0), | ||
1650 | .ngpio = S5PC100_GPIO_A1_NR, | ||
1651 | .label = "GPA1", | ||
1652 | }, | ||
1653 | }, { | ||
1654 | .chip = { | ||
1655 | .base = S5PC100_GPB(0), | ||
1656 | .ngpio = S5PC100_GPIO_B_NR, | ||
1657 | .label = "GPB", | ||
1658 | }, | ||
1659 | }, { | ||
1660 | .chip = { | ||
1661 | .base = S5PC100_GPC(0), | ||
1662 | .ngpio = S5PC100_GPIO_C_NR, | ||
1663 | .label = "GPC", | ||
1664 | }, | ||
1665 | }, { | ||
1666 | .chip = { | ||
1667 | .base = S5PC100_GPD(0), | ||
1668 | .ngpio = S5PC100_GPIO_D_NR, | ||
1669 | .label = "GPD", | ||
1670 | }, | ||
1671 | }, { | ||
1672 | .chip = { | ||
1673 | .base = S5PC100_GPE0(0), | ||
1674 | .ngpio = S5PC100_GPIO_E0_NR, | ||
1675 | .label = "GPE0", | ||
1676 | }, | ||
1677 | }, { | ||
1678 | .chip = { | ||
1679 | .base = S5PC100_GPE1(0), | ||
1680 | .ngpio = S5PC100_GPIO_E1_NR, | ||
1681 | .label = "GPE1", | ||
1682 | }, | ||
1683 | }, { | ||
1684 | .chip = { | ||
1685 | .base = S5PC100_GPF0(0), | ||
1686 | .ngpio = S5PC100_GPIO_F0_NR, | ||
1687 | .label = "GPF0", | ||
1688 | }, | ||
1689 | }, { | ||
1690 | .chip = { | ||
1691 | .base = S5PC100_GPF1(0), | ||
1692 | .ngpio = S5PC100_GPIO_F1_NR, | ||
1693 | .label = "GPF1", | ||
1694 | }, | ||
1695 | }, { | ||
1696 | .chip = { | ||
1697 | .base = S5PC100_GPF2(0), | ||
1698 | .ngpio = S5PC100_GPIO_F2_NR, | ||
1699 | .label = "GPF2", | ||
1700 | }, | ||
1701 | }, { | ||
1702 | .chip = { | ||
1703 | .base = S5PC100_GPF3(0), | ||
1704 | .ngpio = S5PC100_GPIO_F3_NR, | ||
1705 | .label = "GPF3", | ||
1706 | }, | ||
1707 | }, { | ||
1708 | .chip = { | ||
1709 | .base = S5PC100_GPG0(0), | ||
1710 | .ngpio = S5PC100_GPIO_G0_NR, | ||
1711 | .label = "GPG0", | ||
1712 | }, | ||
1713 | }, { | ||
1714 | .chip = { | ||
1715 | .base = S5PC100_GPG1(0), | ||
1716 | .ngpio = S5PC100_GPIO_G1_NR, | ||
1717 | .label = "GPG1", | ||
1718 | }, | ||
1719 | }, { | ||
1720 | .chip = { | ||
1721 | .base = S5PC100_GPG2(0), | ||
1722 | .ngpio = S5PC100_GPIO_G2_NR, | ||
1723 | .label = "GPG2", | ||
1724 | }, | ||
1725 | }, { | ||
1726 | .chip = { | ||
1727 | .base = S5PC100_GPG3(0), | ||
1728 | .ngpio = S5PC100_GPIO_G3_NR, | ||
1729 | .label = "GPG3", | ||
1730 | }, | ||
1731 | }, { | ||
1732 | .chip = { | ||
1733 | .base = S5PC100_GPI(0), | ||
1734 | .ngpio = S5PC100_GPIO_I_NR, | ||
1735 | .label = "GPI", | ||
1736 | }, | ||
1737 | }, { | ||
1738 | .chip = { | ||
1739 | .base = S5PC100_GPJ0(0), | ||
1740 | .ngpio = S5PC100_GPIO_J0_NR, | ||
1741 | .label = "GPJ0", | ||
1742 | }, | ||
1743 | }, { | ||
1744 | .chip = { | ||
1745 | .base = S5PC100_GPJ1(0), | ||
1746 | .ngpio = S5PC100_GPIO_J1_NR, | ||
1747 | .label = "GPJ1", | ||
1748 | }, | ||
1749 | }, { | ||
1750 | .chip = { | ||
1751 | .base = S5PC100_GPJ2(0), | ||
1752 | .ngpio = S5PC100_GPIO_J2_NR, | ||
1753 | .label = "GPJ2", | ||
1754 | }, | ||
1755 | }, { | ||
1756 | .chip = { | ||
1757 | .base = S5PC100_GPJ3(0), | ||
1758 | .ngpio = S5PC100_GPIO_J3_NR, | ||
1759 | .label = "GPJ3", | ||
1760 | }, | ||
1761 | }, { | ||
1762 | .chip = { | ||
1763 | .base = S5PC100_GPJ4(0), | ||
1764 | .ngpio = S5PC100_GPIO_J4_NR, | ||
1765 | .label = "GPJ4", | ||
1766 | }, | ||
1767 | }, { | ||
1768 | .chip = { | ||
1769 | .base = S5PC100_GPK0(0), | ||
1770 | .ngpio = S5PC100_GPIO_K0_NR, | ||
1771 | .label = "GPK0", | ||
1772 | }, | ||
1773 | }, { | ||
1774 | .chip = { | ||
1775 | .base = S5PC100_GPK1(0), | ||
1776 | .ngpio = S5PC100_GPIO_K1_NR, | ||
1777 | .label = "GPK1", | ||
1778 | }, | ||
1779 | }, { | ||
1780 | .chip = { | ||
1781 | .base = S5PC100_GPK2(0), | ||
1782 | .ngpio = S5PC100_GPIO_K2_NR, | ||
1783 | .label = "GPK2", | ||
1784 | }, | ||
1785 | }, { | ||
1786 | .chip = { | ||
1787 | .base = S5PC100_GPK3(0), | ||
1788 | .ngpio = S5PC100_GPIO_K3_NR, | ||
1789 | .label = "GPK3", | ||
1790 | }, | ||
1791 | }, { | ||
1792 | .chip = { | ||
1793 | .base = S5PC100_GPL0(0), | ||
1794 | .ngpio = S5PC100_GPIO_L0_NR, | ||
1795 | .label = "GPL0", | ||
1796 | }, | ||
1797 | }, { | ||
1798 | .chip = { | ||
1799 | .base = S5PC100_GPL1(0), | ||
1800 | .ngpio = S5PC100_GPIO_L1_NR, | ||
1801 | .label = "GPL1", | ||
1802 | }, | ||
1803 | }, { | ||
1804 | .chip = { | ||
1805 | .base = S5PC100_GPL2(0), | ||
1806 | .ngpio = S5PC100_GPIO_L2_NR, | ||
1807 | .label = "GPL2", | ||
1808 | }, | ||
1809 | }, { | ||
1810 | .chip = { | ||
1811 | .base = S5PC100_GPL3(0), | ||
1812 | .ngpio = S5PC100_GPIO_L3_NR, | ||
1813 | .label = "GPL3", | ||
1814 | }, | ||
1815 | }, { | ||
1816 | .chip = { | ||
1817 | .base = S5PC100_GPL4(0), | ||
1818 | .ngpio = S5PC100_GPIO_L4_NR, | ||
1819 | .label = "GPL4", | ||
1820 | }, | ||
1821 | }, { | ||
1822 | .base = (S5P_VA_GPIO + 0xC00), | ||
1823 | .irq_base = IRQ_EINT(0), | ||
1824 | .chip = { | ||
1825 | .base = S5PC100_GPH0(0), | ||
1826 | .ngpio = S5PC100_GPIO_H0_NR, | ||
1827 | .label = "GPH0", | ||
1828 | .to_irq = samsung_gpiolib_to_irq, | ||
1829 | }, | ||
1830 | }, { | ||
1831 | .base = (S5P_VA_GPIO + 0xC20), | ||
1832 | .irq_base = IRQ_EINT(8), | ||
1833 | .chip = { | ||
1834 | .base = S5PC100_GPH1(0), | ||
1835 | .ngpio = S5PC100_GPIO_H1_NR, | ||
1836 | .label = "GPH1", | ||
1837 | .to_irq = samsung_gpiolib_to_irq, | ||
1838 | }, | ||
1839 | }, { | ||
1840 | .base = (S5P_VA_GPIO + 0xC40), | ||
1841 | .irq_base = IRQ_EINT(16), | ||
1842 | .chip = { | ||
1843 | .base = S5PC100_GPH2(0), | ||
1844 | .ngpio = S5PC100_GPIO_H2_NR, | ||
1845 | .label = "GPH2", | ||
1846 | .to_irq = samsung_gpiolib_to_irq, | ||
1847 | }, | ||
1848 | }, { | ||
1849 | .base = (S5P_VA_GPIO + 0xC60), | ||
1850 | .irq_base = IRQ_EINT(24), | ||
1851 | .chip = { | ||
1852 | .base = S5PC100_GPH3(0), | ||
1853 | .ngpio = S5PC100_GPIO_H3_NR, | ||
1854 | .label = "GPH3", | ||
1855 | .to_irq = samsung_gpiolib_to_irq, | ||
1856 | }, | ||
1857 | }, | ||
1858 | #endif | ||
1859 | }; | ||
1860 | |||
1861 | /* | ||
1862 | * Followings are the gpio banks in S5PV210/S5PC110 | ||
1863 | * | ||
1864 | * The 'config' member when left to NULL, is initialized to the default | ||
1865 | * structure samsung_gpio_cfgs[3] in the init function below. | ||
1866 | * | ||
1867 | * The 'base' member is also initialized in the init function below. | ||
1868 | * Note: The initialization of 'base' member of samsung_gpio_chip structure | ||
1869 | * uses the above macro and depends on the banks being listed in order here. | ||
1870 | */ | ||
1871 | |||
1872 | static struct samsung_gpio_chip s5pv210_gpios_4bit[] = { | ||
1873 | #ifdef CONFIG_CPU_S5PV210 | ||
1874 | { | ||
1875 | .chip = { | ||
1876 | .base = S5PV210_GPA0(0), | ||
1877 | .ngpio = S5PV210_GPIO_A0_NR, | ||
1878 | .label = "GPA0", | ||
1879 | }, | ||
1880 | }, { | ||
1881 | .chip = { | ||
1882 | .base = S5PV210_GPA1(0), | ||
1883 | .ngpio = S5PV210_GPIO_A1_NR, | ||
1884 | .label = "GPA1", | ||
1885 | }, | ||
1886 | }, { | ||
1887 | .chip = { | ||
1888 | .base = S5PV210_GPB(0), | ||
1889 | .ngpio = S5PV210_GPIO_B_NR, | ||
1890 | .label = "GPB", | ||
1891 | }, | ||
1892 | }, { | ||
1893 | .chip = { | ||
1894 | .base = S5PV210_GPC0(0), | ||
1895 | .ngpio = S5PV210_GPIO_C0_NR, | ||
1896 | .label = "GPC0", | ||
1897 | }, | ||
1898 | }, { | ||
1899 | .chip = { | ||
1900 | .base = S5PV210_GPC1(0), | ||
1901 | .ngpio = S5PV210_GPIO_C1_NR, | ||
1902 | .label = "GPC1", | ||
1903 | }, | ||
1904 | }, { | ||
1905 | .chip = { | ||
1906 | .base = S5PV210_GPD0(0), | ||
1907 | .ngpio = S5PV210_GPIO_D0_NR, | ||
1908 | .label = "GPD0", | ||
1909 | }, | ||
1910 | }, { | ||
1911 | .chip = { | ||
1912 | .base = S5PV210_GPD1(0), | ||
1913 | .ngpio = S5PV210_GPIO_D1_NR, | ||
1914 | .label = "GPD1", | ||
1915 | }, | ||
1916 | }, { | ||
1917 | .chip = { | ||
1918 | .base = S5PV210_GPE0(0), | ||
1919 | .ngpio = S5PV210_GPIO_E0_NR, | ||
1920 | .label = "GPE0", | ||
1921 | }, | ||
1922 | }, { | ||
1923 | .chip = { | ||
1924 | .base = S5PV210_GPE1(0), | ||
1925 | .ngpio = S5PV210_GPIO_E1_NR, | ||
1926 | .label = "GPE1", | ||
1927 | }, | ||
1928 | }, { | ||
1929 | .chip = { | ||
1930 | .base = S5PV210_GPF0(0), | ||
1931 | .ngpio = S5PV210_GPIO_F0_NR, | ||
1932 | .label = "GPF0", | ||
1933 | }, | ||
1934 | }, { | ||
1935 | .chip = { | ||
1936 | .base = S5PV210_GPF1(0), | ||
1937 | .ngpio = S5PV210_GPIO_F1_NR, | ||
1938 | .label = "GPF1", | ||
1939 | }, | ||
1940 | }, { | ||
1941 | .chip = { | ||
1942 | .base = S5PV210_GPF2(0), | ||
1943 | .ngpio = S5PV210_GPIO_F2_NR, | ||
1944 | .label = "GPF2", | ||
1945 | }, | ||
1946 | }, { | ||
1947 | .chip = { | ||
1948 | .base = S5PV210_GPF3(0), | ||
1949 | .ngpio = S5PV210_GPIO_F3_NR, | ||
1950 | .label = "GPF3", | ||
1951 | }, | ||
1952 | }, { | ||
1953 | .chip = { | ||
1954 | .base = S5PV210_GPG0(0), | ||
1955 | .ngpio = S5PV210_GPIO_G0_NR, | ||
1956 | .label = "GPG0", | ||
1957 | }, | ||
1958 | }, { | ||
1959 | .chip = { | ||
1960 | .base = S5PV210_GPG1(0), | ||
1961 | .ngpio = S5PV210_GPIO_G1_NR, | ||
1962 | .label = "GPG1", | ||
1963 | }, | ||
1964 | }, { | ||
1965 | .chip = { | ||
1966 | .base = S5PV210_GPG2(0), | ||
1967 | .ngpio = S5PV210_GPIO_G2_NR, | ||
1968 | .label = "GPG2", | ||
1969 | }, | ||
1970 | }, { | ||
1971 | .chip = { | ||
1972 | .base = S5PV210_GPG3(0), | ||
1973 | .ngpio = S5PV210_GPIO_G3_NR, | ||
1974 | .label = "GPG3", | ||
1975 | }, | ||
1976 | }, { | ||
1977 | .chip = { | ||
1978 | .base = S5PV210_GPI(0), | ||
1979 | .ngpio = S5PV210_GPIO_I_NR, | ||
1980 | .label = "GPI", | ||
1981 | }, | ||
1982 | }, { | ||
1983 | .chip = { | ||
1984 | .base = S5PV210_GPJ0(0), | ||
1985 | .ngpio = S5PV210_GPIO_J0_NR, | ||
1986 | .label = "GPJ0", | ||
1987 | }, | ||
1988 | }, { | ||
1989 | .chip = { | ||
1990 | .base = S5PV210_GPJ1(0), | ||
1991 | .ngpio = S5PV210_GPIO_J1_NR, | ||
1992 | .label = "GPJ1", | ||
1993 | }, | ||
1994 | }, { | ||
1995 | .chip = { | ||
1996 | .base = S5PV210_GPJ2(0), | ||
1997 | .ngpio = S5PV210_GPIO_J2_NR, | ||
1998 | .label = "GPJ2", | ||
1999 | }, | ||
2000 | }, { | ||
2001 | .chip = { | ||
2002 | .base = S5PV210_GPJ3(0), | ||
2003 | .ngpio = S5PV210_GPIO_J3_NR, | ||
2004 | .label = "GPJ3", | ||
2005 | }, | ||
2006 | }, { | ||
2007 | .chip = { | ||
2008 | .base = S5PV210_GPJ4(0), | ||
2009 | .ngpio = S5PV210_GPIO_J4_NR, | ||
2010 | .label = "GPJ4", | ||
2011 | }, | ||
2012 | }, { | ||
2013 | .chip = { | ||
2014 | .base = S5PV210_MP01(0), | ||
2015 | .ngpio = S5PV210_GPIO_MP01_NR, | ||
2016 | .label = "MP01", | ||
2017 | }, | ||
2018 | }, { | ||
2019 | .chip = { | ||
2020 | .base = S5PV210_MP02(0), | ||
2021 | .ngpio = S5PV210_GPIO_MP02_NR, | ||
2022 | .label = "MP02", | ||
2023 | }, | ||
2024 | }, { | ||
2025 | .chip = { | ||
2026 | .base = S5PV210_MP03(0), | ||
2027 | .ngpio = S5PV210_GPIO_MP03_NR, | ||
2028 | .label = "MP03", | ||
2029 | }, | ||
2030 | }, { | ||
2031 | .chip = { | ||
2032 | .base = S5PV210_MP04(0), | ||
2033 | .ngpio = S5PV210_GPIO_MP04_NR, | ||
2034 | .label = "MP04", | ||
2035 | }, | ||
2036 | }, { | ||
2037 | .chip = { | ||
2038 | .base = S5PV210_MP05(0), | ||
2039 | .ngpio = S5PV210_GPIO_MP05_NR, | ||
2040 | .label = "MP05", | ||
2041 | }, | ||
2042 | }, { | ||
2043 | .base = (S5P_VA_GPIO + 0xC00), | ||
2044 | .irq_base = IRQ_EINT(0), | ||
2045 | .chip = { | ||
2046 | .base = S5PV210_GPH0(0), | ||
2047 | .ngpio = S5PV210_GPIO_H0_NR, | ||
2048 | .label = "GPH0", | ||
2049 | .to_irq = samsung_gpiolib_to_irq, | ||
2050 | }, | ||
2051 | }, { | ||
2052 | .base = (S5P_VA_GPIO + 0xC20), | ||
2053 | .irq_base = IRQ_EINT(8), | ||
2054 | .chip = { | ||
2055 | .base = S5PV210_GPH1(0), | ||
2056 | .ngpio = S5PV210_GPIO_H1_NR, | ||
2057 | .label = "GPH1", | ||
2058 | .to_irq = samsung_gpiolib_to_irq, | ||
2059 | }, | ||
2060 | }, { | ||
2061 | .base = (S5P_VA_GPIO + 0xC40), | ||
2062 | .irq_base = IRQ_EINT(16), | ||
2063 | .chip = { | ||
2064 | .base = S5PV210_GPH2(0), | ||
2065 | .ngpio = S5PV210_GPIO_H2_NR, | ||
2066 | .label = "GPH2", | ||
2067 | .to_irq = samsung_gpiolib_to_irq, | ||
2068 | }, | ||
2069 | }, { | ||
2070 | .base = (S5P_VA_GPIO + 0xC60), | ||
2071 | .irq_base = IRQ_EINT(24), | ||
2072 | .chip = { | ||
2073 | .base = S5PV210_GPH3(0), | ||
2074 | .ngpio = S5PV210_GPIO_H3_NR, | ||
2075 | .label = "GPH3", | ||
2076 | .to_irq = samsung_gpiolib_to_irq, | ||
2077 | }, | ||
2078 | }, | ||
2079 | #endif | ||
2080 | }; | ||
2081 | |||
2082 | /* TODO: cleanup soc_is_* */ | 1169 | /* TODO: cleanup soc_is_* */ |
2083 | static __init int samsung_gpiolib_init(void) | 1170 | static __init int samsung_gpiolib_init(void) |
2084 | { | 1171 | { |
2085 | struct samsung_gpio_chip *chip; | ||
2086 | int i, nr_chips; | ||
2087 | int group = 0; | ||
2088 | |||
2089 | /* | 1172 | /* |
2090 | * Currently there are two drivers that can provide GPIO support for | 1173 | * Currently there are two drivers that can provide GPIO support for |
2091 | * Samsung SoCs. For device tree enabled platforms, the new | 1174 | * Samsung SoCs. For device tree enabled platforms, the new |
@@ -2109,54 +1192,6 @@ static __init int samsung_gpiolib_init(void) | |||
2109 | S3C64XX_VA_GPIO); | 1192 | S3C64XX_VA_GPIO); |
2110 | samsung_gpiolib_add_4bit2_chips(s3c64xx_gpios_4bit2, | 1193 | samsung_gpiolib_add_4bit2_chips(s3c64xx_gpios_4bit2, |
2111 | ARRAY_SIZE(s3c64xx_gpios_4bit2)); | 1194 | ARRAY_SIZE(s3c64xx_gpios_4bit2)); |
2112 | } else if (soc_is_s5p6440()) { | ||
2113 | samsung_gpiolib_add_2bit_chips(s5p6440_gpios_2bit, | ||
2114 | ARRAY_SIZE(s5p6440_gpios_2bit), NULL, 0x0); | ||
2115 | samsung_gpiolib_add_4bit_chips(s5p6440_gpios_4bit, | ||
2116 | ARRAY_SIZE(s5p6440_gpios_4bit), S5P_VA_GPIO); | ||
2117 | samsung_gpiolib_add_4bit2_chips(s5p6440_gpios_4bit2, | ||
2118 | ARRAY_SIZE(s5p6440_gpios_4bit2)); | ||
2119 | s5p64x0_gpiolib_add_rbank(s5p6440_gpios_rbank, | ||
2120 | ARRAY_SIZE(s5p6440_gpios_rbank)); | ||
2121 | } else if (soc_is_s5p6450()) { | ||
2122 | samsung_gpiolib_add_2bit_chips(s5p6450_gpios_2bit, | ||
2123 | ARRAY_SIZE(s5p6450_gpios_2bit), NULL, 0x0); | ||
2124 | samsung_gpiolib_add_4bit_chips(s5p6450_gpios_4bit, | ||
2125 | ARRAY_SIZE(s5p6450_gpios_4bit), S5P_VA_GPIO); | ||
2126 | samsung_gpiolib_add_4bit2_chips(s5p6450_gpios_4bit2, | ||
2127 | ARRAY_SIZE(s5p6450_gpios_4bit2)); | ||
2128 | s5p64x0_gpiolib_add_rbank(s5p6450_gpios_rbank, | ||
2129 | ARRAY_SIZE(s5p6450_gpios_rbank)); | ||
2130 | } else if (soc_is_s5pc100()) { | ||
2131 | group = 0; | ||
2132 | chip = s5pc100_gpios_4bit; | ||
2133 | nr_chips = ARRAY_SIZE(s5pc100_gpios_4bit); | ||
2134 | |||
2135 | for (i = 0; i < nr_chips; i++, chip++) { | ||
2136 | if (!chip->config) { | ||
2137 | chip->config = &samsung_gpio_cfgs[3]; | ||
2138 | chip->group = group++; | ||
2139 | } | ||
2140 | } | ||
2141 | samsung_gpiolib_add_4bit_chips(s5pc100_gpios_4bit, nr_chips, S5P_VA_GPIO); | ||
2142 | #if defined(CONFIG_CPU_S5PC100) && defined(CONFIG_S5P_GPIO_INT) | ||
2143 | s5p_register_gpioint_bank(IRQ_GPIOINT, 0, S5P_GPIOINT_GROUP_MAXNR); | ||
2144 | #endif | ||
2145 | } else if (soc_is_s5pv210()) { | ||
2146 | group = 0; | ||
2147 | chip = s5pv210_gpios_4bit; | ||
2148 | nr_chips = ARRAY_SIZE(s5pv210_gpios_4bit); | ||
2149 | |||
2150 | for (i = 0; i < nr_chips; i++, chip++) { | ||
2151 | if (!chip->config) { | ||
2152 | chip->config = &samsung_gpio_cfgs[3]; | ||
2153 | chip->group = group++; | ||
2154 | } | ||
2155 | } | ||
2156 | samsung_gpiolib_add_4bit_chips(s5pv210_gpios_4bit, nr_chips, S5P_VA_GPIO); | ||
2157 | #if defined(CONFIG_CPU_S5PV210) && defined(CONFIG_S5P_GPIO_INT) | ||
2158 | s5p_register_gpioint_bank(IRQ_GPIOINT, 0, S5P_GPIOINT_GROUP_MAXNR); | ||
2159 | #endif | ||
2160 | } else { | 1195 | } else { |
2161 | WARN(1, "Unknown SoC in gpio-samsung, no GPIOs added\n"); | 1196 | WARN(1, "Unknown SoC in gpio-samsung, no GPIOs added\n"); |
2162 | return -ENODEV; | 1197 | return -ENODEV; |
diff --git a/drivers/gpio/gpio-sch.c b/drivers/gpio/gpio-sch.c index a9b1cd16c848..41e91d70301e 100644 --- a/drivers/gpio/gpio-sch.c +++ b/drivers/gpio/gpio-sch.c | |||
@@ -290,8 +290,7 @@ static int sch_gpio_probe(struct platform_device *pdev) | |||
290 | return 0; | 290 | return 0; |
291 | 291 | ||
292 | err_sch_gpio_resume: | 292 | err_sch_gpio_resume: |
293 | if (gpiochip_remove(&sch_gpio_core)) | 293 | gpiochip_remove(&sch_gpio_core); |
294 | dev_err(&pdev->dev, "%s gpiochip_remove failed\n", __func__); | ||
295 | 294 | ||
296 | err_sch_gpio_core: | 295 | err_sch_gpio_core: |
297 | release_region(res->start, resource_size(res)); | 296 | release_region(res->start, resource_size(res)); |
@@ -304,23 +303,14 @@ static int sch_gpio_remove(struct platform_device *pdev) | |||
304 | { | 303 | { |
305 | struct resource *res; | 304 | struct resource *res; |
306 | if (gpio_ba) { | 305 | if (gpio_ba) { |
307 | int err; | ||
308 | 306 | ||
309 | err = gpiochip_remove(&sch_gpio_core); | 307 | gpiochip_remove(&sch_gpio_core); |
310 | if (err) | 308 | gpiochip_remove(&sch_gpio_resume); |
311 | dev_err(&pdev->dev, "%s failed, %d\n", | ||
312 | "gpiochip_remove()", err); | ||
313 | err = gpiochip_remove(&sch_gpio_resume); | ||
314 | if (err) | ||
315 | dev_err(&pdev->dev, "%s failed, %d\n", | ||
316 | "gpiochip_remove()", err); | ||
317 | 309 | ||
318 | res = platform_get_resource(pdev, IORESOURCE_IO, 0); | 310 | res = platform_get_resource(pdev, IORESOURCE_IO, 0); |
319 | 311 | ||
320 | release_region(res->start, resource_size(res)); | 312 | release_region(res->start, resource_size(res)); |
321 | gpio_ba = 0; | 313 | gpio_ba = 0; |
322 | |||
323 | return err; | ||
324 | } | 314 | } |
325 | 315 | ||
326 | return 0; | 316 | return 0; |
diff --git a/drivers/gpio/gpio-sch311x.c b/drivers/gpio/gpio-sch311x.c index f942b80ee403..0cb11413e814 100644 --- a/drivers/gpio/gpio-sch311x.c +++ b/drivers/gpio/gpio-sch311x.c | |||
@@ -291,14 +291,12 @@ static int sch311x_gpio_remove(struct platform_device *pdev) | |||
291 | { | 291 | { |
292 | struct sch311x_pdev_data *pdata = pdev->dev.platform_data; | 292 | struct sch311x_pdev_data *pdata = pdev->dev.platform_data; |
293 | struct sch311x_gpio_priv *priv = platform_get_drvdata(pdev); | 293 | struct sch311x_gpio_priv *priv = platform_get_drvdata(pdev); |
294 | int err, i; | 294 | int i; |
295 | 295 | ||
296 | release_region(pdata->runtime_reg + GP1, 6); | 296 | release_region(pdata->runtime_reg + GP1, 6); |
297 | 297 | ||
298 | for (i = 0; i < ARRAY_SIZE(priv->blocks); i++) { | 298 | for (i = 0; i < ARRAY_SIZE(priv->blocks); i++) { |
299 | err = gpiochip_remove(&priv->blocks[i].chip); | 299 | gpiochip_remove(&priv->blocks[i].chip); |
300 | if (err) | ||
301 | return err; | ||
302 | dev_info(&pdev->dev, | 300 | dev_info(&pdev->dev, |
303 | "SMSC SCH311x GPIO block %d unregistered.\n", i); | 301 | "SMSC SCH311x GPIO block %d unregistered.\n", i); |
304 | } | 302 | } |
diff --git a/drivers/gpio/gpio-sodaville.c b/drivers/gpio/gpio-sodaville.c index 7c6c518929bc..d8da36cd8123 100644 --- a/drivers/gpio/gpio-sodaville.c +++ b/drivers/gpio/gpio-sodaville.c | |||
@@ -265,9 +265,7 @@ static void sdv_gpio_remove(struct pci_dev *pdev) | |||
265 | free_irq(pdev->irq, sd); | 265 | free_irq(pdev->irq, sd); |
266 | irq_free_descs(sd->irq_base, SDV_NUM_PUB_GPIOS); | 266 | irq_free_descs(sd->irq_base, SDV_NUM_PUB_GPIOS); |
267 | 267 | ||
268 | if (gpiochip_remove(&sd->bgpio.gc)) | 268 | gpiochip_remove(&sd->bgpio.gc); |
269 | dev_err(&pdev->dev, "gpiochip_remove() failed.\n"); | ||
270 | |||
271 | pci_release_region(pdev, GPIO_BAR); | 269 | pci_release_region(pdev, GPIO_BAR); |
272 | iounmap(sd->gpio_pub_base); | 270 | iounmap(sd->gpio_pub_base); |
273 | pci_disable_device(pdev); | 271 | pci_disable_device(pdev); |
diff --git a/drivers/gpio/gpio-stmpe.c b/drivers/gpio/gpio-stmpe.c index 628b58494294..845025a57240 100644 --- a/drivers/gpio/gpio-stmpe.c +++ b/drivers/gpio/gpio-stmpe.c | |||
@@ -10,8 +10,6 @@ | |||
10 | #include <linux/platform_device.h> | 10 | #include <linux/platform_device.h> |
11 | #include <linux/slab.h> | 11 | #include <linux/slab.h> |
12 | #include <linux/gpio.h> | 12 | #include <linux/gpio.h> |
13 | #include <linux/irq.h> | ||
14 | #include <linux/irqdomain.h> | ||
15 | #include <linux/interrupt.h> | 13 | #include <linux/interrupt.h> |
16 | #include <linux/of.h> | 14 | #include <linux/of.h> |
17 | #include <linux/mfd/stmpe.h> | 15 | #include <linux/mfd/stmpe.h> |
@@ -31,9 +29,7 @@ struct stmpe_gpio { | |||
31 | struct stmpe *stmpe; | 29 | struct stmpe *stmpe; |
32 | struct device *dev; | 30 | struct device *dev; |
33 | struct mutex irq_lock; | 31 | struct mutex irq_lock; |
34 | struct irq_domain *domain; | ||
35 | unsigned norequest_mask; | 32 | unsigned norequest_mask; |
36 | |||
37 | /* Caches of interrupt control registers for bus_lock */ | 33 | /* Caches of interrupt control registers for bus_lock */ |
38 | u8 regs[CACHE_NR_REGS][CACHE_NR_BANKS]; | 34 | u8 regs[CACHE_NR_REGS][CACHE_NR_BANKS]; |
39 | u8 oldregs[CACHE_NR_REGS][CACHE_NR_BANKS]; | 35 | u8 oldregs[CACHE_NR_REGS][CACHE_NR_BANKS]; |
@@ -101,13 +97,6 @@ static int stmpe_gpio_direction_input(struct gpio_chip *chip, | |||
101 | return stmpe_set_bits(stmpe, reg, mask, 0); | 97 | return stmpe_set_bits(stmpe, reg, mask, 0); |
102 | } | 98 | } |
103 | 99 | ||
104 | static int stmpe_gpio_to_irq(struct gpio_chip *chip, unsigned offset) | ||
105 | { | ||
106 | struct stmpe_gpio *stmpe_gpio = to_stmpe_gpio(chip); | ||
107 | |||
108 | return irq_create_mapping(stmpe_gpio->domain, offset); | ||
109 | } | ||
110 | |||
111 | static int stmpe_gpio_request(struct gpio_chip *chip, unsigned offset) | 100 | static int stmpe_gpio_request(struct gpio_chip *chip, unsigned offset) |
112 | { | 101 | { |
113 | struct stmpe_gpio *stmpe_gpio = to_stmpe_gpio(chip); | 102 | struct stmpe_gpio *stmpe_gpio = to_stmpe_gpio(chip); |
@@ -126,14 +115,14 @@ static struct gpio_chip template_chip = { | |||
126 | .get = stmpe_gpio_get, | 115 | .get = stmpe_gpio_get, |
127 | .direction_output = stmpe_gpio_direction_output, | 116 | .direction_output = stmpe_gpio_direction_output, |
128 | .set = stmpe_gpio_set, | 117 | .set = stmpe_gpio_set, |
129 | .to_irq = stmpe_gpio_to_irq, | ||
130 | .request = stmpe_gpio_request, | 118 | .request = stmpe_gpio_request, |
131 | .can_sleep = true, | 119 | .can_sleep = true, |
132 | }; | 120 | }; |
133 | 121 | ||
134 | static int stmpe_gpio_irq_set_type(struct irq_data *d, unsigned int type) | 122 | static int stmpe_gpio_irq_set_type(struct irq_data *d, unsigned int type) |
135 | { | 123 | { |
136 | struct stmpe_gpio *stmpe_gpio = irq_data_get_irq_chip_data(d); | 124 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
125 | struct stmpe_gpio *stmpe_gpio = to_stmpe_gpio(gc); | ||
137 | int offset = d->hwirq; | 126 | int offset = d->hwirq; |
138 | int regoffset = offset / 8; | 127 | int regoffset = offset / 8; |
139 | int mask = 1 << (offset % 8); | 128 | int mask = 1 << (offset % 8); |
@@ -160,14 +149,16 @@ static int stmpe_gpio_irq_set_type(struct irq_data *d, unsigned int type) | |||
160 | 149 | ||
161 | static void stmpe_gpio_irq_lock(struct irq_data *d) | 150 | static void stmpe_gpio_irq_lock(struct irq_data *d) |
162 | { | 151 | { |
163 | struct stmpe_gpio *stmpe_gpio = irq_data_get_irq_chip_data(d); | 152 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
153 | struct stmpe_gpio *stmpe_gpio = to_stmpe_gpio(gc); | ||
164 | 154 | ||
165 | mutex_lock(&stmpe_gpio->irq_lock); | 155 | mutex_lock(&stmpe_gpio->irq_lock); |
166 | } | 156 | } |
167 | 157 | ||
168 | static void stmpe_gpio_irq_sync_unlock(struct irq_data *d) | 158 | static void stmpe_gpio_irq_sync_unlock(struct irq_data *d) |
169 | { | 159 | { |
170 | struct stmpe_gpio *stmpe_gpio = irq_data_get_irq_chip_data(d); | 160 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
161 | struct stmpe_gpio *stmpe_gpio = to_stmpe_gpio(gc); | ||
171 | struct stmpe *stmpe = stmpe_gpio->stmpe; | 162 | struct stmpe *stmpe = stmpe_gpio->stmpe; |
172 | int num_banks = DIV_ROUND_UP(stmpe->num_gpios, 8); | 163 | int num_banks = DIV_ROUND_UP(stmpe->num_gpios, 8); |
173 | static const u8 regmap[] = { | 164 | static const u8 regmap[] = { |
@@ -200,7 +191,8 @@ static void stmpe_gpio_irq_sync_unlock(struct irq_data *d) | |||
200 | 191 | ||
201 | static void stmpe_gpio_irq_mask(struct irq_data *d) | 192 | static void stmpe_gpio_irq_mask(struct irq_data *d) |
202 | { | 193 | { |
203 | struct stmpe_gpio *stmpe_gpio = irq_data_get_irq_chip_data(d); | 194 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
195 | struct stmpe_gpio *stmpe_gpio = to_stmpe_gpio(gc); | ||
204 | int offset = d->hwirq; | 196 | int offset = d->hwirq; |
205 | int regoffset = offset / 8; | 197 | int regoffset = offset / 8; |
206 | int mask = 1 << (offset % 8); | 198 | int mask = 1 << (offset % 8); |
@@ -210,7 +202,8 @@ static void stmpe_gpio_irq_mask(struct irq_data *d) | |||
210 | 202 | ||
211 | static void stmpe_gpio_irq_unmask(struct irq_data *d) | 203 | static void stmpe_gpio_irq_unmask(struct irq_data *d) |
212 | { | 204 | { |
213 | struct stmpe_gpio *stmpe_gpio = irq_data_get_irq_chip_data(d); | 205 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
206 | struct stmpe_gpio *stmpe_gpio = to_stmpe_gpio(gc); | ||
214 | int offset = d->hwirq; | 207 | int offset = d->hwirq; |
215 | int regoffset = offset / 8; | 208 | int regoffset = offset / 8; |
216 | int mask = 1 << (offset % 8); | 209 | int mask = 1 << (offset % 8); |
@@ -253,7 +246,7 @@ static irqreturn_t stmpe_gpio_irq(int irq, void *dev) | |||
253 | while (stat) { | 246 | while (stat) { |
254 | int bit = __ffs(stat); | 247 | int bit = __ffs(stat); |
255 | int line = bank * 8 + bit; | 248 | int line = bank * 8 + bit; |
256 | int child_irq = irq_find_mapping(stmpe_gpio->domain, | 249 | int child_irq = irq_find_mapping(stmpe_gpio->chip.irqdomain, |
257 | line); | 250 | line); |
258 | 251 | ||
259 | handle_nested_irq(child_irq); | 252 | handle_nested_irq(child_irq); |
@@ -271,56 +264,6 @@ static irqreturn_t stmpe_gpio_irq(int irq, void *dev) | |||
271 | return IRQ_HANDLED; | 264 | return IRQ_HANDLED; |
272 | } | 265 | } |
273 | 266 | ||
274 | static int stmpe_gpio_irq_map(struct irq_domain *d, unsigned int irq, | ||
275 | irq_hw_number_t hwirq) | ||
276 | { | ||
277 | struct stmpe_gpio *stmpe_gpio = d->host_data; | ||
278 | |||
279 | if (!stmpe_gpio) | ||
280 | return -EINVAL; | ||
281 | |||
282 | irq_set_chip_data(irq, stmpe_gpio); | ||
283 | irq_set_chip_and_handler(irq, &stmpe_gpio_irq_chip, | ||
284 | handle_simple_irq); | ||
285 | irq_set_nested_thread(irq, 1); | ||
286 | #ifdef CONFIG_ARM | ||
287 | set_irq_flags(irq, IRQF_VALID); | ||
288 | #else | ||
289 | irq_set_noprobe(irq); | ||
290 | #endif | ||
291 | |||
292 | return 0; | ||
293 | } | ||
294 | |||
295 | static void stmpe_gpio_irq_unmap(struct irq_domain *d, unsigned int irq) | ||
296 | { | ||
297 | #ifdef CONFIG_ARM | ||
298 | set_irq_flags(irq, 0); | ||
299 | #endif | ||
300 | irq_set_chip_and_handler(irq, NULL, NULL); | ||
301 | irq_set_chip_data(irq, NULL); | ||
302 | } | ||
303 | |||
304 | static const struct irq_domain_ops stmpe_gpio_irq_simple_ops = { | ||
305 | .unmap = stmpe_gpio_irq_unmap, | ||
306 | .map = stmpe_gpio_irq_map, | ||
307 | .xlate = irq_domain_xlate_twocell, | ||
308 | }; | ||
309 | |||
310 | static int stmpe_gpio_irq_init(struct stmpe_gpio *stmpe_gpio, | ||
311 | struct device_node *np) | ||
312 | { | ||
313 | stmpe_gpio->domain = irq_domain_add_simple(np, | ||
314 | stmpe_gpio->chip.ngpio, 0, | ||
315 | &stmpe_gpio_irq_simple_ops, stmpe_gpio); | ||
316 | if (!stmpe_gpio->domain) { | ||
317 | dev_err(stmpe_gpio->dev, "failed to create irqdomain\n"); | ||
318 | return -ENOSYS; | ||
319 | } | ||
320 | |||
321 | return 0; | ||
322 | } | ||
323 | |||
324 | static int stmpe_gpio_probe(struct platform_device *pdev) | 267 | static int stmpe_gpio_probe(struct platform_device *pdev) |
325 | { | 268 | { |
326 | struct stmpe *stmpe = dev_get_drvdata(pdev->dev.parent); | 269 | struct stmpe *stmpe = dev_get_drvdata(pdev->dev.parent); |
@@ -358,30 +301,37 @@ static int stmpe_gpio_probe(struct platform_device *pdev) | |||
358 | 301 | ||
359 | if (irq < 0) | 302 | if (irq < 0) |
360 | dev_info(&pdev->dev, | 303 | dev_info(&pdev->dev, |
361 | "device configured in no-irq mode; " | 304 | "device configured in no-irq mode: " |
362 | "irqs are not available\n"); | 305 | "irqs are not available\n"); |
363 | 306 | ||
364 | ret = stmpe_enable(stmpe, STMPE_BLOCK_GPIO); | 307 | ret = stmpe_enable(stmpe, STMPE_BLOCK_GPIO); |
365 | if (ret) | 308 | if (ret) |
366 | goto out_free; | 309 | goto out_free; |
367 | 310 | ||
368 | if (irq >= 0) { | 311 | if (irq > 0) { |
369 | ret = stmpe_gpio_irq_init(stmpe_gpio, np); | 312 | ret = devm_request_threaded_irq(&pdev->dev, irq, NULL, |
370 | if (ret) | 313 | stmpe_gpio_irq, IRQF_ONESHOT, |
371 | goto out_disable; | 314 | "stmpe-gpio", stmpe_gpio); |
372 | |||
373 | ret = request_threaded_irq(irq, NULL, stmpe_gpio_irq, | ||
374 | IRQF_ONESHOT, "stmpe-gpio", stmpe_gpio); | ||
375 | if (ret) { | 315 | if (ret) { |
376 | dev_err(&pdev->dev, "unable to get irq: %d\n", ret); | 316 | dev_err(&pdev->dev, "unable to get irq: %d\n", ret); |
377 | goto out_disable; | 317 | goto out_disable; |
378 | } | 318 | } |
319 | ret = gpiochip_irqchip_add(&stmpe_gpio->chip, | ||
320 | &stmpe_gpio_irq_chip, | ||
321 | 0, | ||
322 | handle_simple_irq, | ||
323 | IRQ_TYPE_NONE); | ||
324 | if (ret) { | ||
325 | dev_err(&pdev->dev, | ||
326 | "could not connect irqchip to gpiochip\n"); | ||
327 | return ret; | ||
328 | } | ||
379 | } | 329 | } |
380 | 330 | ||
381 | ret = gpiochip_add(&stmpe_gpio->chip); | 331 | ret = gpiochip_add(&stmpe_gpio->chip); |
382 | if (ret) { | 332 | if (ret) { |
383 | dev_err(&pdev->dev, "unable to add gpiochip: %d\n", ret); | 333 | dev_err(&pdev->dev, "unable to add gpiochip: %d\n", ret); |
384 | goto out_freeirq; | 334 | goto out_disable; |
385 | } | 335 | } |
386 | 336 | ||
387 | if (pdata && pdata->setup) | 337 | if (pdata && pdata->setup) |
@@ -391,9 +341,6 @@ static int stmpe_gpio_probe(struct platform_device *pdev) | |||
391 | 341 | ||
392 | return 0; | 342 | return 0; |
393 | 343 | ||
394 | out_freeirq: | ||
395 | if (irq >= 0) | ||
396 | free_irq(irq, stmpe_gpio); | ||
397 | out_disable: | 344 | out_disable: |
398 | stmpe_disable(stmpe, STMPE_BLOCK_GPIO); | 345 | stmpe_disable(stmpe, STMPE_BLOCK_GPIO); |
399 | out_free: | 346 | out_free: |
@@ -406,24 +353,14 @@ static int stmpe_gpio_remove(struct platform_device *pdev) | |||
406 | struct stmpe_gpio *stmpe_gpio = platform_get_drvdata(pdev); | 353 | struct stmpe_gpio *stmpe_gpio = platform_get_drvdata(pdev); |
407 | struct stmpe *stmpe = stmpe_gpio->stmpe; | 354 | struct stmpe *stmpe = stmpe_gpio->stmpe; |
408 | struct stmpe_gpio_platform_data *pdata = stmpe->pdata->gpio; | 355 | struct stmpe_gpio_platform_data *pdata = stmpe->pdata->gpio; |
409 | int irq = platform_get_irq(pdev, 0); | ||
410 | int ret; | ||
411 | 356 | ||
412 | if (pdata && pdata->remove) | 357 | if (pdata && pdata->remove) |
413 | pdata->remove(stmpe, stmpe_gpio->chip.base); | 358 | pdata->remove(stmpe, stmpe_gpio->chip.base); |
414 | 359 | ||
415 | ret = gpiochip_remove(&stmpe_gpio->chip); | 360 | gpiochip_remove(&stmpe_gpio->chip); |
416 | if (ret < 0) { | ||
417 | dev_err(stmpe_gpio->dev, | ||
418 | "unable to remove gpiochip: %d\n", ret); | ||
419 | return ret; | ||
420 | } | ||
421 | 361 | ||
422 | stmpe_disable(stmpe, STMPE_BLOCK_GPIO); | 362 | stmpe_disable(stmpe, STMPE_BLOCK_GPIO); |
423 | 363 | ||
424 | if (irq >= 0) | ||
425 | free_irq(irq, stmpe_gpio); | ||
426 | |||
427 | kfree(stmpe_gpio); | 364 | kfree(stmpe_gpio); |
428 | 365 | ||
429 | return 0; | 366 | return 0; |
diff --git a/drivers/gpio/gpio-sx150x.c b/drivers/gpio/gpio-sx150x.c index b51ca9f5c140..bce6c6108f20 100644 --- a/drivers/gpio/gpio-sx150x.c +++ b/drivers/gpio/gpio-sx150x.c | |||
@@ -615,19 +615,16 @@ static int sx150x_probe(struct i2c_client *client, | |||
615 | 615 | ||
616 | return 0; | 616 | return 0; |
617 | probe_fail_post_gpiochip_add: | 617 | probe_fail_post_gpiochip_add: |
618 | WARN_ON(gpiochip_remove(&chip->gpio_chip) < 0); | 618 | gpiochip_remove(&chip->gpio_chip); |
619 | return rc; | 619 | return rc; |
620 | } | 620 | } |
621 | 621 | ||
622 | static int sx150x_remove(struct i2c_client *client) | 622 | static int sx150x_remove(struct i2c_client *client) |
623 | { | 623 | { |
624 | struct sx150x_chip *chip; | 624 | struct sx150x_chip *chip; |
625 | int rc; | ||
626 | 625 | ||
627 | chip = i2c_get_clientdata(client); | 626 | chip = i2c_get_clientdata(client); |
628 | rc = gpiochip_remove(&chip->gpio_chip); | 627 | gpiochip_remove(&chip->gpio_chip); |
629 | if (rc < 0) | ||
630 | return rc; | ||
631 | 628 | ||
632 | if (chip->irq_summary >= 0) | 629 | if (chip->irq_summary >= 0) |
633 | sx150x_remove_irq_chip(chip); | 630 | sx150x_remove_irq_chip(chip); |
diff --git a/drivers/gpio/gpio-syscon.c b/drivers/gpio/gpio-syscon.c index b50fe1297748..30884fbc750d 100644 --- a/drivers/gpio/gpio-syscon.c +++ b/drivers/gpio/gpio-syscon.c | |||
@@ -172,7 +172,8 @@ static int syscon_gpio_remove(struct platform_device *pdev) | |||
172 | { | 172 | { |
173 | struct syscon_gpio_priv *priv = platform_get_drvdata(pdev); | 173 | struct syscon_gpio_priv *priv = platform_get_drvdata(pdev); |
174 | 174 | ||
175 | return gpiochip_remove(&priv->chip); | 175 | gpiochip_remove(&priv->chip); |
176 | return 0; | ||
176 | } | 177 | } |
177 | 178 | ||
178 | static struct platform_driver syscon_gpio_driver = { | 179 | static struct platform_driver syscon_gpio_driver = { |
diff --git a/drivers/gpio/gpio-tb10x.c b/drivers/gpio/gpio-tb10x.c index 07bce97647a6..9e615be8032c 100644 --- a/drivers/gpio/gpio-tb10x.c +++ b/drivers/gpio/gpio-tb10x.c | |||
@@ -291,7 +291,6 @@ fail_ioremap: | |||
291 | static int __exit tb10x_gpio_remove(struct platform_device *pdev) | 291 | static int __exit tb10x_gpio_remove(struct platform_device *pdev) |
292 | { | 292 | { |
293 | struct tb10x_gpio *tb10x_gpio = platform_get_drvdata(pdev); | 293 | struct tb10x_gpio *tb10x_gpio = platform_get_drvdata(pdev); |
294 | int ret; | ||
295 | 294 | ||
296 | if (tb10x_gpio->gc.to_irq) { | 295 | if (tb10x_gpio->gc.to_irq) { |
297 | irq_remove_generic_chip(tb10x_gpio->domain->gc->gc[0], | 296 | irq_remove_generic_chip(tb10x_gpio->domain->gc->gc[0], |
@@ -300,9 +299,7 @@ static int __exit tb10x_gpio_remove(struct platform_device *pdev) | |||
300 | irq_domain_remove(tb10x_gpio->domain); | 299 | irq_domain_remove(tb10x_gpio->domain); |
301 | free_irq(tb10x_gpio->irq, tb10x_gpio); | 300 | free_irq(tb10x_gpio->irq, tb10x_gpio); |
302 | } | 301 | } |
303 | ret = gpiochip_remove(&tb10x_gpio->gc); | 302 | gpiochip_remove(&tb10x_gpio->gc); |
304 | if (ret) | ||
305 | return ret; | ||
306 | 303 | ||
307 | return 0; | 304 | return 0; |
308 | } | 305 | } |
diff --git a/drivers/gpio/gpio-tc3589x.c b/drivers/gpio/gpio-tc3589x.c index 51f7cbd9ff71..7324869c38e0 100644 --- a/drivers/gpio/gpio-tc3589x.c +++ b/drivers/gpio/gpio-tc3589x.c | |||
@@ -313,17 +313,11 @@ static int tc3589x_gpio_remove(struct platform_device *pdev) | |||
313 | struct tc3589x_gpio *tc3589x_gpio = platform_get_drvdata(pdev); | 313 | struct tc3589x_gpio *tc3589x_gpio = platform_get_drvdata(pdev); |
314 | struct tc3589x *tc3589x = tc3589x_gpio->tc3589x; | 314 | struct tc3589x *tc3589x = tc3589x_gpio->tc3589x; |
315 | struct tc3589x_gpio_platform_data *pdata = tc3589x->pdata->gpio; | 315 | struct tc3589x_gpio_platform_data *pdata = tc3589x->pdata->gpio; |
316 | int ret; | ||
317 | 316 | ||
318 | if (pdata && pdata->remove) | 317 | if (pdata && pdata->remove) |
319 | pdata->remove(tc3589x, tc3589x_gpio->chip.base); | 318 | pdata->remove(tc3589x, tc3589x_gpio->chip.base); |
320 | 319 | ||
321 | ret = gpiochip_remove(&tc3589x_gpio->chip); | 320 | gpiochip_remove(&tc3589x_gpio->chip); |
322 | if (ret < 0) { | ||
323 | dev_err(tc3589x_gpio->dev, | ||
324 | "unable to remove gpiochip: %d\n", ret); | ||
325 | return ret; | ||
326 | } | ||
327 | 321 | ||
328 | return 0; | 322 | return 0; |
329 | } | 323 | } |
diff --git a/drivers/gpio/gpio-timberdale.c b/drivers/gpio/gpio-timberdale.c index efc7c129016d..a685a3cbbc81 100644 --- a/drivers/gpio/gpio-timberdale.c +++ b/drivers/gpio/gpio-timberdale.c | |||
@@ -307,7 +307,6 @@ static int timbgpio_probe(struct platform_device *pdev) | |||
307 | 307 | ||
308 | static int timbgpio_remove(struct platform_device *pdev) | 308 | static int timbgpio_remove(struct platform_device *pdev) |
309 | { | 309 | { |
310 | int err; | ||
311 | struct timbgpio_platform_data *pdata = dev_get_platdata(&pdev->dev); | 310 | struct timbgpio_platform_data *pdata = dev_get_platdata(&pdev->dev); |
312 | struct timbgpio *tgpio = platform_get_drvdata(pdev); | 311 | struct timbgpio *tgpio = platform_get_drvdata(pdev); |
313 | int irq = platform_get_irq(pdev, 0); | 312 | int irq = platform_get_irq(pdev, 0); |
@@ -323,9 +322,7 @@ static int timbgpio_remove(struct platform_device *pdev) | |||
323 | irq_set_handler_data(irq, NULL); | 322 | irq_set_handler_data(irq, NULL); |
324 | } | 323 | } |
325 | 324 | ||
326 | err = gpiochip_remove(&tgpio->gpio); | 325 | gpiochip_remove(&tgpio->gpio); |
327 | if (err) | ||
328 | printk(KERN_ERR DRIVER_NAME": failed to remove gpio_chip\n"); | ||
329 | 326 | ||
330 | return 0; | 327 | return 0; |
331 | } | 328 | } |
diff --git a/drivers/gpio/gpio-tps6586x.c b/drivers/gpio/gpio-tps6586x.c index a69fbea41253..9c9238e838a9 100644 --- a/drivers/gpio/gpio-tps6586x.c +++ b/drivers/gpio/gpio-tps6586x.c | |||
@@ -137,7 +137,8 @@ static int tps6586x_gpio_remove(struct platform_device *pdev) | |||
137 | { | 137 | { |
138 | struct tps6586x_gpio *tps6586x_gpio = platform_get_drvdata(pdev); | 138 | struct tps6586x_gpio *tps6586x_gpio = platform_get_drvdata(pdev); |
139 | 139 | ||
140 | return gpiochip_remove(&tps6586x_gpio->gpio_chip); | 140 | gpiochip_remove(&tps6586x_gpio->gpio_chip); |
141 | return 0; | ||
141 | } | 142 | } |
142 | 143 | ||
143 | static struct platform_driver tps6586x_gpio_driver = { | 144 | static struct platform_driver tps6586x_gpio_driver = { |
diff --git a/drivers/gpio/gpio-tps65910.c b/drivers/gpio/gpio-tps65910.c index e2f8cda235ea..88f1f5ff4e96 100644 --- a/drivers/gpio/gpio-tps65910.c +++ b/drivers/gpio/gpio-tps65910.c | |||
@@ -190,7 +190,8 @@ static int tps65910_gpio_remove(struct platform_device *pdev) | |||
190 | { | 190 | { |
191 | struct tps65910_gpio *tps65910_gpio = platform_get_drvdata(pdev); | 191 | struct tps65910_gpio *tps65910_gpio = platform_get_drvdata(pdev); |
192 | 192 | ||
193 | return gpiochip_remove(&tps65910_gpio->gpio_chip); | 193 | gpiochip_remove(&tps65910_gpio->gpio_chip); |
194 | return 0; | ||
194 | } | 195 | } |
195 | 196 | ||
196 | static struct platform_driver tps65910_gpio_driver = { | 197 | static struct platform_driver tps65910_gpio_driver = { |
diff --git a/drivers/gpio/gpio-tps65912.c b/drivers/gpio/gpio-tps65912.c index 59ee486cb8b9..22052d84c63b 100644 --- a/drivers/gpio/gpio-tps65912.c +++ b/drivers/gpio/gpio-tps65912.c | |||
@@ -117,7 +117,8 @@ static int tps65912_gpio_remove(struct platform_device *pdev) | |||
117 | { | 117 | { |
118 | struct tps65912_gpio_data *tps65912_gpio = platform_get_drvdata(pdev); | 118 | struct tps65912_gpio_data *tps65912_gpio = platform_get_drvdata(pdev); |
119 | 119 | ||
120 | return gpiochip_remove(&tps65912_gpio->gpio_chip); | 120 | gpiochip_remove(&tps65912_gpio->gpio_chip); |
121 | return 0; | ||
121 | } | 122 | } |
122 | 123 | ||
123 | static struct platform_driver tps65912_gpio_driver = { | 124 | static struct platform_driver tps65912_gpio_driver = { |
diff --git a/drivers/gpio/gpio-ts5500.c b/drivers/gpio/gpio-ts5500.c index 3df3ebdb3e52..de18591ff11e 100644 --- a/drivers/gpio/gpio-ts5500.c +++ b/drivers/gpio/gpio-ts5500.c | |||
@@ -427,8 +427,7 @@ static int ts5500_dio_probe(struct platform_device *pdev) | |||
427 | 427 | ||
428 | return 0; | 428 | return 0; |
429 | cleanup: | 429 | cleanup: |
430 | if (gpiochip_remove(&priv->gpio_chip)) | 430 | gpiochip_remove(&priv->gpio_chip); |
431 | dev_err(dev, "failed to remove gpio chip\n"); | ||
432 | return ret; | 431 | return ret; |
433 | } | 432 | } |
434 | 433 | ||
@@ -437,7 +436,8 @@ static int ts5500_dio_remove(struct platform_device *pdev) | |||
437 | struct ts5500_priv *priv = platform_get_drvdata(pdev); | 436 | struct ts5500_priv *priv = platform_get_drvdata(pdev); |
438 | 437 | ||
439 | ts5500_disable_irq(priv); | 438 | ts5500_disable_irq(priv); |
440 | return gpiochip_remove(&priv->gpio_chip); | 439 | gpiochip_remove(&priv->gpio_chip); |
440 | return 0; | ||
441 | } | 441 | } |
442 | 442 | ||
443 | static struct platform_device_id ts5500_dio_ids[] = { | 443 | static struct platform_device_id ts5500_dio_ids[] = { |
diff --git a/drivers/gpio/gpio-twl4030.c b/drivers/gpio/gpio-twl4030.c index 3ebb1a5ff22e..118828b3736f 100644 --- a/drivers/gpio/gpio-twl4030.c +++ b/drivers/gpio/gpio-twl4030.c | |||
@@ -554,7 +554,7 @@ no_irqs: | |||
554 | 554 | ||
555 | platform_set_drvdata(pdev, priv); | 555 | platform_set_drvdata(pdev, priv); |
556 | 556 | ||
557 | if (pdata && pdata->setup) { | 557 | if (pdata->setup) { |
558 | int status; | 558 | int status; |
559 | 559 | ||
560 | status = pdata->setup(&pdev->dev, priv->gpio_chip.base, | 560 | status = pdata->setup(&pdev->dev, priv->gpio_chip.base, |
@@ -583,9 +583,7 @@ static int gpio_twl4030_remove(struct platform_device *pdev) | |||
583 | } | 583 | } |
584 | } | 584 | } |
585 | 585 | ||
586 | status = gpiochip_remove(&priv->gpio_chip); | 586 | gpiochip_remove(&priv->gpio_chip); |
587 | if (status < 0) | ||
588 | return status; | ||
589 | 587 | ||
590 | if (is_module()) | 588 | if (is_module()) |
591 | return 0; | 589 | return 0; |
diff --git a/drivers/gpio/gpio-twl6040.c b/drivers/gpio/gpio-twl6040.c index 0caf5cd1b47d..f28e04b88aa9 100644 --- a/drivers/gpio/gpio-twl6040.c +++ b/drivers/gpio/gpio-twl6040.c | |||
@@ -111,7 +111,8 @@ static int gpo_twl6040_probe(struct platform_device *pdev) | |||
111 | 111 | ||
112 | static int gpo_twl6040_remove(struct platform_device *pdev) | 112 | static int gpo_twl6040_remove(struct platform_device *pdev) |
113 | { | 113 | { |
114 | return gpiochip_remove(&twl6040gpo_chip); | 114 | gpiochip_remove(&twl6040gpo_chip); |
115 | return 0; | ||
115 | } | 116 | } |
116 | 117 | ||
117 | /* Note: this hardware lives inside an I2C-based multi-function device. */ | 118 | /* Note: this hardware lives inside an I2C-based multi-function device. */ |
diff --git a/drivers/gpio/gpio-ucb1400.c b/drivers/gpio/gpio-ucb1400.c index 2445fe771179..d502825159b9 100644 --- a/drivers/gpio/gpio-ucb1400.c +++ b/drivers/gpio/gpio-ucb1400.c | |||
@@ -70,7 +70,7 @@ static int ucb1400_gpio_probe(struct platform_device *dev) | |||
70 | if (err) | 70 | if (err) |
71 | goto err; | 71 | goto err; |
72 | 72 | ||
73 | if (ucb && ucb->gpio_setup) | 73 | if (ucb->gpio_setup) |
74 | err = ucb->gpio_setup(&dev->dev, ucb->gc.ngpio); | 74 | err = ucb->gpio_setup(&dev->dev, ucb->gc.ngpio); |
75 | 75 | ||
76 | err: | 76 | err: |
@@ -89,7 +89,7 @@ static int ucb1400_gpio_remove(struct platform_device *dev) | |||
89 | return err; | 89 | return err; |
90 | } | 90 | } |
91 | 91 | ||
92 | err = gpiochip_remove(&ucb->gc); | 92 | gpiochip_remove(&ucb->gc); |
93 | return err; | 93 | return err; |
94 | } | 94 | } |
95 | 95 | ||
diff --git a/drivers/gpio/gpio-viperboard.c b/drivers/gpio/gpio-viperboard.c index 79e3b5836712..e2a11f27807f 100644 --- a/drivers/gpio/gpio-viperboard.c +++ b/drivers/gpio/gpio-viperboard.c | |||
@@ -446,8 +446,7 @@ static int vprbrd_gpio_probe(struct platform_device *pdev) | |||
446 | return ret; | 446 | return ret; |
447 | 447 | ||
448 | err_gpiob: | 448 | err_gpiob: |
449 | if (gpiochip_remove(&vb_gpio->gpioa)) | 449 | gpiochip_remove(&vb_gpio->gpioa); |
450 | dev_err(&pdev->dev, "%s gpiochip_remove failed\n", __func__); | ||
451 | 450 | ||
452 | err_gpioa: | 451 | err_gpioa: |
453 | return ret; | 452 | return ret; |
@@ -456,13 +455,10 @@ err_gpioa: | |||
456 | static int vprbrd_gpio_remove(struct platform_device *pdev) | 455 | static int vprbrd_gpio_remove(struct platform_device *pdev) |
457 | { | 456 | { |
458 | struct vprbrd_gpio *vb_gpio = platform_get_drvdata(pdev); | 457 | struct vprbrd_gpio *vb_gpio = platform_get_drvdata(pdev); |
459 | int ret; | ||
460 | 458 | ||
461 | ret = gpiochip_remove(&vb_gpio->gpiob); | 459 | gpiochip_remove(&vb_gpio->gpiob); |
462 | if (ret == 0) | ||
463 | ret = gpiochip_remove(&vb_gpio->gpioa); | ||
464 | 460 | ||
465 | return ret; | 461 | return 0; |
466 | } | 462 | } |
467 | 463 | ||
468 | static struct platform_driver vprbrd_gpio_driver = { | 464 | static struct platform_driver vprbrd_gpio_driver = { |
diff --git a/drivers/gpio/gpio-vr41xx.c b/drivers/gpio/gpio-vr41xx.c index 66cbcc108e62..dbf28fa03f67 100644 --- a/drivers/gpio/gpio-vr41xx.c +++ b/drivers/gpio/gpio-vr41xx.c | |||
@@ -515,7 +515,7 @@ static int giu_probe(struct platform_device *pdev) | |||
515 | struct resource *res; | 515 | struct resource *res; |
516 | unsigned int trigger, i, pin; | 516 | unsigned int trigger, i, pin; |
517 | struct irq_chip *chip; | 517 | struct irq_chip *chip; |
518 | int irq, retval; | 518 | int irq, ret; |
519 | 519 | ||
520 | switch (pdev->id) { | 520 | switch (pdev->id) { |
521 | case GPIO_50PINS_PULLUPDOWN: | 521 | case GPIO_50PINS_PULLUPDOWN: |
@@ -544,7 +544,11 @@ static int giu_probe(struct platform_device *pdev) | |||
544 | 544 | ||
545 | vr41xx_gpio_chip.dev = &pdev->dev; | 545 | vr41xx_gpio_chip.dev = &pdev->dev; |
546 | 546 | ||
547 | retval = gpiochip_add(&vr41xx_gpio_chip); | 547 | ret = gpiochip_add(&vr41xx_gpio_chip); |
548 | if (!ret) { | ||
549 | iounmap(giu_base); | ||
550 | return -ENODEV; | ||
551 | } | ||
548 | 552 | ||
549 | giu_write(GIUINTENL, 0); | 553 | giu_write(GIUINTENL, 0); |
550 | giu_write(GIUINTENH, 0); | 554 | giu_write(GIUINTENH, 0); |
diff --git a/drivers/gpio/gpio-vx855.c b/drivers/gpio/gpio-vx855.c index 0fd23b6a753d..85971d4e23c1 100644 --- a/drivers/gpio/gpio-vx855.c +++ b/drivers/gpio/gpio-vx855.c | |||
@@ -288,8 +288,7 @@ static int vx855gpio_remove(struct platform_device *pdev) | |||
288 | struct vx855_gpio *vg = platform_get_drvdata(pdev); | 288 | struct vx855_gpio *vg = platform_get_drvdata(pdev); |
289 | struct resource *res; | 289 | struct resource *res; |
290 | 290 | ||
291 | if (gpiochip_remove(&vg->gpio)) | 291 | gpiochip_remove(&vg->gpio); |
292 | dev_err(&pdev->dev, "unable to remove gpio_chip?\n"); | ||
293 | 292 | ||
294 | if (vg->gpi_reserved) { | 293 | if (vg->gpi_reserved) { |
295 | res = platform_get_resource(pdev, IORESOURCE_IO, 0); | 294 | res = platform_get_resource(pdev, IORESOURCE_IO, 0); |
diff --git a/drivers/gpio/gpio-wm831x.c b/drivers/gpio/gpio-wm831x.c index b18a1a26425e..58ce75c188b7 100644 --- a/drivers/gpio/gpio-wm831x.c +++ b/drivers/gpio/gpio-wm831x.c | |||
@@ -279,7 +279,8 @@ static int wm831x_gpio_remove(struct platform_device *pdev) | |||
279 | { | 279 | { |
280 | struct wm831x_gpio *wm831x_gpio = platform_get_drvdata(pdev); | 280 | struct wm831x_gpio *wm831x_gpio = platform_get_drvdata(pdev); |
281 | 281 | ||
282 | return gpiochip_remove(&wm831x_gpio->gpio_chip); | 282 | gpiochip_remove(&wm831x_gpio->gpio_chip); |
283 | return 0; | ||
283 | } | 284 | } |
284 | 285 | ||
285 | static struct platform_driver wm831x_gpio_driver = { | 286 | static struct platform_driver wm831x_gpio_driver = { |
diff --git a/drivers/gpio/gpio-wm8350.c b/drivers/gpio/gpio-wm8350.c index 2487f9d575d3..060b89303bb6 100644 --- a/drivers/gpio/gpio-wm8350.c +++ b/drivers/gpio/gpio-wm8350.c | |||
@@ -145,7 +145,8 @@ static int wm8350_gpio_remove(struct platform_device *pdev) | |||
145 | { | 145 | { |
146 | struct wm8350_gpio_data *wm8350_gpio = platform_get_drvdata(pdev); | 146 | struct wm8350_gpio_data *wm8350_gpio = platform_get_drvdata(pdev); |
147 | 147 | ||
148 | return gpiochip_remove(&wm8350_gpio->gpio_chip); | 148 | gpiochip_remove(&wm8350_gpio->gpio_chip); |
149 | return 0; | ||
149 | } | 150 | } |
150 | 151 | ||
151 | static struct platform_driver wm8350_gpio_driver = { | 152 | static struct platform_driver wm8350_gpio_driver = { |
diff --git a/drivers/gpio/gpio-wm8994.c b/drivers/gpio/gpio-wm8994.c index d93b6b581677..6f5e42db4b9e 100644 --- a/drivers/gpio/gpio-wm8994.c +++ b/drivers/gpio/gpio-wm8994.c | |||
@@ -285,7 +285,8 @@ static int wm8994_gpio_remove(struct platform_device *pdev) | |||
285 | { | 285 | { |
286 | struct wm8994_gpio *wm8994_gpio = platform_get_drvdata(pdev); | 286 | struct wm8994_gpio *wm8994_gpio = platform_get_drvdata(pdev); |
287 | 287 | ||
288 | return gpiochip_remove(&wm8994_gpio->gpio_chip); | 288 | gpiochip_remove(&wm8994_gpio->gpio_chip); |
289 | return 0; | ||
289 | } | 290 | } |
290 | 291 | ||
291 | static struct platform_driver wm8994_gpio_driver = { | 292 | static struct platform_driver wm8994_gpio_driver = { |
diff --git a/drivers/gpio/gpio-zynq.c b/drivers/gpio/gpio-zynq.c new file mode 100644 index 000000000000..c3145f91fda3 --- /dev/null +++ b/drivers/gpio/gpio-zynq.c | |||
@@ -0,0 +1,692 @@ | |||
1 | /* | ||
2 | * Xilinx Zynq GPIO device driver | ||
3 | * | ||
4 | * Copyright (C) 2009 - 2014 Xilinx, Inc. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify it under | ||
7 | * the terms of the GNU General Public License as published by the Free Software | ||
8 | * Foundation; either version 2 of the License, or (at your option) any later | ||
9 | * version. | ||
10 | */ | ||
11 | |||
12 | #include <linux/bitops.h> | ||
13 | #include <linux/clk.h> | ||
14 | #include <linux/gpio/driver.h> | ||
15 | #include <linux/init.h> | ||
16 | #include <linux/interrupt.h> | ||
17 | #include <linux/io.h> | ||
18 | #include <linux/module.h> | ||
19 | #include <linux/platform_device.h> | ||
20 | #include <linux/pm_runtime.h> | ||
21 | |||
22 | #define DRIVER_NAME "zynq-gpio" | ||
23 | |||
24 | /* Maximum banks */ | ||
25 | #define ZYNQ_GPIO_MAX_BANK 4 | ||
26 | |||
27 | #define ZYNQ_GPIO_BANK0_NGPIO 32 | ||
28 | #define ZYNQ_GPIO_BANK1_NGPIO 22 | ||
29 | #define ZYNQ_GPIO_BANK2_NGPIO 32 | ||
30 | #define ZYNQ_GPIO_BANK3_NGPIO 32 | ||
31 | |||
32 | #define ZYNQ_GPIO_NR_GPIOS (ZYNQ_GPIO_BANK0_NGPIO + \ | ||
33 | ZYNQ_GPIO_BANK1_NGPIO + \ | ||
34 | ZYNQ_GPIO_BANK2_NGPIO + \ | ||
35 | ZYNQ_GPIO_BANK3_NGPIO) | ||
36 | |||
37 | #define ZYNQ_GPIO_BANK0_PIN_MIN 0 | ||
38 | #define ZYNQ_GPIO_BANK0_PIN_MAX (ZYNQ_GPIO_BANK0_PIN_MIN + \ | ||
39 | ZYNQ_GPIO_BANK0_NGPIO - 1) | ||
40 | #define ZYNQ_GPIO_BANK1_PIN_MIN (ZYNQ_GPIO_BANK0_PIN_MAX + 1) | ||
41 | #define ZYNQ_GPIO_BANK1_PIN_MAX (ZYNQ_GPIO_BANK1_PIN_MIN + \ | ||
42 | ZYNQ_GPIO_BANK1_NGPIO - 1) | ||
43 | #define ZYNQ_GPIO_BANK2_PIN_MIN (ZYNQ_GPIO_BANK1_PIN_MAX + 1) | ||
44 | #define ZYNQ_GPIO_BANK2_PIN_MAX (ZYNQ_GPIO_BANK2_PIN_MIN + \ | ||
45 | ZYNQ_GPIO_BANK2_NGPIO - 1) | ||
46 | #define ZYNQ_GPIO_BANK3_PIN_MIN (ZYNQ_GPIO_BANK2_PIN_MAX + 1) | ||
47 | #define ZYNQ_GPIO_BANK3_PIN_MAX (ZYNQ_GPIO_BANK3_PIN_MIN + \ | ||
48 | ZYNQ_GPIO_BANK3_NGPIO - 1) | ||
49 | |||
50 | |||
51 | /* Register offsets for the GPIO device */ | ||
52 | /* LSW Mask & Data -WO */ | ||
53 | #define ZYNQ_GPIO_DATA_LSW_OFFSET(BANK) (0x000 + (8 * BANK)) | ||
54 | /* MSW Mask & Data -WO */ | ||
55 | #define ZYNQ_GPIO_DATA_MSW_OFFSET(BANK) (0x004 + (8 * BANK)) | ||
56 | /* Data Register-RW */ | ||
57 | #define ZYNQ_GPIO_DATA_RO_OFFSET(BANK) (0x060 + (4 * BANK)) | ||
58 | /* Direction mode reg-RW */ | ||
59 | #define ZYNQ_GPIO_DIRM_OFFSET(BANK) (0x204 + (0x40 * BANK)) | ||
60 | /* Output enable reg-RW */ | ||
61 | #define ZYNQ_GPIO_OUTEN_OFFSET(BANK) (0x208 + (0x40 * BANK)) | ||
62 | /* Interrupt mask reg-RO */ | ||
63 | #define ZYNQ_GPIO_INTMASK_OFFSET(BANK) (0x20C + (0x40 * BANK)) | ||
64 | /* Interrupt enable reg-WO */ | ||
65 | #define ZYNQ_GPIO_INTEN_OFFSET(BANK) (0x210 + (0x40 * BANK)) | ||
66 | /* Interrupt disable reg-WO */ | ||
67 | #define ZYNQ_GPIO_INTDIS_OFFSET(BANK) (0x214 + (0x40 * BANK)) | ||
68 | /* Interrupt status reg-RO */ | ||
69 | #define ZYNQ_GPIO_INTSTS_OFFSET(BANK) (0x218 + (0x40 * BANK)) | ||
70 | /* Interrupt type reg-RW */ | ||
71 | #define ZYNQ_GPIO_INTTYPE_OFFSET(BANK) (0x21C + (0x40 * BANK)) | ||
72 | /* Interrupt polarity reg-RW */ | ||
73 | #define ZYNQ_GPIO_INTPOL_OFFSET(BANK) (0x220 + (0x40 * BANK)) | ||
74 | /* Interrupt on any, reg-RW */ | ||
75 | #define ZYNQ_GPIO_INTANY_OFFSET(BANK) (0x224 + (0x40 * BANK)) | ||
76 | |||
77 | /* Disable all interrupts mask */ | ||
78 | #define ZYNQ_GPIO_IXR_DISABLE_ALL 0xFFFFFFFF | ||
79 | |||
80 | /* Mid pin number of a bank */ | ||
81 | #define ZYNQ_GPIO_MID_PIN_NUM 16 | ||
82 | |||
83 | /* GPIO upper 16 bit mask */ | ||
84 | #define ZYNQ_GPIO_UPPER_MASK 0xFFFF0000 | ||
85 | |||
86 | /** | ||
87 | * struct zynq_gpio - gpio device private data structure | ||
88 | * @chip: instance of the gpio_chip | ||
89 | * @base_addr: base address of the GPIO device | ||
90 | * @clk: clock resource for this controller | ||
91 | */ | ||
92 | struct zynq_gpio { | ||
93 | struct gpio_chip chip; | ||
94 | void __iomem *base_addr; | ||
95 | struct clk *clk; | ||
96 | }; | ||
97 | |||
98 | /** | ||
99 | * zynq_gpio_get_bank_pin - Get the bank number and pin number within that bank | ||
100 | * for a given pin in the GPIO device | ||
101 | * @pin_num: gpio pin number within the device | ||
102 | * @bank_num: an output parameter used to return the bank number of the gpio | ||
103 | * pin | ||
104 | * @bank_pin_num: an output parameter used to return pin number within a bank | ||
105 | * for the given gpio pin | ||
106 | * | ||
107 | * Returns the bank number and pin offset within the bank. | ||
108 | */ | ||
109 | static inline void zynq_gpio_get_bank_pin(unsigned int pin_num, | ||
110 | unsigned int *bank_num, | ||
111 | unsigned int *bank_pin_num) | ||
112 | { | ||
113 | switch (pin_num) { | ||
114 | case ZYNQ_GPIO_BANK0_PIN_MIN ... ZYNQ_GPIO_BANK0_PIN_MAX: | ||
115 | *bank_num = 0; | ||
116 | *bank_pin_num = pin_num; | ||
117 | break; | ||
118 | case ZYNQ_GPIO_BANK1_PIN_MIN ... ZYNQ_GPIO_BANK1_PIN_MAX: | ||
119 | *bank_num = 1; | ||
120 | *bank_pin_num = pin_num - ZYNQ_GPIO_BANK1_PIN_MIN; | ||
121 | break; | ||
122 | case ZYNQ_GPIO_BANK2_PIN_MIN ... ZYNQ_GPIO_BANK2_PIN_MAX: | ||
123 | *bank_num = 2; | ||
124 | *bank_pin_num = pin_num - ZYNQ_GPIO_BANK2_PIN_MIN; | ||
125 | break; | ||
126 | case ZYNQ_GPIO_BANK3_PIN_MIN ... ZYNQ_GPIO_BANK3_PIN_MAX: | ||
127 | *bank_num = 3; | ||
128 | *bank_pin_num = pin_num - ZYNQ_GPIO_BANK3_PIN_MIN; | ||
129 | break; | ||
130 | default: | ||
131 | WARN(true, "invalid GPIO pin number: %u", pin_num); | ||
132 | *bank_num = 0; | ||
133 | *bank_pin_num = 0; | ||
134 | break; | ||
135 | } | ||
136 | } | ||
137 | |||
138 | /** | ||
139 | * zynq_gpio_get_value - Get the state of the specified pin of GPIO device | ||
140 | * @chip: gpio_chip instance to be worked on | ||
141 | * @pin: gpio pin number within the device | ||
142 | * | ||
143 | * This function reads the state of the specified pin of the GPIO device. | ||
144 | * | ||
145 | * Return: 0 if the pin is low, 1 if pin is high. | ||
146 | */ | ||
147 | static int zynq_gpio_get_value(struct gpio_chip *chip, unsigned int pin) | ||
148 | { | ||
149 | u32 data; | ||
150 | unsigned int bank_num, bank_pin_num; | ||
151 | struct zynq_gpio *gpio = container_of(chip, struct zynq_gpio, chip); | ||
152 | |||
153 | zynq_gpio_get_bank_pin(pin, &bank_num, &bank_pin_num); | ||
154 | |||
155 | data = readl_relaxed(gpio->base_addr + | ||
156 | ZYNQ_GPIO_DATA_RO_OFFSET(bank_num)); | ||
157 | |||
158 | return (data >> bank_pin_num) & 1; | ||
159 | } | ||
160 | |||
161 | /** | ||
162 | * zynq_gpio_set_value - Modify the state of the pin with specified value | ||
163 | * @chip: gpio_chip instance to be worked on | ||
164 | * @pin: gpio pin number within the device | ||
165 | * @state: value used to modify the state of the specified pin | ||
166 | * | ||
167 | * This function calculates the register offset (i.e to lower 16 bits or | ||
168 | * upper 16 bits) based on the given pin number and sets the state of a | ||
169 | * gpio pin to the specified value. The state is either 0 or non-zero. | ||
170 | */ | ||
171 | static void zynq_gpio_set_value(struct gpio_chip *chip, unsigned int pin, | ||
172 | int state) | ||
173 | { | ||
174 | unsigned int reg_offset, bank_num, bank_pin_num; | ||
175 | struct zynq_gpio *gpio = container_of(chip, struct zynq_gpio, chip); | ||
176 | |||
177 | zynq_gpio_get_bank_pin(pin, &bank_num, &bank_pin_num); | ||
178 | |||
179 | if (bank_pin_num >= ZYNQ_GPIO_MID_PIN_NUM) { | ||
180 | /* only 16 data bits in bit maskable reg */ | ||
181 | bank_pin_num -= ZYNQ_GPIO_MID_PIN_NUM; | ||
182 | reg_offset = ZYNQ_GPIO_DATA_MSW_OFFSET(bank_num); | ||
183 | } else { | ||
184 | reg_offset = ZYNQ_GPIO_DATA_LSW_OFFSET(bank_num); | ||
185 | } | ||
186 | |||
187 | /* | ||
188 | * get the 32 bit value to be written to the mask/data register where | ||
189 | * the upper 16 bits is the mask and lower 16 bits is the data | ||
190 | */ | ||
191 | state = !!state; | ||
192 | state = ~(1 << (bank_pin_num + ZYNQ_GPIO_MID_PIN_NUM)) & | ||
193 | ((state << bank_pin_num) | ZYNQ_GPIO_UPPER_MASK); | ||
194 | |||
195 | writel_relaxed(state, gpio->base_addr + reg_offset); | ||
196 | } | ||
197 | |||
198 | /** | ||
199 | * zynq_gpio_dir_in - Set the direction of the specified GPIO pin as input | ||
200 | * @chip: gpio_chip instance to be worked on | ||
201 | * @pin: gpio pin number within the device | ||
202 | * | ||
203 | * This function uses the read-modify-write sequence to set the direction of | ||
204 | * the gpio pin as input. | ||
205 | * | ||
206 | * Return: 0 always | ||
207 | */ | ||
208 | static int zynq_gpio_dir_in(struct gpio_chip *chip, unsigned int pin) | ||
209 | { | ||
210 | u32 reg; | ||
211 | unsigned int bank_num, bank_pin_num; | ||
212 | struct zynq_gpio *gpio = container_of(chip, struct zynq_gpio, chip); | ||
213 | |||
214 | zynq_gpio_get_bank_pin(pin, &bank_num, &bank_pin_num); | ||
215 | |||
216 | /* bank 0 pins 7 and 8 are special and cannot be used as inputs */ | ||
217 | if (bank_num == 0 && (bank_pin_num == 7 || bank_pin_num == 8)) | ||
218 | return -EINVAL; | ||
219 | |||
220 | /* clear the bit in direction mode reg to set the pin as input */ | ||
221 | reg = readl_relaxed(gpio->base_addr + ZYNQ_GPIO_DIRM_OFFSET(bank_num)); | ||
222 | reg &= ~BIT(bank_pin_num); | ||
223 | writel_relaxed(reg, gpio->base_addr + ZYNQ_GPIO_DIRM_OFFSET(bank_num)); | ||
224 | |||
225 | return 0; | ||
226 | } | ||
227 | |||
228 | /** | ||
229 | * zynq_gpio_dir_out - Set the direction of the specified GPIO pin as output | ||
230 | * @chip: gpio_chip instance to be worked on | ||
231 | * @pin: gpio pin number within the device | ||
232 | * @state: value to be written to specified pin | ||
233 | * | ||
234 | * This function sets the direction of specified GPIO pin as output, configures | ||
235 | * the Output Enable register for the pin and uses zynq_gpio_set to set | ||
236 | * the state of the pin to the value specified. | ||
237 | * | ||
238 | * Return: 0 always | ||
239 | */ | ||
240 | static int zynq_gpio_dir_out(struct gpio_chip *chip, unsigned int pin, | ||
241 | int state) | ||
242 | { | ||
243 | u32 reg; | ||
244 | unsigned int bank_num, bank_pin_num; | ||
245 | struct zynq_gpio *gpio = container_of(chip, struct zynq_gpio, chip); | ||
246 | |||
247 | zynq_gpio_get_bank_pin(pin, &bank_num, &bank_pin_num); | ||
248 | |||
249 | /* set the GPIO pin as output */ | ||
250 | reg = readl_relaxed(gpio->base_addr + ZYNQ_GPIO_DIRM_OFFSET(bank_num)); | ||
251 | reg |= BIT(bank_pin_num); | ||
252 | writel_relaxed(reg, gpio->base_addr + ZYNQ_GPIO_DIRM_OFFSET(bank_num)); | ||
253 | |||
254 | /* configure the output enable reg for the pin */ | ||
255 | reg = readl_relaxed(gpio->base_addr + ZYNQ_GPIO_OUTEN_OFFSET(bank_num)); | ||
256 | reg |= BIT(bank_pin_num); | ||
257 | writel_relaxed(reg, gpio->base_addr + ZYNQ_GPIO_OUTEN_OFFSET(bank_num)); | ||
258 | |||
259 | /* set the state of the pin */ | ||
260 | zynq_gpio_set_value(chip, pin, state); | ||
261 | return 0; | ||
262 | } | ||
263 | |||
264 | /** | ||
265 | * zynq_gpio_irq_mask - Disable the interrupts for a gpio pin | ||
266 | * @irq_data: per irq and chip data passed down to chip functions | ||
267 | * | ||
268 | * This function calculates gpio pin number from irq number and sets the | ||
269 | * bit in the Interrupt Disable register of the corresponding bank to disable | ||
270 | * interrupts for that pin. | ||
271 | */ | ||
272 | static void zynq_gpio_irq_mask(struct irq_data *irq_data) | ||
273 | { | ||
274 | unsigned int device_pin_num, bank_num, bank_pin_num; | ||
275 | struct zynq_gpio *gpio = irq_data_get_irq_chip_data(irq_data); | ||
276 | |||
277 | device_pin_num = irq_data->hwirq; | ||
278 | zynq_gpio_get_bank_pin(device_pin_num, &bank_num, &bank_pin_num); | ||
279 | writel_relaxed(BIT(bank_pin_num), | ||
280 | gpio->base_addr + ZYNQ_GPIO_INTDIS_OFFSET(bank_num)); | ||
281 | } | ||
282 | |||
283 | /** | ||
284 | * zynq_gpio_irq_unmask - Enable the interrupts for a gpio pin | ||
285 | * @irq_data: irq data containing irq number of gpio pin for the interrupt | ||
286 | * to enable | ||
287 | * | ||
288 | * This function calculates the gpio pin number from irq number and sets the | ||
289 | * bit in the Interrupt Enable register of the corresponding bank to enable | ||
290 | * interrupts for that pin. | ||
291 | */ | ||
292 | static void zynq_gpio_irq_unmask(struct irq_data *irq_data) | ||
293 | { | ||
294 | unsigned int device_pin_num, bank_num, bank_pin_num; | ||
295 | struct zynq_gpio *gpio = irq_data_get_irq_chip_data(irq_data); | ||
296 | |||
297 | device_pin_num = irq_data->hwirq; | ||
298 | zynq_gpio_get_bank_pin(device_pin_num, &bank_num, &bank_pin_num); | ||
299 | writel_relaxed(BIT(bank_pin_num), | ||
300 | gpio->base_addr + ZYNQ_GPIO_INTEN_OFFSET(bank_num)); | ||
301 | } | ||
302 | |||
303 | /** | ||
304 | * zynq_gpio_irq_ack - Acknowledge the interrupt of a gpio pin | ||
305 | * @irq_data: irq data containing irq number of gpio pin for the interrupt | ||
306 | * to ack | ||
307 | * | ||
308 | * This function calculates gpio pin number from irq number and sets the bit | ||
309 | * in the Interrupt Status Register of the corresponding bank, to ACK the irq. | ||
310 | */ | ||
311 | static void zynq_gpio_irq_ack(struct irq_data *irq_data) | ||
312 | { | ||
313 | unsigned int device_pin_num, bank_num, bank_pin_num; | ||
314 | struct zynq_gpio *gpio = irq_data_get_irq_chip_data(irq_data); | ||
315 | |||
316 | device_pin_num = irq_data->hwirq; | ||
317 | zynq_gpio_get_bank_pin(device_pin_num, &bank_num, &bank_pin_num); | ||
318 | writel_relaxed(BIT(bank_pin_num), | ||
319 | gpio->base_addr + ZYNQ_GPIO_INTSTS_OFFSET(bank_num)); | ||
320 | } | ||
321 | |||
322 | /** | ||
323 | * zynq_gpio_irq_enable - Enable the interrupts for a gpio pin | ||
324 | * @irq_data: irq data containing irq number of gpio pin for the interrupt | ||
325 | * to enable | ||
326 | * | ||
327 | * Clears the INTSTS bit and unmasks the given interrrupt. | ||
328 | */ | ||
329 | static void zynq_gpio_irq_enable(struct irq_data *irq_data) | ||
330 | { | ||
331 | /* | ||
332 | * The Zynq GPIO controller does not disable interrupt detection when | ||
333 | * the interrupt is masked and only disables the propagation of the | ||
334 | * interrupt. This means when the controller detects an interrupt | ||
335 | * condition while the interrupt is logically disabled it will propagate | ||
336 | * that interrupt event once the interrupt is enabled. This will cause | ||
337 | * the interrupt consumer to see spurious interrupts to prevent this | ||
338 | * first make sure that the interrupt is not asserted and then enable | ||
339 | * it. | ||
340 | */ | ||
341 | zynq_gpio_irq_ack(irq_data); | ||
342 | zynq_gpio_irq_unmask(irq_data); | ||
343 | } | ||
344 | |||
345 | /** | ||
346 | * zynq_gpio_set_irq_type - Set the irq type for a gpio pin | ||
347 | * @irq_data: irq data containing irq number of gpio pin | ||
348 | * @type: interrupt type that is to be set for the gpio pin | ||
349 | * | ||
350 | * This function gets the gpio pin number and its bank from the gpio pin number | ||
351 | * and configures the INT_TYPE, INT_POLARITY and INT_ANY registers. | ||
352 | * | ||
353 | * Return: 0, negative error otherwise. | ||
354 | * TYPE-EDGE_RISING, INT_TYPE - 1, INT_POLARITY - 1, INT_ANY - 0; | ||
355 | * TYPE-EDGE_FALLING, INT_TYPE - 1, INT_POLARITY - 0, INT_ANY - 0; | ||
356 | * TYPE-EDGE_BOTH, INT_TYPE - 1, INT_POLARITY - NA, INT_ANY - 1; | ||
357 | * TYPE-LEVEL_HIGH, INT_TYPE - 0, INT_POLARITY - 1, INT_ANY - NA; | ||
358 | * TYPE-LEVEL_LOW, INT_TYPE - 0, INT_POLARITY - 0, INT_ANY - NA | ||
359 | */ | ||
360 | static int zynq_gpio_set_irq_type(struct irq_data *irq_data, unsigned int type) | ||
361 | { | ||
362 | u32 int_type, int_pol, int_any; | ||
363 | unsigned int device_pin_num, bank_num, bank_pin_num; | ||
364 | struct zynq_gpio *gpio = irq_data_get_irq_chip_data(irq_data); | ||
365 | |||
366 | device_pin_num = irq_data->hwirq; | ||
367 | zynq_gpio_get_bank_pin(device_pin_num, &bank_num, &bank_pin_num); | ||
368 | |||
369 | int_type = readl_relaxed(gpio->base_addr + | ||
370 | ZYNQ_GPIO_INTTYPE_OFFSET(bank_num)); | ||
371 | int_pol = readl_relaxed(gpio->base_addr + | ||
372 | ZYNQ_GPIO_INTPOL_OFFSET(bank_num)); | ||
373 | int_any = readl_relaxed(gpio->base_addr + | ||
374 | ZYNQ_GPIO_INTANY_OFFSET(bank_num)); | ||
375 | |||
376 | /* | ||
377 | * based on the type requested, configure the INT_TYPE, INT_POLARITY | ||
378 | * and INT_ANY registers | ||
379 | */ | ||
380 | switch (type) { | ||
381 | case IRQ_TYPE_EDGE_RISING: | ||
382 | int_type |= BIT(bank_pin_num); | ||
383 | int_pol |= BIT(bank_pin_num); | ||
384 | int_any &= ~BIT(bank_pin_num); | ||
385 | break; | ||
386 | case IRQ_TYPE_EDGE_FALLING: | ||
387 | int_type |= BIT(bank_pin_num); | ||
388 | int_pol &= ~BIT(bank_pin_num); | ||
389 | int_any &= ~BIT(bank_pin_num); | ||
390 | break; | ||
391 | case IRQ_TYPE_EDGE_BOTH: | ||
392 | int_type |= BIT(bank_pin_num); | ||
393 | int_any |= BIT(bank_pin_num); | ||
394 | break; | ||
395 | case IRQ_TYPE_LEVEL_HIGH: | ||
396 | int_type &= ~BIT(bank_pin_num); | ||
397 | int_pol |= BIT(bank_pin_num); | ||
398 | break; | ||
399 | case IRQ_TYPE_LEVEL_LOW: | ||
400 | int_type &= ~BIT(bank_pin_num); | ||
401 | int_pol &= ~BIT(bank_pin_num); | ||
402 | break; | ||
403 | default: | ||
404 | return -EINVAL; | ||
405 | } | ||
406 | |||
407 | writel_relaxed(int_type, | ||
408 | gpio->base_addr + ZYNQ_GPIO_INTTYPE_OFFSET(bank_num)); | ||
409 | writel_relaxed(int_pol, | ||
410 | gpio->base_addr + ZYNQ_GPIO_INTPOL_OFFSET(bank_num)); | ||
411 | writel_relaxed(int_any, | ||
412 | gpio->base_addr + ZYNQ_GPIO_INTANY_OFFSET(bank_num)); | ||
413 | return 0; | ||
414 | } | ||
415 | |||
416 | static int zynq_gpio_set_wake(struct irq_data *data, unsigned int on) | ||
417 | { | ||
418 | if (on) | ||
419 | zynq_gpio_irq_unmask(data); | ||
420 | else | ||
421 | zynq_gpio_irq_mask(data); | ||
422 | |||
423 | return 0; | ||
424 | } | ||
425 | |||
426 | /* irq chip descriptor */ | ||
427 | static struct irq_chip zynq_gpio_irqchip = { | ||
428 | .name = DRIVER_NAME, | ||
429 | .irq_enable = zynq_gpio_irq_enable, | ||
430 | .irq_mask = zynq_gpio_irq_mask, | ||
431 | .irq_unmask = zynq_gpio_irq_unmask, | ||
432 | .irq_set_type = zynq_gpio_set_irq_type, | ||
433 | .irq_set_wake = zynq_gpio_set_wake, | ||
434 | }; | ||
435 | |||
436 | /** | ||
437 | * zynq_gpio_irqhandler - IRQ handler for the gpio banks of a gpio device | ||
438 | * @irq: irq number of the gpio bank where interrupt has occurred | ||
439 | * @desc: irq descriptor instance of the 'irq' | ||
440 | * | ||
441 | * This function reads the Interrupt Status Register of each bank to get the | ||
442 | * gpio pin number which has triggered an interrupt. It then acks the triggered | ||
443 | * interrupt and calls the pin specific handler set by the higher layer | ||
444 | * application for that pin. | ||
445 | * Note: A bug is reported if no handler is set for the gpio pin. | ||
446 | */ | ||
447 | static void zynq_gpio_irqhandler(unsigned int irq, struct irq_desc *desc) | ||
448 | { | ||
449 | u32 int_sts, int_enb; | ||
450 | unsigned int bank_num; | ||
451 | struct zynq_gpio *gpio = irq_get_handler_data(irq); | ||
452 | struct irq_chip *irqchip = irq_desc_get_chip(desc); | ||
453 | |||
454 | chained_irq_enter(irqchip, desc); | ||
455 | |||
456 | for (bank_num = 0; bank_num < ZYNQ_GPIO_MAX_BANK; bank_num++) { | ||
457 | int_sts = readl_relaxed(gpio->base_addr + | ||
458 | ZYNQ_GPIO_INTSTS_OFFSET(bank_num)); | ||
459 | int_enb = readl_relaxed(gpio->base_addr + | ||
460 | ZYNQ_GPIO_INTMASK_OFFSET(bank_num)); | ||
461 | int_sts &= ~int_enb; | ||
462 | if (int_sts) { | ||
463 | int offset; | ||
464 | unsigned long pending = int_sts; | ||
465 | |||
466 | for_each_set_bit(offset, &pending, 32) { | ||
467 | unsigned int gpio_irq = | ||
468 | irq_find_mapping(gpio->chip.irqdomain, | ||
469 | offset); | ||
470 | generic_handle_irq(gpio_irq); | ||
471 | } | ||
472 | |||
473 | /* clear IRQ in HW */ | ||
474 | writel_relaxed(int_sts, gpio->base_addr + | ||
475 | ZYNQ_GPIO_INTSTS_OFFSET(bank_num)); | ||
476 | } | ||
477 | } | ||
478 | |||
479 | chained_irq_exit(irqchip, desc); | ||
480 | } | ||
481 | |||
482 | static int __maybe_unused zynq_gpio_suspend(struct device *dev) | ||
483 | { | ||
484 | if (!device_may_wakeup(dev)) | ||
485 | return pm_runtime_force_suspend(dev); | ||
486 | |||
487 | return 0; | ||
488 | } | ||
489 | |||
490 | static int __maybe_unused zynq_gpio_resume(struct device *dev) | ||
491 | { | ||
492 | if (!device_may_wakeup(dev)) | ||
493 | return pm_runtime_force_resume(dev); | ||
494 | |||
495 | return 0; | ||
496 | } | ||
497 | |||
498 | static int __maybe_unused zynq_gpio_runtime_suspend(struct device *dev) | ||
499 | { | ||
500 | struct platform_device *pdev = to_platform_device(dev); | ||
501 | struct zynq_gpio *gpio = platform_get_drvdata(pdev); | ||
502 | |||
503 | clk_disable_unprepare(gpio->clk); | ||
504 | |||
505 | return 0; | ||
506 | } | ||
507 | |||
508 | static int __maybe_unused zynq_gpio_runtime_resume(struct device *dev) | ||
509 | { | ||
510 | struct platform_device *pdev = to_platform_device(dev); | ||
511 | struct zynq_gpio *gpio = platform_get_drvdata(pdev); | ||
512 | |||
513 | return clk_prepare_enable(gpio->clk); | ||
514 | } | ||
515 | |||
516 | static int zynq_gpio_request(struct gpio_chip *chip, unsigned offset) | ||
517 | { | ||
518 | int ret; | ||
519 | |||
520 | ret = pm_runtime_get_sync(chip->dev); | ||
521 | |||
522 | /* | ||
523 | * If the device is already active pm_runtime_get() will return 1 on | ||
524 | * success, but gpio_request still needs to return 0. | ||
525 | */ | ||
526 | return ret < 0 ? ret : 0; | ||
527 | } | ||
528 | |||
529 | static void zynq_gpio_free(struct gpio_chip *chip, unsigned offset) | ||
530 | { | ||
531 | pm_runtime_put(chip->dev); | ||
532 | } | ||
533 | |||
534 | static const struct dev_pm_ops zynq_gpio_dev_pm_ops = { | ||
535 | SET_SYSTEM_SLEEP_PM_OPS(zynq_gpio_suspend, zynq_gpio_resume) | ||
536 | SET_PM_RUNTIME_PM_OPS(zynq_gpio_runtime_suspend, | ||
537 | zynq_gpio_runtime_resume, NULL) | ||
538 | }; | ||
539 | |||
540 | /** | ||
541 | * zynq_gpio_probe - Initialization method for a zynq_gpio device | ||
542 | * @pdev: platform device instance | ||
543 | * | ||
544 | * This function allocates memory resources for the gpio device and registers | ||
545 | * all the banks of the device. It will also set up interrupts for the gpio | ||
546 | * pins. | ||
547 | * Note: Interrupts are disabled for all the banks during initialization. | ||
548 | * | ||
549 | * Return: 0 on success, negative error otherwise. | ||
550 | */ | ||
551 | static int zynq_gpio_probe(struct platform_device *pdev) | ||
552 | { | ||
553 | int ret, bank_num, irq; | ||
554 | struct zynq_gpio *gpio; | ||
555 | struct gpio_chip *chip; | ||
556 | struct resource *res; | ||
557 | |||
558 | gpio = devm_kzalloc(&pdev->dev, sizeof(*gpio), GFP_KERNEL); | ||
559 | if (!gpio) | ||
560 | return -ENOMEM; | ||
561 | |||
562 | platform_set_drvdata(pdev, gpio); | ||
563 | |||
564 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
565 | gpio->base_addr = devm_ioremap_resource(&pdev->dev, res); | ||
566 | if (IS_ERR(gpio->base_addr)) | ||
567 | return PTR_ERR(gpio->base_addr); | ||
568 | |||
569 | irq = platform_get_irq(pdev, 0); | ||
570 | if (irq < 0) { | ||
571 | dev_err(&pdev->dev, "invalid IRQ\n"); | ||
572 | return irq; | ||
573 | } | ||
574 | |||
575 | /* configure the gpio chip */ | ||
576 | chip = &gpio->chip; | ||
577 | chip->label = "zynq_gpio"; | ||
578 | chip->owner = THIS_MODULE; | ||
579 | chip->dev = &pdev->dev; | ||
580 | chip->get = zynq_gpio_get_value; | ||
581 | chip->set = zynq_gpio_set_value; | ||
582 | chip->request = zynq_gpio_request; | ||
583 | chip->free = zynq_gpio_free; | ||
584 | chip->direction_input = zynq_gpio_dir_in; | ||
585 | chip->direction_output = zynq_gpio_dir_out; | ||
586 | chip->base = -1; | ||
587 | chip->ngpio = ZYNQ_GPIO_NR_GPIOS; | ||
588 | |||
589 | /* Enable GPIO clock */ | ||
590 | gpio->clk = devm_clk_get(&pdev->dev, NULL); | ||
591 | if (IS_ERR(gpio->clk)) { | ||
592 | dev_err(&pdev->dev, "input clock not found.\n"); | ||
593 | return PTR_ERR(gpio->clk); | ||
594 | } | ||
595 | ret = clk_prepare_enable(gpio->clk); | ||
596 | if (ret) { | ||
597 | dev_err(&pdev->dev, "Unable to enable clock.\n"); | ||
598 | return ret; | ||
599 | } | ||
600 | |||
601 | /* report a bug if gpio chip registration fails */ | ||
602 | ret = gpiochip_add(chip); | ||
603 | if (ret) { | ||
604 | dev_err(&pdev->dev, "Failed to add gpio chip\n"); | ||
605 | goto err_disable_clk; | ||
606 | } | ||
607 | |||
608 | /* disable interrupts for all banks */ | ||
609 | for (bank_num = 0; bank_num < ZYNQ_GPIO_MAX_BANK; bank_num++) | ||
610 | writel_relaxed(ZYNQ_GPIO_IXR_DISABLE_ALL, gpio->base_addr + | ||
611 | ZYNQ_GPIO_INTDIS_OFFSET(bank_num)); | ||
612 | |||
613 | ret = gpiochip_irqchip_add(chip, &zynq_gpio_irqchip, 0, | ||
614 | handle_simple_irq, IRQ_TYPE_NONE); | ||
615 | if (ret) { | ||
616 | dev_err(&pdev->dev, "Failed to add irq chip\n"); | ||
617 | goto err_rm_gpiochip; | ||
618 | } | ||
619 | |||
620 | gpiochip_set_chained_irqchip(chip, &zynq_gpio_irqchip, irq, | ||
621 | zynq_gpio_irqhandler); | ||
622 | |||
623 | pm_runtime_set_active(&pdev->dev); | ||
624 | pm_runtime_enable(&pdev->dev); | ||
625 | |||
626 | device_set_wakeup_capable(&pdev->dev, 1); | ||
627 | |||
628 | return 0; | ||
629 | |||
630 | err_rm_gpiochip: | ||
631 | if (gpiochip_remove(chip)) | ||
632 | dev_err(&pdev->dev, "Failed to remove gpio chip\n"); | ||
633 | err_disable_clk: | ||
634 | clk_disable_unprepare(gpio->clk); | ||
635 | |||
636 | return ret; | ||
637 | } | ||
638 | |||
639 | /** | ||
640 | * zynq_gpio_remove - Driver removal function | ||
641 | * @pdev: platform device instance | ||
642 | * | ||
643 | * Return: 0 always | ||
644 | */ | ||
645 | static int zynq_gpio_remove(struct platform_device *pdev) | ||
646 | { | ||
647 | int ret; | ||
648 | struct zynq_gpio *gpio = platform_get_drvdata(pdev); | ||
649 | |||
650 | pm_runtime_get_sync(&pdev->dev); | ||
651 | |||
652 | ret = gpiochip_remove(&gpio->chip); | ||
653 | if (ret) { | ||
654 | dev_err(&pdev->dev, "Failed to remove gpio chip\n"); | ||
655 | return ret; | ||
656 | } | ||
657 | clk_disable_unprepare(gpio->clk); | ||
658 | device_set_wakeup_capable(&pdev->dev, 0); | ||
659 | return 0; | ||
660 | } | ||
661 | |||
662 | static struct of_device_id zynq_gpio_of_match[] = { | ||
663 | { .compatible = "xlnx,zynq-gpio-1.0", }, | ||
664 | { /* end of table */ } | ||
665 | }; | ||
666 | MODULE_DEVICE_TABLE(of, zynq_gpio_of_match); | ||
667 | |||
668 | static struct platform_driver zynq_gpio_driver = { | ||
669 | .driver = { | ||
670 | .name = DRIVER_NAME, | ||
671 | .owner = THIS_MODULE, | ||
672 | .pm = &zynq_gpio_dev_pm_ops, | ||
673 | .of_match_table = zynq_gpio_of_match, | ||
674 | }, | ||
675 | .probe = zynq_gpio_probe, | ||
676 | .remove = zynq_gpio_remove, | ||
677 | }; | ||
678 | |||
679 | /** | ||
680 | * zynq_gpio_init - Initial driver registration call | ||
681 | * | ||
682 | * Return: value from platform_driver_register | ||
683 | */ | ||
684 | static int __init zynq_gpio_init(void) | ||
685 | { | ||
686 | return platform_driver_register(&zynq_gpio_driver); | ||
687 | } | ||
688 | postcore_initcall(zynq_gpio_init); | ||
689 | |||
690 | MODULE_AUTHOR("Xilinx Inc."); | ||
691 | MODULE_DESCRIPTION("Zynq GPIO driver"); | ||
692 | MODULE_LICENSE("GPL"); | ||
diff --git a/drivers/gpio/gpiolib-acpi.c b/drivers/gpio/gpiolib-acpi.c index 4a987917c186..d62eaaa75397 100644 --- a/drivers/gpio/gpiolib-acpi.c +++ b/drivers/gpio/gpiolib-acpi.c | |||
@@ -157,7 +157,7 @@ static acpi_status acpi_gpiochip_request_interrupt(struct acpi_resource *ares, | |||
157 | 157 | ||
158 | gpiod_direction_input(desc); | 158 | gpiod_direction_input(desc); |
159 | 159 | ||
160 | ret = gpiod_lock_as_irq(desc); | 160 | ret = gpio_lock_as_irq(chip, pin); |
161 | if (ret) { | 161 | if (ret) { |
162 | dev_err(chip->dev, "Failed to lock GPIO as interrupt\n"); | 162 | dev_err(chip->dev, "Failed to lock GPIO as interrupt\n"); |
163 | goto fail_free_desc; | 163 | goto fail_free_desc; |
@@ -212,7 +212,7 @@ static acpi_status acpi_gpiochip_request_interrupt(struct acpi_resource *ares, | |||
212 | fail_free_event: | 212 | fail_free_event: |
213 | kfree(event); | 213 | kfree(event); |
214 | fail_unlock_irq: | 214 | fail_unlock_irq: |
215 | gpiod_unlock_as_irq(desc); | 215 | gpio_unlock_as_irq(chip, pin); |
216 | fail_free_desc: | 216 | fail_free_desc: |
217 | gpiochip_free_own_desc(desc); | 217 | gpiochip_free_own_desc(desc); |
218 | 218 | ||
@@ -221,7 +221,7 @@ fail_free_desc: | |||
221 | 221 | ||
222 | /** | 222 | /** |
223 | * acpi_gpiochip_request_interrupts() - Register isr for gpio chip ACPI events | 223 | * acpi_gpiochip_request_interrupts() - Register isr for gpio chip ACPI events |
224 | * @acpi_gpio: ACPI GPIO chip | 224 | * @chip: GPIO chip |
225 | * | 225 | * |
226 | * ACPI5 platforms can use GPIO signaled ACPI events. These GPIO interrupts are | 226 | * ACPI5 platforms can use GPIO signaled ACPI events. These GPIO interrupts are |
227 | * handled by ACPI event methods which need to be called from the GPIO | 227 | * handled by ACPI event methods which need to be called from the GPIO |
@@ -229,11 +229,21 @@ fail_free_desc: | |||
229 | * gpio pins have acpi event methods and assigns interrupt handlers that calls | 229 | * gpio pins have acpi event methods and assigns interrupt handlers that calls |
230 | * the acpi event methods for those pins. | 230 | * the acpi event methods for those pins. |
231 | */ | 231 | */ |
232 | static void acpi_gpiochip_request_interrupts(struct acpi_gpio_chip *acpi_gpio) | 232 | void acpi_gpiochip_request_interrupts(struct gpio_chip *chip) |
233 | { | 233 | { |
234 | struct gpio_chip *chip = acpi_gpio->chip; | 234 | struct acpi_gpio_chip *acpi_gpio; |
235 | acpi_handle handle; | ||
236 | acpi_status status; | ||
237 | |||
238 | if (!chip->dev || !chip->to_irq) | ||
239 | return; | ||
235 | 240 | ||
236 | if (!chip->to_irq) | 241 | handle = ACPI_HANDLE(chip->dev); |
242 | if (!handle) | ||
243 | return; | ||
244 | |||
245 | status = acpi_get_data(handle, acpi_gpio_chip_dh, (void **)&acpi_gpio); | ||
246 | if (ACPI_FAILURE(status)) | ||
237 | return; | 247 | return; |
238 | 248 | ||
239 | INIT_LIST_HEAD(&acpi_gpio->events); | 249 | INIT_LIST_HEAD(&acpi_gpio->events); |
@@ -243,17 +253,27 @@ static void acpi_gpiochip_request_interrupts(struct acpi_gpio_chip *acpi_gpio) | |||
243 | 253 | ||
244 | /** | 254 | /** |
245 | * acpi_gpiochip_free_interrupts() - Free GPIO ACPI event interrupts. | 255 | * acpi_gpiochip_free_interrupts() - Free GPIO ACPI event interrupts. |
246 | * @acpi_gpio: ACPI GPIO chip | 256 | * @chip: GPIO chip |
247 | * | 257 | * |
248 | * Free interrupts associated with GPIO ACPI event method for the given | 258 | * Free interrupts associated with GPIO ACPI event method for the given |
249 | * GPIO chip. | 259 | * GPIO chip. |
250 | */ | 260 | */ |
251 | static void acpi_gpiochip_free_interrupts(struct acpi_gpio_chip *acpi_gpio) | 261 | void acpi_gpiochip_free_interrupts(struct gpio_chip *chip) |
252 | { | 262 | { |
263 | struct acpi_gpio_chip *acpi_gpio; | ||
253 | struct acpi_gpio_event *event, *ep; | 264 | struct acpi_gpio_event *event, *ep; |
254 | struct gpio_chip *chip = acpi_gpio->chip; | 265 | acpi_handle handle; |
266 | acpi_status status; | ||
267 | |||
268 | if (!chip->dev || !chip->to_irq) | ||
269 | return; | ||
255 | 270 | ||
256 | if (!chip->to_irq) | 271 | handle = ACPI_HANDLE(chip->dev); |
272 | if (!handle) | ||
273 | return; | ||
274 | |||
275 | status = acpi_get_data(handle, acpi_gpio_chip_dh, (void **)&acpi_gpio); | ||
276 | if (ACPI_FAILURE(status)) | ||
257 | return; | 277 | return; |
258 | 278 | ||
259 | list_for_each_entry_safe_reverse(event, ep, &acpi_gpio->events, node) { | 279 | list_for_each_entry_safe_reverse(event, ep, &acpi_gpio->events, node) { |
@@ -263,7 +283,7 @@ static void acpi_gpiochip_free_interrupts(struct acpi_gpio_chip *acpi_gpio) | |||
263 | desc = gpiochip_get_desc(chip, event->pin); | 283 | desc = gpiochip_get_desc(chip, event->pin); |
264 | if (WARN_ON(IS_ERR(desc))) | 284 | if (WARN_ON(IS_ERR(desc))) |
265 | continue; | 285 | continue; |
266 | gpiod_unlock_as_irq(desc); | 286 | gpio_unlock_as_irq(chip, event->pin); |
267 | gpiochip_free_own_desc(desc); | 287 | gpiochip_free_own_desc(desc); |
268 | list_del(&event->node); | 288 | list_del(&event->node); |
269 | kfree(event); | 289 | kfree(event); |
@@ -525,7 +545,6 @@ void acpi_gpiochip_add(struct gpio_chip *chip) | |||
525 | return; | 545 | return; |
526 | } | 546 | } |
527 | 547 | ||
528 | acpi_gpiochip_request_interrupts(acpi_gpio); | ||
529 | acpi_gpiochip_request_regions(acpi_gpio); | 548 | acpi_gpiochip_request_regions(acpi_gpio); |
530 | } | 549 | } |
531 | 550 | ||
@@ -549,7 +568,6 @@ void acpi_gpiochip_remove(struct gpio_chip *chip) | |||
549 | } | 568 | } |
550 | 569 | ||
551 | acpi_gpiochip_free_regions(acpi_gpio); | 570 | acpi_gpiochip_free_regions(acpi_gpio); |
552 | acpi_gpiochip_free_interrupts(acpi_gpio); | ||
553 | 571 | ||
554 | acpi_detach_data(handle, acpi_gpio_chip_dh); | 572 | acpi_detach_data(handle, acpi_gpio_chip_dh); |
555 | kfree(acpi_gpio); | 573 | kfree(acpi_gpio); |
diff --git a/drivers/gpio/gpiolib-legacy.c b/drivers/gpio/gpiolib-legacy.c new file mode 100644 index 000000000000..078ae6c2df79 --- /dev/null +++ b/drivers/gpio/gpiolib-legacy.c | |||
@@ -0,0 +1,102 @@ | |||
1 | #include <linux/gpio/consumer.h> | ||
2 | #include <linux/gpio/driver.h> | ||
3 | |||
4 | #include <linux/gpio.h> | ||
5 | |||
6 | #include "gpiolib.h" | ||
7 | |||
8 | void gpio_free(unsigned gpio) | ||
9 | { | ||
10 | gpiod_free(gpio_to_desc(gpio)); | ||
11 | } | ||
12 | EXPORT_SYMBOL_GPL(gpio_free); | ||
13 | |||
14 | /** | ||
15 | * gpio_request_one - request a single GPIO with initial configuration | ||
16 | * @gpio: the GPIO number | ||
17 | * @flags: GPIO configuration as specified by GPIOF_* | ||
18 | * @label: a literal description string of this GPIO | ||
19 | */ | ||
20 | int gpio_request_one(unsigned gpio, unsigned long flags, const char *label) | ||
21 | { | ||
22 | struct gpio_desc *desc; | ||
23 | int err; | ||
24 | |||
25 | desc = gpio_to_desc(gpio); | ||
26 | |||
27 | err = gpiod_request(desc, label); | ||
28 | if (err) | ||
29 | return err; | ||
30 | |||
31 | if (flags & GPIOF_OPEN_DRAIN) | ||
32 | set_bit(FLAG_OPEN_DRAIN, &desc->flags); | ||
33 | |||
34 | if (flags & GPIOF_OPEN_SOURCE) | ||
35 | set_bit(FLAG_OPEN_SOURCE, &desc->flags); | ||
36 | |||
37 | if (flags & GPIOF_ACTIVE_LOW) | ||
38 | set_bit(FLAG_ACTIVE_LOW, &desc->flags); | ||
39 | |||
40 | if (flags & GPIOF_DIR_IN) | ||
41 | err = gpiod_direction_input(desc); | ||
42 | else | ||
43 | err = gpiod_direction_output_raw(desc, | ||
44 | (flags & GPIOF_INIT_HIGH) ? 1 : 0); | ||
45 | |||
46 | if (err) | ||
47 | goto free_gpio; | ||
48 | |||
49 | if (flags & GPIOF_EXPORT) { | ||
50 | err = gpiod_export(desc, flags & GPIOF_EXPORT_CHANGEABLE); | ||
51 | if (err) | ||
52 | goto free_gpio; | ||
53 | } | ||
54 | |||
55 | return 0; | ||
56 | |||
57 | free_gpio: | ||
58 | gpiod_free(desc); | ||
59 | return err; | ||
60 | } | ||
61 | EXPORT_SYMBOL_GPL(gpio_request_one); | ||
62 | |||
63 | int gpio_request(unsigned gpio, const char *label) | ||
64 | { | ||
65 | return gpiod_request(gpio_to_desc(gpio), label); | ||
66 | } | ||
67 | EXPORT_SYMBOL_GPL(gpio_request); | ||
68 | |||
69 | /** | ||
70 | * gpio_request_array - request multiple GPIOs in a single call | ||
71 | * @array: array of the 'struct gpio' | ||
72 | * @num: how many GPIOs in the array | ||
73 | */ | ||
74 | int gpio_request_array(const struct gpio *array, size_t num) | ||
75 | { | ||
76 | int i, err; | ||
77 | |||
78 | for (i = 0; i < num; i++, array++) { | ||
79 | err = gpio_request_one(array->gpio, array->flags, array->label); | ||
80 | if (err) | ||
81 | goto err_free; | ||
82 | } | ||
83 | return 0; | ||
84 | |||
85 | err_free: | ||
86 | while (i--) | ||
87 | gpio_free((--array)->gpio); | ||
88 | return err; | ||
89 | } | ||
90 | EXPORT_SYMBOL_GPL(gpio_request_array); | ||
91 | |||
92 | /** | ||
93 | * gpio_free_array - release multiple GPIOs in a single call | ||
94 | * @array: array of the 'struct gpio' | ||
95 | * @num: how many GPIOs in the array | ||
96 | */ | ||
97 | void gpio_free_array(const struct gpio *array, size_t num) | ||
98 | { | ||
99 | while (num--) | ||
100 | gpio_free((array++)->gpio); | ||
101 | } | ||
102 | EXPORT_SYMBOL_GPL(gpio_free_array); | ||
diff --git a/drivers/gpio/gpiolib-of.c b/drivers/gpio/gpiolib-of.c index af7e25c9a9ae..7cfdc2278905 100644 --- a/drivers/gpio/gpiolib-of.c +++ b/drivers/gpio/gpiolib-of.c | |||
@@ -23,7 +23,7 @@ | |||
23 | #include <linux/pinctrl/pinctrl.h> | 23 | #include <linux/pinctrl/pinctrl.h> |
24 | #include <linux/slab.h> | 24 | #include <linux/slab.h> |
25 | 25 | ||
26 | struct gpio_desc; | 26 | #include "gpiolib.h" |
27 | 27 | ||
28 | /* Private data structure for of_gpiochip_find_and_xlate */ | 28 | /* Private data structure for of_gpiochip_find_and_xlate */ |
29 | struct gg_data { | 29 | struct gg_data { |
@@ -82,19 +82,19 @@ struct gpio_desc *of_get_named_gpiod_flags(struct device_node *np, | |||
82 | ret = of_parse_phandle_with_args(np, propname, "#gpio-cells", index, | 82 | ret = of_parse_phandle_with_args(np, propname, "#gpio-cells", index, |
83 | &gg_data.gpiospec); | 83 | &gg_data.gpiospec); |
84 | if (ret) { | 84 | if (ret) { |
85 | pr_debug("%s: can't parse gpios property of node '%s[%d]'\n", | 85 | pr_debug("%s: can't parse '%s' property of node '%s[%d]'\n", |
86 | __func__, np->full_name, index); | 86 | __func__, propname, np->full_name, index); |
87 | return ERR_PTR(ret); | 87 | return ERR_PTR(ret); |
88 | } | 88 | } |
89 | 89 | ||
90 | gpiochip_find(&gg_data, of_gpiochip_find_and_xlate); | 90 | gpiochip_find(&gg_data, of_gpiochip_find_and_xlate); |
91 | 91 | ||
92 | of_node_put(gg_data.gpiospec.np); | 92 | of_node_put(gg_data.gpiospec.np); |
93 | pr_debug("%s exited with status %d\n", __func__, | 93 | pr_debug("%s: parsed '%s' property of node '%s[%d]' - status (%d)\n", |
94 | __func__, propname, np->full_name, index, | ||
94 | PTR_ERR_OR_ZERO(gg_data.out_gpio)); | 95 | PTR_ERR_OR_ZERO(gg_data.out_gpio)); |
95 | return gg_data.out_gpio; | 96 | return gg_data.out_gpio; |
96 | } | 97 | } |
97 | EXPORT_SYMBOL(of_get_named_gpiod_flags); | ||
98 | 98 | ||
99 | int of_get_named_gpio_flags(struct device_node *np, const char *list_name, | 99 | int of_get_named_gpio_flags(struct device_node *np, const char *list_name, |
100 | int index, enum of_gpio_flags *flags) | 100 | int index, enum of_gpio_flags *flags) |
diff --git a/drivers/gpio/gpiolib-sysfs.c b/drivers/gpio/gpiolib-sysfs.c new file mode 100644 index 000000000000..5f2150b619a7 --- /dev/null +++ b/drivers/gpio/gpiolib-sysfs.c | |||
@@ -0,0 +1,827 @@ | |||
1 | #include <linux/idr.h> | ||
2 | #include <linux/mutex.h> | ||
3 | #include <linux/device.h> | ||
4 | #include <linux/sysfs.h> | ||
5 | #include <linux/gpio/consumer.h> | ||
6 | #include <linux/gpio/driver.h> | ||
7 | #include <linux/interrupt.h> | ||
8 | #include <linux/kdev_t.h> | ||
9 | |||
10 | #include "gpiolib.h" | ||
11 | |||
12 | static DEFINE_IDR(dirent_idr); | ||
13 | |||
14 | |||
15 | /* lock protects against unexport_gpio() being called while | ||
16 | * sysfs files are active. | ||
17 | */ | ||
18 | static DEFINE_MUTEX(sysfs_lock); | ||
19 | |||
20 | /* | ||
21 | * /sys/class/gpio/gpioN... only for GPIOs that are exported | ||
22 | * /direction | ||
23 | * * MAY BE OMITTED if kernel won't allow direction changes | ||
24 | * * is read/write as "in" or "out" | ||
25 | * * may also be written as "high" or "low", initializing | ||
26 | * output value as specified ("out" implies "low") | ||
27 | * /value | ||
28 | * * always readable, subject to hardware behavior | ||
29 | * * may be writable, as zero/nonzero | ||
30 | * /edge | ||
31 | * * configures behavior of poll(2) on /value | ||
32 | * * available only if pin can generate IRQs on input | ||
33 | * * is read/write as "none", "falling", "rising", or "both" | ||
34 | * /active_low | ||
35 | * * configures polarity of /value | ||
36 | * * is read/write as zero/nonzero | ||
37 | * * also affects existing and subsequent "falling" and "rising" | ||
38 | * /edge configuration | ||
39 | */ | ||
40 | |||
41 | static ssize_t gpio_direction_show(struct device *dev, | ||
42 | struct device_attribute *attr, char *buf) | ||
43 | { | ||
44 | const struct gpio_desc *desc = dev_get_drvdata(dev); | ||
45 | ssize_t status; | ||
46 | |||
47 | mutex_lock(&sysfs_lock); | ||
48 | |||
49 | if (!test_bit(FLAG_EXPORT, &desc->flags)) { | ||
50 | status = -EIO; | ||
51 | } else { | ||
52 | gpiod_get_direction(desc); | ||
53 | status = sprintf(buf, "%s\n", | ||
54 | test_bit(FLAG_IS_OUT, &desc->flags) | ||
55 | ? "out" : "in"); | ||
56 | } | ||
57 | |||
58 | mutex_unlock(&sysfs_lock); | ||
59 | return status; | ||
60 | } | ||
61 | |||
62 | static ssize_t gpio_direction_store(struct device *dev, | ||
63 | struct device_attribute *attr, const char *buf, size_t size) | ||
64 | { | ||
65 | struct gpio_desc *desc = dev_get_drvdata(dev); | ||
66 | ssize_t status; | ||
67 | |||
68 | mutex_lock(&sysfs_lock); | ||
69 | |||
70 | if (!test_bit(FLAG_EXPORT, &desc->flags)) | ||
71 | status = -EIO; | ||
72 | else if (sysfs_streq(buf, "high")) | ||
73 | status = gpiod_direction_output_raw(desc, 1); | ||
74 | else if (sysfs_streq(buf, "out") || sysfs_streq(buf, "low")) | ||
75 | status = gpiod_direction_output_raw(desc, 0); | ||
76 | else if (sysfs_streq(buf, "in")) | ||
77 | status = gpiod_direction_input(desc); | ||
78 | else | ||
79 | status = -EINVAL; | ||
80 | |||
81 | mutex_unlock(&sysfs_lock); | ||
82 | return status ? : size; | ||
83 | } | ||
84 | |||
85 | static /* const */ DEVICE_ATTR(direction, 0644, | ||
86 | gpio_direction_show, gpio_direction_store); | ||
87 | |||
88 | static ssize_t gpio_value_show(struct device *dev, | ||
89 | struct device_attribute *attr, char *buf) | ||
90 | { | ||
91 | struct gpio_desc *desc = dev_get_drvdata(dev); | ||
92 | ssize_t status; | ||
93 | |||
94 | mutex_lock(&sysfs_lock); | ||
95 | |||
96 | if (!test_bit(FLAG_EXPORT, &desc->flags)) | ||
97 | status = -EIO; | ||
98 | else | ||
99 | status = sprintf(buf, "%d\n", gpiod_get_value_cansleep(desc)); | ||
100 | |||
101 | mutex_unlock(&sysfs_lock); | ||
102 | return status; | ||
103 | } | ||
104 | |||
105 | static ssize_t gpio_value_store(struct device *dev, | ||
106 | struct device_attribute *attr, const char *buf, size_t size) | ||
107 | { | ||
108 | struct gpio_desc *desc = dev_get_drvdata(dev); | ||
109 | ssize_t status; | ||
110 | |||
111 | mutex_lock(&sysfs_lock); | ||
112 | |||
113 | if (!test_bit(FLAG_EXPORT, &desc->flags)) | ||
114 | status = -EIO; | ||
115 | else if (!test_bit(FLAG_IS_OUT, &desc->flags)) | ||
116 | status = -EPERM; | ||
117 | else { | ||
118 | long value; | ||
119 | |||
120 | status = kstrtol(buf, 0, &value); | ||
121 | if (status == 0) { | ||
122 | gpiod_set_value_cansleep(desc, value); | ||
123 | status = size; | ||
124 | } | ||
125 | } | ||
126 | |||
127 | mutex_unlock(&sysfs_lock); | ||
128 | return status; | ||
129 | } | ||
130 | |||
131 | static const DEVICE_ATTR(value, 0644, | ||
132 | gpio_value_show, gpio_value_store); | ||
133 | |||
134 | static irqreturn_t gpio_sysfs_irq(int irq, void *priv) | ||
135 | { | ||
136 | struct kernfs_node *value_sd = priv; | ||
137 | |||
138 | sysfs_notify_dirent(value_sd); | ||
139 | return IRQ_HANDLED; | ||
140 | } | ||
141 | |||
142 | static int gpio_setup_irq(struct gpio_desc *desc, struct device *dev, | ||
143 | unsigned long gpio_flags) | ||
144 | { | ||
145 | struct kernfs_node *value_sd; | ||
146 | unsigned long irq_flags; | ||
147 | int ret, irq, id; | ||
148 | |||
149 | if ((desc->flags & GPIO_TRIGGER_MASK) == gpio_flags) | ||
150 | return 0; | ||
151 | |||
152 | irq = gpiod_to_irq(desc); | ||
153 | if (irq < 0) | ||
154 | return -EIO; | ||
155 | |||
156 | id = desc->flags >> ID_SHIFT; | ||
157 | value_sd = idr_find(&dirent_idr, id); | ||
158 | if (value_sd) | ||
159 | free_irq(irq, value_sd); | ||
160 | |||
161 | desc->flags &= ~GPIO_TRIGGER_MASK; | ||
162 | |||
163 | if (!gpio_flags) { | ||
164 | gpio_unlock_as_irq(desc->chip, gpio_chip_hwgpio(desc)); | ||
165 | ret = 0; | ||
166 | goto free_id; | ||
167 | } | ||
168 | |||
169 | irq_flags = IRQF_SHARED; | ||
170 | if (test_bit(FLAG_TRIG_FALL, &gpio_flags)) | ||
171 | irq_flags |= test_bit(FLAG_ACTIVE_LOW, &desc->flags) ? | ||
172 | IRQF_TRIGGER_RISING : IRQF_TRIGGER_FALLING; | ||
173 | if (test_bit(FLAG_TRIG_RISE, &gpio_flags)) | ||
174 | irq_flags |= test_bit(FLAG_ACTIVE_LOW, &desc->flags) ? | ||
175 | IRQF_TRIGGER_FALLING : IRQF_TRIGGER_RISING; | ||
176 | |||
177 | if (!value_sd) { | ||
178 | value_sd = sysfs_get_dirent(dev->kobj.sd, "value"); | ||
179 | if (!value_sd) { | ||
180 | ret = -ENODEV; | ||
181 | goto err_out; | ||
182 | } | ||
183 | |||
184 | ret = idr_alloc(&dirent_idr, value_sd, 1, 0, GFP_KERNEL); | ||
185 | if (ret < 0) | ||
186 | goto free_sd; | ||
187 | id = ret; | ||
188 | |||
189 | desc->flags &= GPIO_FLAGS_MASK; | ||
190 | desc->flags |= (unsigned long)id << ID_SHIFT; | ||
191 | |||
192 | if (desc->flags >> ID_SHIFT != id) { | ||
193 | ret = -ERANGE; | ||
194 | goto free_id; | ||
195 | } | ||
196 | } | ||
197 | |||
198 | ret = request_any_context_irq(irq, gpio_sysfs_irq, irq_flags, | ||
199 | "gpiolib", value_sd); | ||
200 | if (ret < 0) | ||
201 | goto free_id; | ||
202 | |||
203 | ret = gpio_lock_as_irq(desc->chip, gpio_chip_hwgpio(desc)); | ||
204 | if (ret < 0) { | ||
205 | gpiod_warn(desc, "failed to flag the GPIO for IRQ\n"); | ||
206 | goto free_id; | ||
207 | } | ||
208 | |||
209 | desc->flags |= gpio_flags; | ||
210 | return 0; | ||
211 | |||
212 | free_id: | ||
213 | idr_remove(&dirent_idr, id); | ||
214 | desc->flags &= GPIO_FLAGS_MASK; | ||
215 | free_sd: | ||
216 | if (value_sd) | ||
217 | sysfs_put(value_sd); | ||
218 | err_out: | ||
219 | return ret; | ||
220 | } | ||
221 | |||
222 | static const struct { | ||
223 | const char *name; | ||
224 | unsigned long flags; | ||
225 | } trigger_types[] = { | ||
226 | { "none", 0 }, | ||
227 | { "falling", BIT(FLAG_TRIG_FALL) }, | ||
228 | { "rising", BIT(FLAG_TRIG_RISE) }, | ||
229 | { "both", BIT(FLAG_TRIG_FALL) | BIT(FLAG_TRIG_RISE) }, | ||
230 | }; | ||
231 | |||
232 | static ssize_t gpio_edge_show(struct device *dev, | ||
233 | struct device_attribute *attr, char *buf) | ||
234 | { | ||
235 | const struct gpio_desc *desc = dev_get_drvdata(dev); | ||
236 | ssize_t status; | ||
237 | |||
238 | mutex_lock(&sysfs_lock); | ||
239 | |||
240 | if (!test_bit(FLAG_EXPORT, &desc->flags)) | ||
241 | status = -EIO; | ||
242 | else { | ||
243 | int i; | ||
244 | |||
245 | status = 0; | ||
246 | for (i = 0; i < ARRAY_SIZE(trigger_types); i++) | ||
247 | if ((desc->flags & GPIO_TRIGGER_MASK) | ||
248 | == trigger_types[i].flags) { | ||
249 | status = sprintf(buf, "%s\n", | ||
250 | trigger_types[i].name); | ||
251 | break; | ||
252 | } | ||
253 | } | ||
254 | |||
255 | mutex_unlock(&sysfs_lock); | ||
256 | return status; | ||
257 | } | ||
258 | |||
259 | static ssize_t gpio_edge_store(struct device *dev, | ||
260 | struct device_attribute *attr, const char *buf, size_t size) | ||
261 | { | ||
262 | struct gpio_desc *desc = dev_get_drvdata(dev); | ||
263 | ssize_t status; | ||
264 | int i; | ||
265 | |||
266 | for (i = 0; i < ARRAY_SIZE(trigger_types); i++) | ||
267 | if (sysfs_streq(trigger_types[i].name, buf)) | ||
268 | goto found; | ||
269 | return -EINVAL; | ||
270 | |||
271 | found: | ||
272 | mutex_lock(&sysfs_lock); | ||
273 | |||
274 | if (!test_bit(FLAG_EXPORT, &desc->flags)) | ||
275 | status = -EIO; | ||
276 | else { | ||
277 | status = gpio_setup_irq(desc, dev, trigger_types[i].flags); | ||
278 | if (!status) | ||
279 | status = size; | ||
280 | } | ||
281 | |||
282 | mutex_unlock(&sysfs_lock); | ||
283 | |||
284 | return status; | ||
285 | } | ||
286 | |||
287 | static DEVICE_ATTR(edge, 0644, gpio_edge_show, gpio_edge_store); | ||
288 | |||
289 | static int sysfs_set_active_low(struct gpio_desc *desc, struct device *dev, | ||
290 | int value) | ||
291 | { | ||
292 | int status = 0; | ||
293 | |||
294 | if (!!test_bit(FLAG_ACTIVE_LOW, &desc->flags) == !!value) | ||
295 | return 0; | ||
296 | |||
297 | if (value) | ||
298 | set_bit(FLAG_ACTIVE_LOW, &desc->flags); | ||
299 | else | ||
300 | clear_bit(FLAG_ACTIVE_LOW, &desc->flags); | ||
301 | |||
302 | /* reconfigure poll(2) support if enabled on one edge only */ | ||
303 | if (dev != NULL && (!!test_bit(FLAG_TRIG_RISE, &desc->flags) ^ | ||
304 | !!test_bit(FLAG_TRIG_FALL, &desc->flags))) { | ||
305 | unsigned long trigger_flags = desc->flags & GPIO_TRIGGER_MASK; | ||
306 | |||
307 | gpio_setup_irq(desc, dev, 0); | ||
308 | status = gpio_setup_irq(desc, dev, trigger_flags); | ||
309 | } | ||
310 | |||
311 | return status; | ||
312 | } | ||
313 | |||
314 | static ssize_t gpio_active_low_show(struct device *dev, | ||
315 | struct device_attribute *attr, char *buf) | ||
316 | { | ||
317 | const struct gpio_desc *desc = dev_get_drvdata(dev); | ||
318 | ssize_t status; | ||
319 | |||
320 | mutex_lock(&sysfs_lock); | ||
321 | |||
322 | if (!test_bit(FLAG_EXPORT, &desc->flags)) | ||
323 | status = -EIO; | ||
324 | else | ||
325 | status = sprintf(buf, "%d\n", | ||
326 | !!test_bit(FLAG_ACTIVE_LOW, &desc->flags)); | ||
327 | |||
328 | mutex_unlock(&sysfs_lock); | ||
329 | |||
330 | return status; | ||
331 | } | ||
332 | |||
333 | static ssize_t gpio_active_low_store(struct device *dev, | ||
334 | struct device_attribute *attr, const char *buf, size_t size) | ||
335 | { | ||
336 | struct gpio_desc *desc = dev_get_drvdata(dev); | ||
337 | ssize_t status; | ||
338 | |||
339 | mutex_lock(&sysfs_lock); | ||
340 | |||
341 | if (!test_bit(FLAG_EXPORT, &desc->flags)) { | ||
342 | status = -EIO; | ||
343 | } else { | ||
344 | long value; | ||
345 | |||
346 | status = kstrtol(buf, 0, &value); | ||
347 | if (status == 0) | ||
348 | status = sysfs_set_active_low(desc, dev, value != 0); | ||
349 | } | ||
350 | |||
351 | mutex_unlock(&sysfs_lock); | ||
352 | |||
353 | return status ? : size; | ||
354 | } | ||
355 | |||
356 | static const DEVICE_ATTR(active_low, 0644, | ||
357 | gpio_active_low_show, gpio_active_low_store); | ||
358 | |||
359 | static const struct attribute *gpio_attrs[] = { | ||
360 | &dev_attr_value.attr, | ||
361 | &dev_attr_active_low.attr, | ||
362 | NULL, | ||
363 | }; | ||
364 | |||
365 | static const struct attribute_group gpio_attr_group = { | ||
366 | .attrs = (struct attribute **) gpio_attrs, | ||
367 | }; | ||
368 | |||
369 | /* | ||
370 | * /sys/class/gpio/gpiochipN/ | ||
371 | * /base ... matching gpio_chip.base (N) | ||
372 | * /label ... matching gpio_chip.label | ||
373 | * /ngpio ... matching gpio_chip.ngpio | ||
374 | */ | ||
375 | |||
376 | static ssize_t chip_base_show(struct device *dev, | ||
377 | struct device_attribute *attr, char *buf) | ||
378 | { | ||
379 | const struct gpio_chip *chip = dev_get_drvdata(dev); | ||
380 | |||
381 | return sprintf(buf, "%d\n", chip->base); | ||
382 | } | ||
383 | static DEVICE_ATTR(base, 0444, chip_base_show, NULL); | ||
384 | |||
385 | static ssize_t chip_label_show(struct device *dev, | ||
386 | struct device_attribute *attr, char *buf) | ||
387 | { | ||
388 | const struct gpio_chip *chip = dev_get_drvdata(dev); | ||
389 | |||
390 | return sprintf(buf, "%s\n", chip->label ? : ""); | ||
391 | } | ||
392 | static DEVICE_ATTR(label, 0444, chip_label_show, NULL); | ||
393 | |||
394 | static ssize_t chip_ngpio_show(struct device *dev, | ||
395 | struct device_attribute *attr, char *buf) | ||
396 | { | ||
397 | const struct gpio_chip *chip = dev_get_drvdata(dev); | ||
398 | |||
399 | return sprintf(buf, "%u\n", chip->ngpio); | ||
400 | } | ||
401 | static DEVICE_ATTR(ngpio, 0444, chip_ngpio_show, NULL); | ||
402 | |||
403 | static const struct attribute *gpiochip_attrs[] = { | ||
404 | &dev_attr_base.attr, | ||
405 | &dev_attr_label.attr, | ||
406 | &dev_attr_ngpio.attr, | ||
407 | NULL, | ||
408 | }; | ||
409 | |||
410 | static const struct attribute_group gpiochip_attr_group = { | ||
411 | .attrs = (struct attribute **) gpiochip_attrs, | ||
412 | }; | ||
413 | |||
414 | /* | ||
415 | * /sys/class/gpio/export ... write-only | ||
416 | * integer N ... number of GPIO to export (full access) | ||
417 | * /sys/class/gpio/unexport ... write-only | ||
418 | * integer N ... number of GPIO to unexport | ||
419 | */ | ||
420 | static ssize_t export_store(struct class *class, | ||
421 | struct class_attribute *attr, | ||
422 | const char *buf, size_t len) | ||
423 | { | ||
424 | long gpio; | ||
425 | struct gpio_desc *desc; | ||
426 | int status; | ||
427 | |||
428 | status = kstrtol(buf, 0, &gpio); | ||
429 | if (status < 0) | ||
430 | goto done; | ||
431 | |||
432 | desc = gpio_to_desc(gpio); | ||
433 | /* reject invalid GPIOs */ | ||
434 | if (!desc) { | ||
435 | pr_warn("%s: invalid GPIO %ld\n", __func__, gpio); | ||
436 | return -EINVAL; | ||
437 | } | ||
438 | |||
439 | /* No extra locking here; FLAG_SYSFS just signifies that the | ||
440 | * request and export were done by on behalf of userspace, so | ||
441 | * they may be undone on its behalf too. | ||
442 | */ | ||
443 | |||
444 | status = gpiod_request(desc, "sysfs"); | ||
445 | if (status < 0) { | ||
446 | if (status == -EPROBE_DEFER) | ||
447 | status = -ENODEV; | ||
448 | goto done; | ||
449 | } | ||
450 | status = gpiod_export(desc, true); | ||
451 | if (status < 0) | ||
452 | gpiod_free(desc); | ||
453 | else | ||
454 | set_bit(FLAG_SYSFS, &desc->flags); | ||
455 | |||
456 | done: | ||
457 | if (status) | ||
458 | pr_debug("%s: status %d\n", __func__, status); | ||
459 | return status ? : len; | ||
460 | } | ||
461 | |||
462 | static ssize_t unexport_store(struct class *class, | ||
463 | struct class_attribute *attr, | ||
464 | const char *buf, size_t len) | ||
465 | { | ||
466 | long gpio; | ||
467 | struct gpio_desc *desc; | ||
468 | int status; | ||
469 | |||
470 | status = kstrtol(buf, 0, &gpio); | ||
471 | if (status < 0) | ||
472 | goto done; | ||
473 | |||
474 | desc = gpio_to_desc(gpio); | ||
475 | /* reject bogus commands (gpio_unexport ignores them) */ | ||
476 | if (!desc) { | ||
477 | pr_warn("%s: invalid GPIO %ld\n", __func__, gpio); | ||
478 | return -EINVAL; | ||
479 | } | ||
480 | |||
481 | status = -EINVAL; | ||
482 | |||
483 | /* No extra locking here; FLAG_SYSFS just signifies that the | ||
484 | * request and export were done by on behalf of userspace, so | ||
485 | * they may be undone on its behalf too. | ||
486 | */ | ||
487 | if (test_and_clear_bit(FLAG_SYSFS, &desc->flags)) { | ||
488 | status = 0; | ||
489 | gpiod_free(desc); | ||
490 | } | ||
491 | done: | ||
492 | if (status) | ||
493 | pr_debug("%s: status %d\n", __func__, status); | ||
494 | return status ? : len; | ||
495 | } | ||
496 | |||
497 | static struct class_attribute gpio_class_attrs[] = { | ||
498 | __ATTR(export, 0200, NULL, export_store), | ||
499 | __ATTR(unexport, 0200, NULL, unexport_store), | ||
500 | __ATTR_NULL, | ||
501 | }; | ||
502 | |||
503 | static struct class gpio_class = { | ||
504 | .name = "gpio", | ||
505 | .owner = THIS_MODULE, | ||
506 | |||
507 | .class_attrs = gpio_class_attrs, | ||
508 | }; | ||
509 | |||
510 | |||
511 | /** | ||
512 | * gpiod_export - export a GPIO through sysfs | ||
513 | * @gpio: gpio to make available, already requested | ||
514 | * @direction_may_change: true if userspace may change gpio direction | ||
515 | * Context: arch_initcall or later | ||
516 | * | ||
517 | * When drivers want to make a GPIO accessible to userspace after they | ||
518 | * have requested it -- perhaps while debugging, or as part of their | ||
519 | * public interface -- they may use this routine. If the GPIO can | ||
520 | * change direction (some can't) and the caller allows it, userspace | ||
521 | * will see "direction" sysfs attribute which may be used to change | ||
522 | * the gpio's direction. A "value" attribute will always be provided. | ||
523 | * | ||
524 | * Returns zero on success, else an error. | ||
525 | */ | ||
526 | int gpiod_export(struct gpio_desc *desc, bool direction_may_change) | ||
527 | { | ||
528 | unsigned long flags; | ||
529 | int status; | ||
530 | const char *ioname = NULL; | ||
531 | struct device *dev; | ||
532 | int offset; | ||
533 | |||
534 | /* can't export until sysfs is available ... */ | ||
535 | if (!gpio_class.p) { | ||
536 | pr_debug("%s: called too early!\n", __func__); | ||
537 | return -ENOENT; | ||
538 | } | ||
539 | |||
540 | if (!desc) { | ||
541 | pr_debug("%s: invalid gpio descriptor\n", __func__); | ||
542 | return -EINVAL; | ||
543 | } | ||
544 | |||
545 | mutex_lock(&sysfs_lock); | ||
546 | |||
547 | spin_lock_irqsave(&gpio_lock, flags); | ||
548 | if (!test_bit(FLAG_REQUESTED, &desc->flags) || | ||
549 | test_bit(FLAG_EXPORT, &desc->flags)) { | ||
550 | spin_unlock_irqrestore(&gpio_lock, flags); | ||
551 | gpiod_dbg(desc, "%s: unavailable (requested=%d, exported=%d)\n", | ||
552 | __func__, | ||
553 | test_bit(FLAG_REQUESTED, &desc->flags), | ||
554 | test_bit(FLAG_EXPORT, &desc->flags)); | ||
555 | status = -EPERM; | ||
556 | goto fail_unlock; | ||
557 | } | ||
558 | |||
559 | if (!desc->chip->direction_input || !desc->chip->direction_output) | ||
560 | direction_may_change = false; | ||
561 | spin_unlock_irqrestore(&gpio_lock, flags); | ||
562 | |||
563 | offset = gpio_chip_hwgpio(desc); | ||
564 | if (desc->chip->names && desc->chip->names[offset]) | ||
565 | ioname = desc->chip->names[offset]; | ||
566 | |||
567 | dev = device_create(&gpio_class, desc->chip->dev, MKDEV(0, 0), | ||
568 | desc, ioname ? ioname : "gpio%u", | ||
569 | desc_to_gpio(desc)); | ||
570 | if (IS_ERR(dev)) { | ||
571 | status = PTR_ERR(dev); | ||
572 | goto fail_unlock; | ||
573 | } | ||
574 | |||
575 | status = sysfs_create_group(&dev->kobj, &gpio_attr_group); | ||
576 | if (status) | ||
577 | goto fail_unregister_device; | ||
578 | |||
579 | if (direction_may_change) { | ||
580 | status = device_create_file(dev, &dev_attr_direction); | ||
581 | if (status) | ||
582 | goto fail_unregister_device; | ||
583 | } | ||
584 | |||
585 | if (gpiod_to_irq(desc) >= 0 && (direction_may_change || | ||
586 | !test_bit(FLAG_IS_OUT, &desc->flags))) { | ||
587 | status = device_create_file(dev, &dev_attr_edge); | ||
588 | if (status) | ||
589 | goto fail_unregister_device; | ||
590 | } | ||
591 | |||
592 | set_bit(FLAG_EXPORT, &desc->flags); | ||
593 | mutex_unlock(&sysfs_lock); | ||
594 | return 0; | ||
595 | |||
596 | fail_unregister_device: | ||
597 | device_unregister(dev); | ||
598 | fail_unlock: | ||
599 | mutex_unlock(&sysfs_lock); | ||
600 | gpiod_dbg(desc, "%s: status %d\n", __func__, status); | ||
601 | return status; | ||
602 | } | ||
603 | EXPORT_SYMBOL_GPL(gpiod_export); | ||
604 | |||
605 | static int match_export(struct device *dev, const void *data) | ||
606 | { | ||
607 | return dev_get_drvdata(dev) == data; | ||
608 | } | ||
609 | |||
610 | /** | ||
611 | * gpiod_export_link - create a sysfs link to an exported GPIO node | ||
612 | * @dev: device under which to create symlink | ||
613 | * @name: name of the symlink | ||
614 | * @gpio: gpio to create symlink to, already exported | ||
615 | * | ||
616 | * Set up a symlink from /sys/.../dev/name to /sys/class/gpio/gpioN | ||
617 | * node. Caller is responsible for unlinking. | ||
618 | * | ||
619 | * Returns zero on success, else an error. | ||
620 | */ | ||
621 | int gpiod_export_link(struct device *dev, const char *name, | ||
622 | struct gpio_desc *desc) | ||
623 | { | ||
624 | int status = -EINVAL; | ||
625 | |||
626 | if (!desc) { | ||
627 | pr_warn("%s: invalid GPIO\n", __func__); | ||
628 | return -EINVAL; | ||
629 | } | ||
630 | |||
631 | mutex_lock(&sysfs_lock); | ||
632 | |||
633 | if (test_bit(FLAG_EXPORT, &desc->flags)) { | ||
634 | struct device *tdev; | ||
635 | |||
636 | tdev = class_find_device(&gpio_class, NULL, desc, match_export); | ||
637 | if (tdev != NULL) { | ||
638 | status = sysfs_create_link(&dev->kobj, &tdev->kobj, | ||
639 | name); | ||
640 | } else { | ||
641 | status = -ENODEV; | ||
642 | } | ||
643 | } | ||
644 | |||
645 | mutex_unlock(&sysfs_lock); | ||
646 | |||
647 | if (status) | ||
648 | gpiod_dbg(desc, "%s: status %d\n", __func__, status); | ||
649 | |||
650 | return status; | ||
651 | } | ||
652 | EXPORT_SYMBOL_GPL(gpiod_export_link); | ||
653 | |||
654 | /** | ||
655 | * gpiod_sysfs_set_active_low - set the polarity of gpio sysfs value | ||
656 | * @gpio: gpio to change | ||
657 | * @value: non-zero to use active low, i.e. inverted values | ||
658 | * | ||
659 | * Set the polarity of /sys/class/gpio/gpioN/value sysfs attribute. | ||
660 | * The GPIO does not have to be exported yet. If poll(2) support has | ||
661 | * been enabled for either rising or falling edge, it will be | ||
662 | * reconfigured to follow the new polarity. | ||
663 | * | ||
664 | * Returns zero on success, else an error. | ||
665 | */ | ||
666 | int gpiod_sysfs_set_active_low(struct gpio_desc *desc, int value) | ||
667 | { | ||
668 | struct device *dev = NULL; | ||
669 | int status = -EINVAL; | ||
670 | |||
671 | if (!desc) { | ||
672 | pr_warn("%s: invalid GPIO\n", __func__); | ||
673 | return -EINVAL; | ||
674 | } | ||
675 | |||
676 | mutex_lock(&sysfs_lock); | ||
677 | |||
678 | if (test_bit(FLAG_EXPORT, &desc->flags)) { | ||
679 | dev = class_find_device(&gpio_class, NULL, desc, match_export); | ||
680 | if (dev == NULL) { | ||
681 | status = -ENODEV; | ||
682 | goto unlock; | ||
683 | } | ||
684 | } | ||
685 | |||
686 | status = sysfs_set_active_low(desc, dev, value); | ||
687 | |||
688 | unlock: | ||
689 | mutex_unlock(&sysfs_lock); | ||
690 | |||
691 | if (status) | ||
692 | gpiod_dbg(desc, "%s: status %d\n", __func__, status); | ||
693 | |||
694 | return status; | ||
695 | } | ||
696 | EXPORT_SYMBOL_GPL(gpiod_sysfs_set_active_low); | ||
697 | |||
698 | /** | ||
699 | * gpiod_unexport - reverse effect of gpio_export() | ||
700 | * @gpio: gpio to make unavailable | ||
701 | * | ||
702 | * This is implicit on gpio_free(). | ||
703 | */ | ||
704 | void gpiod_unexport(struct gpio_desc *desc) | ||
705 | { | ||
706 | int status = 0; | ||
707 | struct device *dev = NULL; | ||
708 | |||
709 | if (!desc) { | ||
710 | pr_warn("%s: invalid GPIO\n", __func__); | ||
711 | return; | ||
712 | } | ||
713 | |||
714 | mutex_lock(&sysfs_lock); | ||
715 | |||
716 | if (test_bit(FLAG_EXPORT, &desc->flags)) { | ||
717 | |||
718 | dev = class_find_device(&gpio_class, NULL, desc, match_export); | ||
719 | if (dev) { | ||
720 | gpio_setup_irq(desc, dev, 0); | ||
721 | clear_bit(FLAG_EXPORT, &desc->flags); | ||
722 | } else | ||
723 | status = -ENODEV; | ||
724 | } | ||
725 | |||
726 | mutex_unlock(&sysfs_lock); | ||
727 | |||
728 | if (dev) { | ||
729 | device_unregister(dev); | ||
730 | put_device(dev); | ||
731 | } | ||
732 | |||
733 | if (status) | ||
734 | gpiod_dbg(desc, "%s: status %d\n", __func__, status); | ||
735 | } | ||
736 | EXPORT_SYMBOL_GPL(gpiod_unexport); | ||
737 | |||
738 | int gpiochip_export(struct gpio_chip *chip) | ||
739 | { | ||
740 | int status; | ||
741 | struct device *dev; | ||
742 | |||
743 | /* Many systems register gpio chips for SOC support very early, | ||
744 | * before driver model support is available. In those cases we | ||
745 | * export this later, in gpiolib_sysfs_init() ... here we just | ||
746 | * verify that _some_ field of gpio_class got initialized. | ||
747 | */ | ||
748 | if (!gpio_class.p) | ||
749 | return 0; | ||
750 | |||
751 | /* use chip->base for the ID; it's already known to be unique */ | ||
752 | mutex_lock(&sysfs_lock); | ||
753 | dev = device_create(&gpio_class, chip->dev, MKDEV(0, 0), chip, | ||
754 | "gpiochip%d", chip->base); | ||
755 | if (!IS_ERR(dev)) { | ||
756 | status = sysfs_create_group(&dev->kobj, | ||
757 | &gpiochip_attr_group); | ||
758 | } else | ||
759 | status = PTR_ERR(dev); | ||
760 | chip->exported = (status == 0); | ||
761 | mutex_unlock(&sysfs_lock); | ||
762 | |||
763 | if (status) | ||
764 | chip_dbg(chip, "%s: status %d\n", __func__, status); | ||
765 | |||
766 | return status; | ||
767 | } | ||
768 | |||
769 | void gpiochip_unexport(struct gpio_chip *chip) | ||
770 | { | ||
771 | int status; | ||
772 | struct device *dev; | ||
773 | |||
774 | mutex_lock(&sysfs_lock); | ||
775 | dev = class_find_device(&gpio_class, NULL, chip, match_export); | ||
776 | if (dev) { | ||
777 | put_device(dev); | ||
778 | device_unregister(dev); | ||
779 | chip->exported = false; | ||
780 | status = 0; | ||
781 | } else | ||
782 | status = -ENODEV; | ||
783 | mutex_unlock(&sysfs_lock); | ||
784 | |||
785 | if (status) | ||
786 | chip_dbg(chip, "%s: status %d\n", __func__, status); | ||
787 | } | ||
788 | |||
789 | static int __init gpiolib_sysfs_init(void) | ||
790 | { | ||
791 | int status; | ||
792 | unsigned long flags; | ||
793 | struct gpio_chip *chip; | ||
794 | |||
795 | status = class_register(&gpio_class); | ||
796 | if (status < 0) | ||
797 | return status; | ||
798 | |||
799 | /* Scan and register the gpio_chips which registered very | ||
800 | * early (e.g. before the class_register above was called). | ||
801 | * | ||
802 | * We run before arch_initcall() so chip->dev nodes can have | ||
803 | * registered, and so arch_initcall() can always gpio_export(). | ||
804 | */ | ||
805 | spin_lock_irqsave(&gpio_lock, flags); | ||
806 | list_for_each_entry(chip, &gpio_chips, list) { | ||
807 | if (chip->exported) | ||
808 | continue; | ||
809 | |||
810 | /* | ||
811 | * TODO we yield gpio_lock here because gpiochip_export() | ||
812 | * acquires a mutex. This is unsafe and needs to be fixed. | ||
813 | * | ||
814 | * Also it would be nice to use gpiochip_find() here so we | ||
815 | * can keep gpio_chips local to gpiolib.c, but the yield of | ||
816 | * gpio_lock prevents us from doing this. | ||
817 | */ | ||
818 | spin_unlock_irqrestore(&gpio_lock, flags); | ||
819 | status = gpiochip_export(chip); | ||
820 | spin_lock_irqsave(&gpio_lock, flags); | ||
821 | } | ||
822 | spin_unlock_irqrestore(&gpio_lock, flags); | ||
823 | |||
824 | |||
825 | return status; | ||
826 | } | ||
827 | postcore_initcall(gpiolib_sysfs_init); | ||
diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c index 2ebc9071e354..15cc0bb65dda 100644 --- a/drivers/gpio/gpiolib.c +++ b/drivers/gpio/gpiolib.c | |||
@@ -14,6 +14,7 @@ | |||
14 | #include <linux/slab.h> | 14 | #include <linux/slab.h> |
15 | #include <linux/acpi.h> | 15 | #include <linux/acpi.h> |
16 | #include <linux/gpio/driver.h> | 16 | #include <linux/gpio/driver.h> |
17 | #include <linux/gpio/machine.h> | ||
17 | 18 | ||
18 | #include "gpiolib.h" | 19 | #include "gpiolib.h" |
19 | 20 | ||
@@ -44,111 +45,19 @@ | |||
44 | * While any GPIO is requested, its gpio_chip is not removable; | 45 | * While any GPIO is requested, its gpio_chip is not removable; |
45 | * each GPIO's "requested" flag serves as a lock and refcount. | 46 | * each GPIO's "requested" flag serves as a lock and refcount. |
46 | */ | 47 | */ |
47 | static DEFINE_SPINLOCK(gpio_lock); | 48 | DEFINE_SPINLOCK(gpio_lock); |
48 | 49 | ||
49 | struct gpio_desc { | ||
50 | struct gpio_chip *chip; | ||
51 | unsigned long flags; | ||
52 | /* flag symbols are bit numbers */ | ||
53 | #define FLAG_REQUESTED 0 | ||
54 | #define FLAG_IS_OUT 1 | ||
55 | #define FLAG_EXPORT 2 /* protected by sysfs_lock */ | ||
56 | #define FLAG_SYSFS 3 /* exported via /sys/class/gpio/control */ | ||
57 | #define FLAG_TRIG_FALL 4 /* trigger on falling edge */ | ||
58 | #define FLAG_TRIG_RISE 5 /* trigger on rising edge */ | ||
59 | #define FLAG_ACTIVE_LOW 6 /* value has active low */ | ||
60 | #define FLAG_OPEN_DRAIN 7 /* Gpio is open drain type */ | ||
61 | #define FLAG_OPEN_SOURCE 8 /* Gpio is open source type */ | ||
62 | #define FLAG_USED_AS_IRQ 9 /* GPIO is connected to an IRQ */ | ||
63 | |||
64 | #define ID_SHIFT 16 /* add new flags before this one */ | ||
65 | |||
66 | #define GPIO_FLAGS_MASK ((1 << ID_SHIFT) - 1) | ||
67 | #define GPIO_TRIGGER_MASK (BIT(FLAG_TRIG_FALL) | BIT(FLAG_TRIG_RISE)) | ||
68 | |||
69 | #ifdef CONFIG_DEBUG_FS | ||
70 | const char *label; | ||
71 | #endif | ||
72 | }; | ||
73 | static struct gpio_desc gpio_desc[ARCH_NR_GPIOS]; | 50 | static struct gpio_desc gpio_desc[ARCH_NR_GPIOS]; |
74 | 51 | ||
75 | #define GPIO_OFFSET_VALID(chip, offset) (offset >= 0 && offset < chip->ngpio) | 52 | #define GPIO_OFFSET_VALID(chip, offset) (offset >= 0 && offset < chip->ngpio) |
76 | 53 | ||
77 | static DEFINE_MUTEX(gpio_lookup_lock); | 54 | static DEFINE_MUTEX(gpio_lookup_lock); |
78 | static LIST_HEAD(gpio_lookup_list); | 55 | static LIST_HEAD(gpio_lookup_list); |
79 | static LIST_HEAD(gpio_chips); | 56 | LIST_HEAD(gpio_chips); |
80 | |||
81 | #ifdef CONFIG_GPIO_SYSFS | ||
82 | static DEFINE_IDR(dirent_idr); | ||
83 | #endif | ||
84 | |||
85 | static int gpiod_request(struct gpio_desc *desc, const char *label); | ||
86 | static void gpiod_free(struct gpio_desc *desc); | ||
87 | |||
88 | /* With descriptor prefix */ | ||
89 | |||
90 | #ifdef CONFIG_DEBUG_FS | ||
91 | #define gpiod_emerg(desc, fmt, ...) \ | ||
92 | pr_emerg("gpio-%d (%s): " fmt, desc_to_gpio(desc), desc->label ? : "?",\ | ||
93 | ##__VA_ARGS__) | ||
94 | #define gpiod_crit(desc, fmt, ...) \ | ||
95 | pr_crit("gpio-%d (%s): " fmt, desc_to_gpio(desc), desc->label ? : "?", \ | ||
96 | ##__VA_ARGS__) | ||
97 | #define gpiod_err(desc, fmt, ...) \ | ||
98 | pr_err("gpio-%d (%s): " fmt, desc_to_gpio(desc), desc->label ? : "?", \ | ||
99 | ##__VA_ARGS__) | ||
100 | #define gpiod_warn(desc, fmt, ...) \ | ||
101 | pr_warn("gpio-%d (%s): " fmt, desc_to_gpio(desc), desc->label ? : "?", \ | ||
102 | ##__VA_ARGS__) | ||
103 | #define gpiod_info(desc, fmt, ...) \ | ||
104 | pr_info("gpio-%d (%s): " fmt, desc_to_gpio(desc), desc->label ? : "?", \ | ||
105 | ##__VA_ARGS__) | ||
106 | #define gpiod_dbg(desc, fmt, ...) \ | ||
107 | pr_debug("gpio-%d (%s): " fmt, desc_to_gpio(desc), desc->label ? : "?",\ | ||
108 | ##__VA_ARGS__) | ||
109 | #else | ||
110 | #define gpiod_emerg(desc, fmt, ...) \ | ||
111 | pr_emerg("gpio-%d: " fmt, desc_to_gpio(desc), ##__VA_ARGS__) | ||
112 | #define gpiod_crit(desc, fmt, ...) \ | ||
113 | pr_crit("gpio-%d: " fmt, desc_to_gpio(desc), ##__VA_ARGS__) | ||
114 | #define gpiod_err(desc, fmt, ...) \ | ||
115 | pr_err("gpio-%d: " fmt, desc_to_gpio(desc), ##__VA_ARGS__) | ||
116 | #define gpiod_warn(desc, fmt, ...) \ | ||
117 | pr_warn("gpio-%d: " fmt, desc_to_gpio(desc), ##__VA_ARGS__) | ||
118 | #define gpiod_info(desc, fmt, ...) \ | ||
119 | pr_info("gpio-%d: " fmt, desc_to_gpio(desc), ##__VA_ARGS__) | ||
120 | #define gpiod_dbg(desc, fmt, ...) \ | ||
121 | pr_debug("gpio-%d: " fmt, desc_to_gpio(desc), ##__VA_ARGS__) | ||
122 | #endif | ||
123 | |||
124 | /* With chip prefix */ | ||
125 | |||
126 | #define chip_emerg(chip, fmt, ...) \ | ||
127 | pr_emerg("GPIO chip %s: " fmt, chip->label, ##__VA_ARGS__) | ||
128 | #define chip_crit(chip, fmt, ...) \ | ||
129 | pr_crit("GPIO chip %s: " fmt, chip->label, ##__VA_ARGS__) | ||
130 | #define chip_err(chip, fmt, ...) \ | ||
131 | pr_err("GPIO chip %s: " fmt, chip->label, ##__VA_ARGS__) | ||
132 | #define chip_warn(chip, fmt, ...) \ | ||
133 | pr_warn("GPIO chip %s: " fmt, chip->label, ##__VA_ARGS__) | ||
134 | #define chip_info(chip, fmt, ...) \ | ||
135 | pr_info("GPIO chip %s: " fmt, chip->label, ##__VA_ARGS__) | ||
136 | #define chip_dbg(chip, fmt, ...) \ | ||
137 | pr_debug("GPIO chip %s: " fmt, chip->label, ##__VA_ARGS__) | ||
138 | 57 | ||
139 | static inline void desc_set_label(struct gpio_desc *d, const char *label) | 58 | static inline void desc_set_label(struct gpio_desc *d, const char *label) |
140 | { | 59 | { |
141 | #ifdef CONFIG_DEBUG_FS | ||
142 | d->label = label; | 60 | d->label = label; |
143 | #endif | ||
144 | } | ||
145 | |||
146 | /* | ||
147 | * Return the GPIO number of the passed descriptor relative to its chip | ||
148 | */ | ||
149 | static int gpio_chip_hwgpio(const struct gpio_desc *desc) | ||
150 | { | ||
151 | return desc - &desc->chip->desc[0]; | ||
152 | } | 61 | } |
153 | 62 | ||
154 | /** | 63 | /** |
@@ -174,7 +83,6 @@ struct gpio_desc *gpiochip_get_desc(struct gpio_chip *chip, | |||
174 | 83 | ||
175 | return &chip->desc[hwnum]; | 84 | return &chip->desc[hwnum]; |
176 | } | 85 | } |
177 | EXPORT_SYMBOL_GPL(gpiochip_get_desc); | ||
178 | 86 | ||
179 | /** | 87 | /** |
180 | * Convert a GPIO descriptor to the integer namespace. | 88 | * Convert a GPIO descriptor to the integer namespace. |
@@ -188,39 +96,6 @@ int desc_to_gpio(const struct gpio_desc *desc) | |||
188 | EXPORT_SYMBOL_GPL(desc_to_gpio); | 96 | EXPORT_SYMBOL_GPL(desc_to_gpio); |
189 | 97 | ||
190 | 98 | ||
191 | /* Warn when drivers omit gpio_request() calls -- legal but ill-advised | ||
192 | * when setting direction, and otherwise illegal. Until board setup code | ||
193 | * and drivers use explicit requests everywhere (which won't happen when | ||
194 | * those calls have no teeth) we can't avoid autorequesting. This nag | ||
195 | * message should motivate switching to explicit requests... so should | ||
196 | * the weaker cleanup after faults, compared to gpio_request(). | ||
197 | * | ||
198 | * NOTE: the autorequest mechanism is going away; at this point it's | ||
199 | * only "legal" in the sense that (old) code using it won't break yet, | ||
200 | * but instead only triggers a WARN() stack dump. | ||
201 | */ | ||
202 | static int gpio_ensure_requested(struct gpio_desc *desc) | ||
203 | { | ||
204 | const struct gpio_chip *chip = desc->chip; | ||
205 | const int gpio = desc_to_gpio(desc); | ||
206 | |||
207 | if (WARN(test_and_set_bit(FLAG_REQUESTED, &desc->flags) == 0, | ||
208 | "autorequest GPIO-%d\n", gpio)) { | ||
209 | if (!try_module_get(chip->owner)) { | ||
210 | gpiod_err(desc, "%s: module can't be gotten\n", | ||
211 | __func__); | ||
212 | clear_bit(FLAG_REQUESTED, &desc->flags); | ||
213 | /* lose */ | ||
214 | return -EIO; | ||
215 | } | ||
216 | desc_set_label(desc, "[auto]"); | ||
217 | /* caller must chip->request() w/o spinlock */ | ||
218 | if (chip->request) | ||
219 | return 1; | ||
220 | } | ||
221 | return 0; | ||
222 | } | ||
223 | |||
224 | /** | 99 | /** |
225 | * gpiod_to_chip - Return the GPIO chip to which a GPIO descriptor belongs | 100 | * gpiod_to_chip - Return the GPIO chip to which a GPIO descriptor belongs |
226 | * @desc: descriptor to return the chip of | 101 | * @desc: descriptor to return the chip of |
@@ -291,836 +166,6 @@ int gpiod_get_direction(const struct gpio_desc *desc) | |||
291 | } | 166 | } |
292 | EXPORT_SYMBOL_GPL(gpiod_get_direction); | 167 | EXPORT_SYMBOL_GPL(gpiod_get_direction); |
293 | 168 | ||
294 | #ifdef CONFIG_GPIO_SYSFS | ||
295 | |||
296 | /* lock protects against unexport_gpio() being called while | ||
297 | * sysfs files are active. | ||
298 | */ | ||
299 | static DEFINE_MUTEX(sysfs_lock); | ||
300 | |||
301 | /* | ||
302 | * /sys/class/gpio/gpioN... only for GPIOs that are exported | ||
303 | * /direction | ||
304 | * * MAY BE OMITTED if kernel won't allow direction changes | ||
305 | * * is read/write as "in" or "out" | ||
306 | * * may also be written as "high" or "low", initializing | ||
307 | * output value as specified ("out" implies "low") | ||
308 | * /value | ||
309 | * * always readable, subject to hardware behavior | ||
310 | * * may be writable, as zero/nonzero | ||
311 | * /edge | ||
312 | * * configures behavior of poll(2) on /value | ||
313 | * * available only if pin can generate IRQs on input | ||
314 | * * is read/write as "none", "falling", "rising", or "both" | ||
315 | * /active_low | ||
316 | * * configures polarity of /value | ||
317 | * * is read/write as zero/nonzero | ||
318 | * * also affects existing and subsequent "falling" and "rising" | ||
319 | * /edge configuration | ||
320 | */ | ||
321 | |||
322 | static ssize_t gpio_direction_show(struct device *dev, | ||
323 | struct device_attribute *attr, char *buf) | ||
324 | { | ||
325 | const struct gpio_desc *desc = dev_get_drvdata(dev); | ||
326 | ssize_t status; | ||
327 | |||
328 | mutex_lock(&sysfs_lock); | ||
329 | |||
330 | if (!test_bit(FLAG_EXPORT, &desc->flags)) { | ||
331 | status = -EIO; | ||
332 | } else { | ||
333 | gpiod_get_direction(desc); | ||
334 | status = sprintf(buf, "%s\n", | ||
335 | test_bit(FLAG_IS_OUT, &desc->flags) | ||
336 | ? "out" : "in"); | ||
337 | } | ||
338 | |||
339 | mutex_unlock(&sysfs_lock); | ||
340 | return status; | ||
341 | } | ||
342 | |||
343 | static ssize_t gpio_direction_store(struct device *dev, | ||
344 | struct device_attribute *attr, const char *buf, size_t size) | ||
345 | { | ||
346 | struct gpio_desc *desc = dev_get_drvdata(dev); | ||
347 | ssize_t status; | ||
348 | |||
349 | mutex_lock(&sysfs_lock); | ||
350 | |||
351 | if (!test_bit(FLAG_EXPORT, &desc->flags)) | ||
352 | status = -EIO; | ||
353 | else if (sysfs_streq(buf, "high")) | ||
354 | status = gpiod_direction_output_raw(desc, 1); | ||
355 | else if (sysfs_streq(buf, "out") || sysfs_streq(buf, "low")) | ||
356 | status = gpiod_direction_output_raw(desc, 0); | ||
357 | else if (sysfs_streq(buf, "in")) | ||
358 | status = gpiod_direction_input(desc); | ||
359 | else | ||
360 | status = -EINVAL; | ||
361 | |||
362 | mutex_unlock(&sysfs_lock); | ||
363 | return status ? : size; | ||
364 | } | ||
365 | |||
366 | static /* const */ DEVICE_ATTR(direction, 0644, | ||
367 | gpio_direction_show, gpio_direction_store); | ||
368 | |||
369 | static ssize_t gpio_value_show(struct device *dev, | ||
370 | struct device_attribute *attr, char *buf) | ||
371 | { | ||
372 | struct gpio_desc *desc = dev_get_drvdata(dev); | ||
373 | ssize_t status; | ||
374 | |||
375 | mutex_lock(&sysfs_lock); | ||
376 | |||
377 | if (!test_bit(FLAG_EXPORT, &desc->flags)) | ||
378 | status = -EIO; | ||
379 | else | ||
380 | status = sprintf(buf, "%d\n", gpiod_get_value_cansleep(desc)); | ||
381 | |||
382 | mutex_unlock(&sysfs_lock); | ||
383 | return status; | ||
384 | } | ||
385 | |||
386 | static ssize_t gpio_value_store(struct device *dev, | ||
387 | struct device_attribute *attr, const char *buf, size_t size) | ||
388 | { | ||
389 | struct gpio_desc *desc = dev_get_drvdata(dev); | ||
390 | ssize_t status; | ||
391 | |||
392 | mutex_lock(&sysfs_lock); | ||
393 | |||
394 | if (!test_bit(FLAG_EXPORT, &desc->flags)) | ||
395 | status = -EIO; | ||
396 | else if (!test_bit(FLAG_IS_OUT, &desc->flags)) | ||
397 | status = -EPERM; | ||
398 | else { | ||
399 | long value; | ||
400 | |||
401 | status = kstrtol(buf, 0, &value); | ||
402 | if (status == 0) { | ||
403 | gpiod_set_value_cansleep(desc, value); | ||
404 | status = size; | ||
405 | } | ||
406 | } | ||
407 | |||
408 | mutex_unlock(&sysfs_lock); | ||
409 | return status; | ||
410 | } | ||
411 | |||
412 | static const DEVICE_ATTR(value, 0644, | ||
413 | gpio_value_show, gpio_value_store); | ||
414 | |||
415 | static irqreturn_t gpio_sysfs_irq(int irq, void *priv) | ||
416 | { | ||
417 | struct kernfs_node *value_sd = priv; | ||
418 | |||
419 | sysfs_notify_dirent(value_sd); | ||
420 | return IRQ_HANDLED; | ||
421 | } | ||
422 | |||
423 | static int gpio_setup_irq(struct gpio_desc *desc, struct device *dev, | ||
424 | unsigned long gpio_flags) | ||
425 | { | ||
426 | struct kernfs_node *value_sd; | ||
427 | unsigned long irq_flags; | ||
428 | int ret, irq, id; | ||
429 | |||
430 | if ((desc->flags & GPIO_TRIGGER_MASK) == gpio_flags) | ||
431 | return 0; | ||
432 | |||
433 | irq = gpiod_to_irq(desc); | ||
434 | if (irq < 0) | ||
435 | return -EIO; | ||
436 | |||
437 | id = desc->flags >> ID_SHIFT; | ||
438 | value_sd = idr_find(&dirent_idr, id); | ||
439 | if (value_sd) | ||
440 | free_irq(irq, value_sd); | ||
441 | |||
442 | desc->flags &= ~GPIO_TRIGGER_MASK; | ||
443 | |||
444 | if (!gpio_flags) { | ||
445 | gpiod_unlock_as_irq(desc); | ||
446 | ret = 0; | ||
447 | goto free_id; | ||
448 | } | ||
449 | |||
450 | irq_flags = IRQF_SHARED; | ||
451 | if (test_bit(FLAG_TRIG_FALL, &gpio_flags)) | ||
452 | irq_flags |= test_bit(FLAG_ACTIVE_LOW, &desc->flags) ? | ||
453 | IRQF_TRIGGER_RISING : IRQF_TRIGGER_FALLING; | ||
454 | if (test_bit(FLAG_TRIG_RISE, &gpio_flags)) | ||
455 | irq_flags |= test_bit(FLAG_ACTIVE_LOW, &desc->flags) ? | ||
456 | IRQF_TRIGGER_FALLING : IRQF_TRIGGER_RISING; | ||
457 | |||
458 | if (!value_sd) { | ||
459 | value_sd = sysfs_get_dirent(dev->kobj.sd, "value"); | ||
460 | if (!value_sd) { | ||
461 | ret = -ENODEV; | ||
462 | goto err_out; | ||
463 | } | ||
464 | |||
465 | ret = idr_alloc(&dirent_idr, value_sd, 1, 0, GFP_KERNEL); | ||
466 | if (ret < 0) | ||
467 | goto free_sd; | ||
468 | id = ret; | ||
469 | |||
470 | desc->flags &= GPIO_FLAGS_MASK; | ||
471 | desc->flags |= (unsigned long)id << ID_SHIFT; | ||
472 | |||
473 | if (desc->flags >> ID_SHIFT != id) { | ||
474 | ret = -ERANGE; | ||
475 | goto free_id; | ||
476 | } | ||
477 | } | ||
478 | |||
479 | ret = request_any_context_irq(irq, gpio_sysfs_irq, irq_flags, | ||
480 | "gpiolib", value_sd); | ||
481 | if (ret < 0) | ||
482 | goto free_id; | ||
483 | |||
484 | ret = gpiod_lock_as_irq(desc); | ||
485 | if (ret < 0) { | ||
486 | gpiod_warn(desc, "failed to flag the GPIO for IRQ\n"); | ||
487 | goto free_id; | ||
488 | } | ||
489 | |||
490 | desc->flags |= gpio_flags; | ||
491 | return 0; | ||
492 | |||
493 | free_id: | ||
494 | idr_remove(&dirent_idr, id); | ||
495 | desc->flags &= GPIO_FLAGS_MASK; | ||
496 | free_sd: | ||
497 | if (value_sd) | ||
498 | sysfs_put(value_sd); | ||
499 | err_out: | ||
500 | return ret; | ||
501 | } | ||
502 | |||
503 | static const struct { | ||
504 | const char *name; | ||
505 | unsigned long flags; | ||
506 | } trigger_types[] = { | ||
507 | { "none", 0 }, | ||
508 | { "falling", BIT(FLAG_TRIG_FALL) }, | ||
509 | { "rising", BIT(FLAG_TRIG_RISE) }, | ||
510 | { "both", BIT(FLAG_TRIG_FALL) | BIT(FLAG_TRIG_RISE) }, | ||
511 | }; | ||
512 | |||
513 | static ssize_t gpio_edge_show(struct device *dev, | ||
514 | struct device_attribute *attr, char *buf) | ||
515 | { | ||
516 | const struct gpio_desc *desc = dev_get_drvdata(dev); | ||
517 | ssize_t status; | ||
518 | |||
519 | mutex_lock(&sysfs_lock); | ||
520 | |||
521 | if (!test_bit(FLAG_EXPORT, &desc->flags)) | ||
522 | status = -EIO; | ||
523 | else { | ||
524 | int i; | ||
525 | |||
526 | status = 0; | ||
527 | for (i = 0; i < ARRAY_SIZE(trigger_types); i++) | ||
528 | if ((desc->flags & GPIO_TRIGGER_MASK) | ||
529 | == trigger_types[i].flags) { | ||
530 | status = sprintf(buf, "%s\n", | ||
531 | trigger_types[i].name); | ||
532 | break; | ||
533 | } | ||
534 | } | ||
535 | |||
536 | mutex_unlock(&sysfs_lock); | ||
537 | return status; | ||
538 | } | ||
539 | |||
540 | static ssize_t gpio_edge_store(struct device *dev, | ||
541 | struct device_attribute *attr, const char *buf, size_t size) | ||
542 | { | ||
543 | struct gpio_desc *desc = dev_get_drvdata(dev); | ||
544 | ssize_t status; | ||
545 | int i; | ||
546 | |||
547 | for (i = 0; i < ARRAY_SIZE(trigger_types); i++) | ||
548 | if (sysfs_streq(trigger_types[i].name, buf)) | ||
549 | goto found; | ||
550 | return -EINVAL; | ||
551 | |||
552 | found: | ||
553 | mutex_lock(&sysfs_lock); | ||
554 | |||
555 | if (!test_bit(FLAG_EXPORT, &desc->flags)) | ||
556 | status = -EIO; | ||
557 | else { | ||
558 | status = gpio_setup_irq(desc, dev, trigger_types[i].flags); | ||
559 | if (!status) | ||
560 | status = size; | ||
561 | } | ||
562 | |||
563 | mutex_unlock(&sysfs_lock); | ||
564 | |||
565 | return status; | ||
566 | } | ||
567 | |||
568 | static DEVICE_ATTR(edge, 0644, gpio_edge_show, gpio_edge_store); | ||
569 | |||
570 | static int sysfs_set_active_low(struct gpio_desc *desc, struct device *dev, | ||
571 | int value) | ||
572 | { | ||
573 | int status = 0; | ||
574 | |||
575 | if (!!test_bit(FLAG_ACTIVE_LOW, &desc->flags) == !!value) | ||
576 | return 0; | ||
577 | |||
578 | if (value) | ||
579 | set_bit(FLAG_ACTIVE_LOW, &desc->flags); | ||
580 | else | ||
581 | clear_bit(FLAG_ACTIVE_LOW, &desc->flags); | ||
582 | |||
583 | /* reconfigure poll(2) support if enabled on one edge only */ | ||
584 | if (dev != NULL && (!!test_bit(FLAG_TRIG_RISE, &desc->flags) ^ | ||
585 | !!test_bit(FLAG_TRIG_FALL, &desc->flags))) { | ||
586 | unsigned long trigger_flags = desc->flags & GPIO_TRIGGER_MASK; | ||
587 | |||
588 | gpio_setup_irq(desc, dev, 0); | ||
589 | status = gpio_setup_irq(desc, dev, trigger_flags); | ||
590 | } | ||
591 | |||
592 | return status; | ||
593 | } | ||
594 | |||
595 | static ssize_t gpio_active_low_show(struct device *dev, | ||
596 | struct device_attribute *attr, char *buf) | ||
597 | { | ||
598 | const struct gpio_desc *desc = dev_get_drvdata(dev); | ||
599 | ssize_t status; | ||
600 | |||
601 | mutex_lock(&sysfs_lock); | ||
602 | |||
603 | if (!test_bit(FLAG_EXPORT, &desc->flags)) | ||
604 | status = -EIO; | ||
605 | else | ||
606 | status = sprintf(buf, "%d\n", | ||
607 | !!test_bit(FLAG_ACTIVE_LOW, &desc->flags)); | ||
608 | |||
609 | mutex_unlock(&sysfs_lock); | ||
610 | |||
611 | return status; | ||
612 | } | ||
613 | |||
614 | static ssize_t gpio_active_low_store(struct device *dev, | ||
615 | struct device_attribute *attr, const char *buf, size_t size) | ||
616 | { | ||
617 | struct gpio_desc *desc = dev_get_drvdata(dev); | ||
618 | ssize_t status; | ||
619 | |||
620 | mutex_lock(&sysfs_lock); | ||
621 | |||
622 | if (!test_bit(FLAG_EXPORT, &desc->flags)) { | ||
623 | status = -EIO; | ||
624 | } else { | ||
625 | long value; | ||
626 | |||
627 | status = kstrtol(buf, 0, &value); | ||
628 | if (status == 0) | ||
629 | status = sysfs_set_active_low(desc, dev, value != 0); | ||
630 | } | ||
631 | |||
632 | mutex_unlock(&sysfs_lock); | ||
633 | |||
634 | return status ? : size; | ||
635 | } | ||
636 | |||
637 | static const DEVICE_ATTR(active_low, 0644, | ||
638 | gpio_active_low_show, gpio_active_low_store); | ||
639 | |||
640 | static const struct attribute *gpio_attrs[] = { | ||
641 | &dev_attr_value.attr, | ||
642 | &dev_attr_active_low.attr, | ||
643 | NULL, | ||
644 | }; | ||
645 | |||
646 | static const struct attribute_group gpio_attr_group = { | ||
647 | .attrs = (struct attribute **) gpio_attrs, | ||
648 | }; | ||
649 | |||
650 | /* | ||
651 | * /sys/class/gpio/gpiochipN/ | ||
652 | * /base ... matching gpio_chip.base (N) | ||
653 | * /label ... matching gpio_chip.label | ||
654 | * /ngpio ... matching gpio_chip.ngpio | ||
655 | */ | ||
656 | |||
657 | static ssize_t chip_base_show(struct device *dev, | ||
658 | struct device_attribute *attr, char *buf) | ||
659 | { | ||
660 | const struct gpio_chip *chip = dev_get_drvdata(dev); | ||
661 | |||
662 | return sprintf(buf, "%d\n", chip->base); | ||
663 | } | ||
664 | static DEVICE_ATTR(base, 0444, chip_base_show, NULL); | ||
665 | |||
666 | static ssize_t chip_label_show(struct device *dev, | ||
667 | struct device_attribute *attr, char *buf) | ||
668 | { | ||
669 | const struct gpio_chip *chip = dev_get_drvdata(dev); | ||
670 | |||
671 | return sprintf(buf, "%s\n", chip->label ? : ""); | ||
672 | } | ||
673 | static DEVICE_ATTR(label, 0444, chip_label_show, NULL); | ||
674 | |||
675 | static ssize_t chip_ngpio_show(struct device *dev, | ||
676 | struct device_attribute *attr, char *buf) | ||
677 | { | ||
678 | const struct gpio_chip *chip = dev_get_drvdata(dev); | ||
679 | |||
680 | return sprintf(buf, "%u\n", chip->ngpio); | ||
681 | } | ||
682 | static DEVICE_ATTR(ngpio, 0444, chip_ngpio_show, NULL); | ||
683 | |||
684 | static const struct attribute *gpiochip_attrs[] = { | ||
685 | &dev_attr_base.attr, | ||
686 | &dev_attr_label.attr, | ||
687 | &dev_attr_ngpio.attr, | ||
688 | NULL, | ||
689 | }; | ||
690 | |||
691 | static const struct attribute_group gpiochip_attr_group = { | ||
692 | .attrs = (struct attribute **) gpiochip_attrs, | ||
693 | }; | ||
694 | |||
695 | /* | ||
696 | * /sys/class/gpio/export ... write-only | ||
697 | * integer N ... number of GPIO to export (full access) | ||
698 | * /sys/class/gpio/unexport ... write-only | ||
699 | * integer N ... number of GPIO to unexport | ||
700 | */ | ||
701 | static ssize_t export_store(struct class *class, | ||
702 | struct class_attribute *attr, | ||
703 | const char *buf, size_t len) | ||
704 | { | ||
705 | long gpio; | ||
706 | struct gpio_desc *desc; | ||
707 | int status; | ||
708 | |||
709 | status = kstrtol(buf, 0, &gpio); | ||
710 | if (status < 0) | ||
711 | goto done; | ||
712 | |||
713 | desc = gpio_to_desc(gpio); | ||
714 | /* reject invalid GPIOs */ | ||
715 | if (!desc) { | ||
716 | pr_warn("%s: invalid GPIO %ld\n", __func__, gpio); | ||
717 | return -EINVAL; | ||
718 | } | ||
719 | |||
720 | /* No extra locking here; FLAG_SYSFS just signifies that the | ||
721 | * request and export were done by on behalf of userspace, so | ||
722 | * they may be undone on its behalf too. | ||
723 | */ | ||
724 | |||
725 | status = gpiod_request(desc, "sysfs"); | ||
726 | if (status < 0) { | ||
727 | if (status == -EPROBE_DEFER) | ||
728 | status = -ENODEV; | ||
729 | goto done; | ||
730 | } | ||
731 | status = gpiod_export(desc, true); | ||
732 | if (status < 0) | ||
733 | gpiod_free(desc); | ||
734 | else | ||
735 | set_bit(FLAG_SYSFS, &desc->flags); | ||
736 | |||
737 | done: | ||
738 | if (status) | ||
739 | pr_debug("%s: status %d\n", __func__, status); | ||
740 | return status ? : len; | ||
741 | } | ||
742 | |||
743 | static ssize_t unexport_store(struct class *class, | ||
744 | struct class_attribute *attr, | ||
745 | const char *buf, size_t len) | ||
746 | { | ||
747 | long gpio; | ||
748 | struct gpio_desc *desc; | ||
749 | int status; | ||
750 | |||
751 | status = kstrtol(buf, 0, &gpio); | ||
752 | if (status < 0) | ||
753 | goto done; | ||
754 | |||
755 | desc = gpio_to_desc(gpio); | ||
756 | /* reject bogus commands (gpio_unexport ignores them) */ | ||
757 | if (!desc) { | ||
758 | pr_warn("%s: invalid GPIO %ld\n", __func__, gpio); | ||
759 | return -EINVAL; | ||
760 | } | ||
761 | |||
762 | status = -EINVAL; | ||
763 | |||
764 | /* No extra locking here; FLAG_SYSFS just signifies that the | ||
765 | * request and export were done by on behalf of userspace, so | ||
766 | * they may be undone on its behalf too. | ||
767 | */ | ||
768 | if (test_and_clear_bit(FLAG_SYSFS, &desc->flags)) { | ||
769 | status = 0; | ||
770 | gpiod_free(desc); | ||
771 | } | ||
772 | done: | ||
773 | if (status) | ||
774 | pr_debug("%s: status %d\n", __func__, status); | ||
775 | return status ? : len; | ||
776 | } | ||
777 | |||
778 | static struct class_attribute gpio_class_attrs[] = { | ||
779 | __ATTR(export, 0200, NULL, export_store), | ||
780 | __ATTR(unexport, 0200, NULL, unexport_store), | ||
781 | __ATTR_NULL, | ||
782 | }; | ||
783 | |||
784 | static struct class gpio_class = { | ||
785 | .name = "gpio", | ||
786 | .owner = THIS_MODULE, | ||
787 | |||
788 | .class_attrs = gpio_class_attrs, | ||
789 | }; | ||
790 | |||
791 | |||
792 | /** | ||
793 | * gpiod_export - export a GPIO through sysfs | ||
794 | * @gpio: gpio to make available, already requested | ||
795 | * @direction_may_change: true if userspace may change gpio direction | ||
796 | * Context: arch_initcall or later | ||
797 | * | ||
798 | * When drivers want to make a GPIO accessible to userspace after they | ||
799 | * have requested it -- perhaps while debugging, or as part of their | ||
800 | * public interface -- they may use this routine. If the GPIO can | ||
801 | * change direction (some can't) and the caller allows it, userspace | ||
802 | * will see "direction" sysfs attribute which may be used to change | ||
803 | * the gpio's direction. A "value" attribute will always be provided. | ||
804 | * | ||
805 | * Returns zero on success, else an error. | ||
806 | */ | ||
807 | int gpiod_export(struct gpio_desc *desc, bool direction_may_change) | ||
808 | { | ||
809 | unsigned long flags; | ||
810 | int status; | ||
811 | const char *ioname = NULL; | ||
812 | struct device *dev; | ||
813 | int offset; | ||
814 | |||
815 | /* can't export until sysfs is available ... */ | ||
816 | if (!gpio_class.p) { | ||
817 | pr_debug("%s: called too early!\n", __func__); | ||
818 | return -ENOENT; | ||
819 | } | ||
820 | |||
821 | if (!desc) { | ||
822 | pr_debug("%s: invalid gpio descriptor\n", __func__); | ||
823 | return -EINVAL; | ||
824 | } | ||
825 | |||
826 | mutex_lock(&sysfs_lock); | ||
827 | |||
828 | spin_lock_irqsave(&gpio_lock, flags); | ||
829 | if (!test_bit(FLAG_REQUESTED, &desc->flags) || | ||
830 | test_bit(FLAG_EXPORT, &desc->flags)) { | ||
831 | spin_unlock_irqrestore(&gpio_lock, flags); | ||
832 | gpiod_dbg(desc, "%s: unavailable (requested=%d, exported=%d)\n", | ||
833 | __func__, | ||
834 | test_bit(FLAG_REQUESTED, &desc->flags), | ||
835 | test_bit(FLAG_EXPORT, &desc->flags)); | ||
836 | status = -EPERM; | ||
837 | goto fail_unlock; | ||
838 | } | ||
839 | |||
840 | if (!desc->chip->direction_input || !desc->chip->direction_output) | ||
841 | direction_may_change = false; | ||
842 | spin_unlock_irqrestore(&gpio_lock, flags); | ||
843 | |||
844 | offset = gpio_chip_hwgpio(desc); | ||
845 | if (desc->chip->names && desc->chip->names[offset]) | ||
846 | ioname = desc->chip->names[offset]; | ||
847 | |||
848 | dev = device_create(&gpio_class, desc->chip->dev, MKDEV(0, 0), | ||
849 | desc, ioname ? ioname : "gpio%u", | ||
850 | desc_to_gpio(desc)); | ||
851 | if (IS_ERR(dev)) { | ||
852 | status = PTR_ERR(dev); | ||
853 | goto fail_unlock; | ||
854 | } | ||
855 | |||
856 | status = sysfs_create_group(&dev->kobj, &gpio_attr_group); | ||
857 | if (status) | ||
858 | goto fail_unregister_device; | ||
859 | |||
860 | if (direction_may_change) { | ||
861 | status = device_create_file(dev, &dev_attr_direction); | ||
862 | if (status) | ||
863 | goto fail_unregister_device; | ||
864 | } | ||
865 | |||
866 | if (gpiod_to_irq(desc) >= 0 && (direction_may_change || | ||
867 | !test_bit(FLAG_IS_OUT, &desc->flags))) { | ||
868 | status = device_create_file(dev, &dev_attr_edge); | ||
869 | if (status) | ||
870 | goto fail_unregister_device; | ||
871 | } | ||
872 | |||
873 | set_bit(FLAG_EXPORT, &desc->flags); | ||
874 | mutex_unlock(&sysfs_lock); | ||
875 | return 0; | ||
876 | |||
877 | fail_unregister_device: | ||
878 | device_unregister(dev); | ||
879 | fail_unlock: | ||
880 | mutex_unlock(&sysfs_lock); | ||
881 | gpiod_dbg(desc, "%s: status %d\n", __func__, status); | ||
882 | return status; | ||
883 | } | ||
884 | EXPORT_SYMBOL_GPL(gpiod_export); | ||
885 | |||
886 | static int match_export(struct device *dev, const void *data) | ||
887 | { | ||
888 | return dev_get_drvdata(dev) == data; | ||
889 | } | ||
890 | |||
891 | /** | ||
892 | * gpiod_export_link - create a sysfs link to an exported GPIO node | ||
893 | * @dev: device under which to create symlink | ||
894 | * @name: name of the symlink | ||
895 | * @gpio: gpio to create symlink to, already exported | ||
896 | * | ||
897 | * Set up a symlink from /sys/.../dev/name to /sys/class/gpio/gpioN | ||
898 | * node. Caller is responsible for unlinking. | ||
899 | * | ||
900 | * Returns zero on success, else an error. | ||
901 | */ | ||
902 | int gpiod_export_link(struct device *dev, const char *name, | ||
903 | struct gpio_desc *desc) | ||
904 | { | ||
905 | int status = -EINVAL; | ||
906 | |||
907 | if (!desc) { | ||
908 | pr_warn("%s: invalid GPIO\n", __func__); | ||
909 | return -EINVAL; | ||
910 | } | ||
911 | |||
912 | mutex_lock(&sysfs_lock); | ||
913 | |||
914 | if (test_bit(FLAG_EXPORT, &desc->flags)) { | ||
915 | struct device *tdev; | ||
916 | |||
917 | tdev = class_find_device(&gpio_class, NULL, desc, match_export); | ||
918 | if (tdev != NULL) { | ||
919 | status = sysfs_create_link(&dev->kobj, &tdev->kobj, | ||
920 | name); | ||
921 | } else { | ||
922 | status = -ENODEV; | ||
923 | } | ||
924 | } | ||
925 | |||
926 | mutex_unlock(&sysfs_lock); | ||
927 | |||
928 | if (status) | ||
929 | gpiod_dbg(desc, "%s: status %d\n", __func__, status); | ||
930 | |||
931 | return status; | ||
932 | } | ||
933 | EXPORT_SYMBOL_GPL(gpiod_export_link); | ||
934 | |||
935 | /** | ||
936 | * gpiod_sysfs_set_active_low - set the polarity of gpio sysfs value | ||
937 | * @gpio: gpio to change | ||
938 | * @value: non-zero to use active low, i.e. inverted values | ||
939 | * | ||
940 | * Set the polarity of /sys/class/gpio/gpioN/value sysfs attribute. | ||
941 | * The GPIO does not have to be exported yet. If poll(2) support has | ||
942 | * been enabled for either rising or falling edge, it will be | ||
943 | * reconfigured to follow the new polarity. | ||
944 | * | ||
945 | * Returns zero on success, else an error. | ||
946 | */ | ||
947 | int gpiod_sysfs_set_active_low(struct gpio_desc *desc, int value) | ||
948 | { | ||
949 | struct device *dev = NULL; | ||
950 | int status = -EINVAL; | ||
951 | |||
952 | if (!desc) { | ||
953 | pr_warn("%s: invalid GPIO\n", __func__); | ||
954 | return -EINVAL; | ||
955 | } | ||
956 | |||
957 | mutex_lock(&sysfs_lock); | ||
958 | |||
959 | if (test_bit(FLAG_EXPORT, &desc->flags)) { | ||
960 | dev = class_find_device(&gpio_class, NULL, desc, match_export); | ||
961 | if (dev == NULL) { | ||
962 | status = -ENODEV; | ||
963 | goto unlock; | ||
964 | } | ||
965 | } | ||
966 | |||
967 | status = sysfs_set_active_low(desc, dev, value); | ||
968 | |||
969 | unlock: | ||
970 | mutex_unlock(&sysfs_lock); | ||
971 | |||
972 | if (status) | ||
973 | gpiod_dbg(desc, "%s: status %d\n", __func__, status); | ||
974 | |||
975 | return status; | ||
976 | } | ||
977 | EXPORT_SYMBOL_GPL(gpiod_sysfs_set_active_low); | ||
978 | |||
979 | /** | ||
980 | * gpiod_unexport - reverse effect of gpio_export() | ||
981 | * @gpio: gpio to make unavailable | ||
982 | * | ||
983 | * This is implicit on gpio_free(). | ||
984 | */ | ||
985 | void gpiod_unexport(struct gpio_desc *desc) | ||
986 | { | ||
987 | int status = 0; | ||
988 | struct device *dev = NULL; | ||
989 | |||
990 | if (!desc) { | ||
991 | pr_warn("%s: invalid GPIO\n", __func__); | ||
992 | return; | ||
993 | } | ||
994 | |||
995 | mutex_lock(&sysfs_lock); | ||
996 | |||
997 | if (test_bit(FLAG_EXPORT, &desc->flags)) { | ||
998 | |||
999 | dev = class_find_device(&gpio_class, NULL, desc, match_export); | ||
1000 | if (dev) { | ||
1001 | gpio_setup_irq(desc, dev, 0); | ||
1002 | clear_bit(FLAG_EXPORT, &desc->flags); | ||
1003 | } else | ||
1004 | status = -ENODEV; | ||
1005 | } | ||
1006 | |||
1007 | mutex_unlock(&sysfs_lock); | ||
1008 | |||
1009 | if (dev) { | ||
1010 | device_unregister(dev); | ||
1011 | put_device(dev); | ||
1012 | } | ||
1013 | |||
1014 | if (status) | ||
1015 | gpiod_dbg(desc, "%s: status %d\n", __func__, status); | ||
1016 | } | ||
1017 | EXPORT_SYMBOL_GPL(gpiod_unexport); | ||
1018 | |||
1019 | static int gpiochip_export(struct gpio_chip *chip) | ||
1020 | { | ||
1021 | int status; | ||
1022 | struct device *dev; | ||
1023 | |||
1024 | /* Many systems register gpio chips for SOC support very early, | ||
1025 | * before driver model support is available. In those cases we | ||
1026 | * export this later, in gpiolib_sysfs_init() ... here we just | ||
1027 | * verify that _some_ field of gpio_class got initialized. | ||
1028 | */ | ||
1029 | if (!gpio_class.p) | ||
1030 | return 0; | ||
1031 | |||
1032 | /* use chip->base for the ID; it's already known to be unique */ | ||
1033 | mutex_lock(&sysfs_lock); | ||
1034 | dev = device_create(&gpio_class, chip->dev, MKDEV(0, 0), chip, | ||
1035 | "gpiochip%d", chip->base); | ||
1036 | if (!IS_ERR(dev)) { | ||
1037 | status = sysfs_create_group(&dev->kobj, | ||
1038 | &gpiochip_attr_group); | ||
1039 | } else | ||
1040 | status = PTR_ERR(dev); | ||
1041 | chip->exported = (status == 0); | ||
1042 | mutex_unlock(&sysfs_lock); | ||
1043 | |||
1044 | if (status) { | ||
1045 | unsigned long flags; | ||
1046 | unsigned gpio; | ||
1047 | |||
1048 | spin_lock_irqsave(&gpio_lock, flags); | ||
1049 | gpio = 0; | ||
1050 | while (gpio < chip->ngpio) | ||
1051 | chip->desc[gpio++].chip = NULL; | ||
1052 | spin_unlock_irqrestore(&gpio_lock, flags); | ||
1053 | |||
1054 | chip_dbg(chip, "%s: status %d\n", __func__, status); | ||
1055 | } | ||
1056 | |||
1057 | return status; | ||
1058 | } | ||
1059 | |||
1060 | static void gpiochip_unexport(struct gpio_chip *chip) | ||
1061 | { | ||
1062 | int status; | ||
1063 | struct device *dev; | ||
1064 | |||
1065 | mutex_lock(&sysfs_lock); | ||
1066 | dev = class_find_device(&gpio_class, NULL, chip, match_export); | ||
1067 | if (dev) { | ||
1068 | put_device(dev); | ||
1069 | device_unregister(dev); | ||
1070 | chip->exported = false; | ||
1071 | status = 0; | ||
1072 | } else | ||
1073 | status = -ENODEV; | ||
1074 | mutex_unlock(&sysfs_lock); | ||
1075 | |||
1076 | if (status) | ||
1077 | chip_dbg(chip, "%s: status %d\n", __func__, status); | ||
1078 | } | ||
1079 | |||
1080 | static int __init gpiolib_sysfs_init(void) | ||
1081 | { | ||
1082 | int status; | ||
1083 | unsigned long flags; | ||
1084 | struct gpio_chip *chip; | ||
1085 | |||
1086 | status = class_register(&gpio_class); | ||
1087 | if (status < 0) | ||
1088 | return status; | ||
1089 | |||
1090 | /* Scan and register the gpio_chips which registered very | ||
1091 | * early (e.g. before the class_register above was called). | ||
1092 | * | ||
1093 | * We run before arch_initcall() so chip->dev nodes can have | ||
1094 | * registered, and so arch_initcall() can always gpio_export(). | ||
1095 | */ | ||
1096 | spin_lock_irqsave(&gpio_lock, flags); | ||
1097 | list_for_each_entry(chip, &gpio_chips, list) { | ||
1098 | if (!chip || chip->exported) | ||
1099 | continue; | ||
1100 | |||
1101 | spin_unlock_irqrestore(&gpio_lock, flags); | ||
1102 | status = gpiochip_export(chip); | ||
1103 | spin_lock_irqsave(&gpio_lock, flags); | ||
1104 | } | ||
1105 | spin_unlock_irqrestore(&gpio_lock, flags); | ||
1106 | |||
1107 | |||
1108 | return status; | ||
1109 | } | ||
1110 | postcore_initcall(gpiolib_sysfs_init); | ||
1111 | |||
1112 | #else | ||
1113 | static inline int gpiochip_export(struct gpio_chip *chip) | ||
1114 | { | ||
1115 | return 0; | ||
1116 | } | ||
1117 | |||
1118 | static inline void gpiochip_unexport(struct gpio_chip *chip) | ||
1119 | { | ||
1120 | } | ||
1121 | |||
1122 | #endif /* CONFIG_GPIO_SYSFS */ | ||
1123 | |||
1124 | /* | 169 | /* |
1125 | * Add a new chip to the global chips list, keeping the list of chips sorted | 170 | * Add a new chip to the global chips list, keeping the list of chips sorted |
1126 | * by base order. | 171 | * by base order. |
@@ -1474,6 +519,8 @@ static void gpiochip_irqchip_remove(struct gpio_chip *gpiochip) | |||
1474 | { | 519 | { |
1475 | unsigned int offset; | 520 | unsigned int offset; |
1476 | 521 | ||
522 | acpi_gpiochip_free_interrupts(gpiochip); | ||
523 | |||
1477 | /* Remove all IRQ mappings and delete the domain */ | 524 | /* Remove all IRQ mappings and delete the domain */ |
1478 | if (gpiochip->irqdomain) { | 525 | if (gpiochip->irqdomain) { |
1479 | for (offset = 0; offset < gpiochip->ngpio; offset++) | 526 | for (offset = 0; offset < gpiochip->ngpio; offset++) |
@@ -1567,6 +614,8 @@ int gpiochip_irqchip_add(struct gpio_chip *gpiochip, | |||
1567 | gpiochip->irq_base = irq_base; | 614 | gpiochip->irq_base = irq_base; |
1568 | } | 615 | } |
1569 | 616 | ||
617 | acpi_gpiochip_request_interrupts(gpiochip); | ||
618 | |||
1570 | return 0; | 619 | return 0; |
1571 | } | 620 | } |
1572 | EXPORT_SYMBOL_GPL(gpiochip_irqchip_add); | 621 | EXPORT_SYMBOL_GPL(gpiochip_irqchip_add); |
@@ -1740,7 +789,7 @@ done: | |||
1740 | return status; | 789 | return status; |
1741 | } | 790 | } |
1742 | 791 | ||
1743 | static int gpiod_request(struct gpio_desc *desc, const char *label) | 792 | int gpiod_request(struct gpio_desc *desc, const char *label) |
1744 | { | 793 | { |
1745 | int status = -EPROBE_DEFER; | 794 | int status = -EPROBE_DEFER; |
1746 | struct gpio_chip *chip; | 795 | struct gpio_chip *chip; |
@@ -1767,12 +816,6 @@ done: | |||
1767 | return status; | 816 | return status; |
1768 | } | 817 | } |
1769 | 818 | ||
1770 | int gpio_request(unsigned gpio, const char *label) | ||
1771 | { | ||
1772 | return gpiod_request(gpio_to_desc(gpio), label); | ||
1773 | } | ||
1774 | EXPORT_SYMBOL_GPL(gpio_request); | ||
1775 | |||
1776 | static bool __gpiod_free(struct gpio_desc *desc) | 819 | static bool __gpiod_free(struct gpio_desc *desc) |
1777 | { | 820 | { |
1778 | bool ret = false; | 821 | bool ret = false; |
@@ -1805,7 +848,7 @@ static bool __gpiod_free(struct gpio_desc *desc) | |||
1805 | return ret; | 848 | return ret; |
1806 | } | 849 | } |
1807 | 850 | ||
1808 | static void gpiod_free(struct gpio_desc *desc) | 851 | void gpiod_free(struct gpio_desc *desc) |
1809 | { | 852 | { |
1810 | if (desc && __gpiod_free(desc)) | 853 | if (desc && __gpiod_free(desc)) |
1811 | module_put(desc->chip->owner); | 854 | module_put(desc->chip->owner); |
@@ -1813,101 +856,14 @@ static void gpiod_free(struct gpio_desc *desc) | |||
1813 | WARN_ON(extra_checks); | 856 | WARN_ON(extra_checks); |
1814 | } | 857 | } |
1815 | 858 | ||
1816 | void gpio_free(unsigned gpio) | ||
1817 | { | ||
1818 | gpiod_free(gpio_to_desc(gpio)); | ||
1819 | } | ||
1820 | EXPORT_SYMBOL_GPL(gpio_free); | ||
1821 | |||
1822 | /** | ||
1823 | * gpio_request_one - request a single GPIO with initial configuration | ||
1824 | * @gpio: the GPIO number | ||
1825 | * @flags: GPIO configuration as specified by GPIOF_* | ||
1826 | * @label: a literal description string of this GPIO | ||
1827 | */ | ||
1828 | int gpio_request_one(unsigned gpio, unsigned long flags, const char *label) | ||
1829 | { | ||
1830 | struct gpio_desc *desc; | ||
1831 | int err; | ||
1832 | |||
1833 | desc = gpio_to_desc(gpio); | ||
1834 | |||
1835 | err = gpiod_request(desc, label); | ||
1836 | if (err) | ||
1837 | return err; | ||
1838 | |||
1839 | if (flags & GPIOF_OPEN_DRAIN) | ||
1840 | set_bit(FLAG_OPEN_DRAIN, &desc->flags); | ||
1841 | |||
1842 | if (flags & GPIOF_OPEN_SOURCE) | ||
1843 | set_bit(FLAG_OPEN_SOURCE, &desc->flags); | ||
1844 | |||
1845 | if (flags & GPIOF_DIR_IN) | ||
1846 | err = gpiod_direction_input(desc); | ||
1847 | else | ||
1848 | err = gpiod_direction_output_raw(desc, | ||
1849 | (flags & GPIOF_INIT_HIGH) ? 1 : 0); | ||
1850 | |||
1851 | if (err) | ||
1852 | goto free_gpio; | ||
1853 | |||
1854 | if (flags & GPIOF_EXPORT) { | ||
1855 | err = gpiod_export(desc, flags & GPIOF_EXPORT_CHANGEABLE); | ||
1856 | if (err) | ||
1857 | goto free_gpio; | ||
1858 | } | ||
1859 | |||
1860 | return 0; | ||
1861 | |||
1862 | free_gpio: | ||
1863 | gpiod_free(desc); | ||
1864 | return err; | ||
1865 | } | ||
1866 | EXPORT_SYMBOL_GPL(gpio_request_one); | ||
1867 | |||
1868 | /** | ||
1869 | * gpio_request_array - request multiple GPIOs in a single call | ||
1870 | * @array: array of the 'struct gpio' | ||
1871 | * @num: how many GPIOs in the array | ||
1872 | */ | ||
1873 | int gpio_request_array(const struct gpio *array, size_t num) | ||
1874 | { | ||
1875 | int i, err; | ||
1876 | |||
1877 | for (i = 0; i < num; i++, array++) { | ||
1878 | err = gpio_request_one(array->gpio, array->flags, array->label); | ||
1879 | if (err) | ||
1880 | goto err_free; | ||
1881 | } | ||
1882 | return 0; | ||
1883 | |||
1884 | err_free: | ||
1885 | while (i--) | ||
1886 | gpio_free((--array)->gpio); | ||
1887 | return err; | ||
1888 | } | ||
1889 | EXPORT_SYMBOL_GPL(gpio_request_array); | ||
1890 | |||
1891 | /** | ||
1892 | * gpio_free_array - release multiple GPIOs in a single call | ||
1893 | * @array: array of the 'struct gpio' | ||
1894 | * @num: how many GPIOs in the array | ||
1895 | */ | ||
1896 | void gpio_free_array(const struct gpio *array, size_t num) | ||
1897 | { | ||
1898 | while (num--) | ||
1899 | gpio_free((array++)->gpio); | ||
1900 | } | ||
1901 | EXPORT_SYMBOL_GPL(gpio_free_array); | ||
1902 | |||
1903 | /** | 859 | /** |
1904 | * gpiochip_is_requested - return string iff signal was requested | 860 | * gpiochip_is_requested - return string iff signal was requested |
1905 | * @chip: controller managing the signal | 861 | * @chip: controller managing the signal |
1906 | * @offset: of signal within controller's 0..(ngpio - 1) range | 862 | * @offset: of signal within controller's 0..(ngpio - 1) range |
1907 | * | 863 | * |
1908 | * Returns NULL if the GPIO is not currently requested, else a string. | 864 | * Returns NULL if the GPIO is not currently requested, else a string. |
1909 | * If debugfs support is enabled, the string returned is the label passed | 865 | * The string returned is the label passed to gpio_request(); if none has been |
1910 | * to gpio_request(); otherwise it is a meaningless constant. | 866 | * passed it is a meaningless, non-NULL constant. |
1911 | * | 867 | * |
1912 | * This function is for use by GPIO controller drivers. The label can | 868 | * This function is for use by GPIO controller drivers. The label can |
1913 | * help with diagnostics, and knowing that the signal is used as a GPIO | 869 | * help with diagnostics, and knowing that the signal is used as a GPIO |
@@ -1924,11 +880,7 @@ const char *gpiochip_is_requested(struct gpio_chip *chip, unsigned offset) | |||
1924 | 880 | ||
1925 | if (test_bit(FLAG_REQUESTED, &desc->flags) == 0) | 881 | if (test_bit(FLAG_REQUESTED, &desc->flags) == 0) |
1926 | return NULL; | 882 | return NULL; |
1927 | #ifdef CONFIG_DEBUG_FS | ||
1928 | return desc->label; | 883 | return desc->label; |
1929 | #else | ||
1930 | return "?"; | ||
1931 | #endif | ||
1932 | } | 884 | } |
1933 | EXPORT_SYMBOL_GPL(gpiochip_is_requested); | 885 | EXPORT_SYMBOL_GPL(gpiochip_is_requested); |
1934 | 886 | ||
@@ -1950,6 +902,7 @@ int gpiochip_request_own_desc(struct gpio_desc *desc, const char *label) | |||
1950 | 902 | ||
1951 | return __gpiod_request(desc, label); | 903 | return __gpiod_request(desc, label); |
1952 | } | 904 | } |
905 | EXPORT_SYMBOL_GPL(gpiochip_request_own_desc); | ||
1953 | 906 | ||
1954 | /** | 907 | /** |
1955 | * gpiochip_free_own_desc - Free GPIO requested by the chip driver | 908 | * gpiochip_free_own_desc - Free GPIO requested by the chip driver |
@@ -1963,6 +916,7 @@ void gpiochip_free_own_desc(struct gpio_desc *desc) | |||
1963 | if (desc) | 916 | if (desc) |
1964 | __gpiod_free(desc); | 917 | __gpiod_free(desc); |
1965 | } | 918 | } |
919 | EXPORT_SYMBOL_GPL(gpiochip_free_own_desc); | ||
1966 | 920 | ||
1967 | /* Drivers MUST set GPIO direction before making get/set calls. In | 921 | /* Drivers MUST set GPIO direction before making get/set calls. In |
1968 | * some cases this is done in early boot, before IRQs are enabled. | 922 | * some cases this is done in early boot, before IRQs are enabled. |
@@ -1984,10 +938,8 @@ void gpiochip_free_own_desc(struct gpio_desc *desc) | |||
1984 | */ | 938 | */ |
1985 | int gpiod_direction_input(struct gpio_desc *desc) | 939 | int gpiod_direction_input(struct gpio_desc *desc) |
1986 | { | 940 | { |
1987 | unsigned long flags; | ||
1988 | struct gpio_chip *chip; | 941 | struct gpio_chip *chip; |
1989 | int status = -EINVAL; | 942 | int status = -EINVAL; |
1990 | int offset; | ||
1991 | 943 | ||
1992 | if (!desc || !desc->chip) { | 944 | if (!desc || !desc->chip) { |
1993 | pr_warn("%s: invalid GPIO\n", __func__); | 945 | pr_warn("%s: invalid GPIO\n", __func__); |
@@ -2002,52 +954,20 @@ int gpiod_direction_input(struct gpio_desc *desc) | |||
2002 | return -EIO; | 954 | return -EIO; |
2003 | } | 955 | } |
2004 | 956 | ||
2005 | spin_lock_irqsave(&gpio_lock, flags); | 957 | status = chip->direction_input(chip, gpio_chip_hwgpio(desc)); |
2006 | |||
2007 | status = gpio_ensure_requested(desc); | ||
2008 | if (status < 0) | ||
2009 | goto fail; | ||
2010 | |||
2011 | /* now we know the gpio is valid and chip won't vanish */ | ||
2012 | |||
2013 | spin_unlock_irqrestore(&gpio_lock, flags); | ||
2014 | |||
2015 | might_sleep_if(chip->can_sleep); | ||
2016 | |||
2017 | offset = gpio_chip_hwgpio(desc); | ||
2018 | if (status) { | ||
2019 | status = chip->request(chip, offset); | ||
2020 | if (status < 0) { | ||
2021 | gpiod_dbg(desc, "%s: chip request fail, %d\n", | ||
2022 | __func__, status); | ||
2023 | /* and it's not available to anyone else ... | ||
2024 | * gpio_request() is the fully clean solution. | ||
2025 | */ | ||
2026 | goto lose; | ||
2027 | } | ||
2028 | } | ||
2029 | |||
2030 | status = chip->direction_input(chip, offset); | ||
2031 | if (status == 0) | 958 | if (status == 0) |
2032 | clear_bit(FLAG_IS_OUT, &desc->flags); | 959 | clear_bit(FLAG_IS_OUT, &desc->flags); |
2033 | 960 | ||
2034 | trace_gpio_direction(desc_to_gpio(desc), 1, status); | 961 | trace_gpio_direction(desc_to_gpio(desc), 1, status); |
2035 | lose: | 962 | |
2036 | return status; | ||
2037 | fail: | ||
2038 | spin_unlock_irqrestore(&gpio_lock, flags); | ||
2039 | if (status) | ||
2040 | gpiod_dbg(desc, "%s: status %d\n", __func__, status); | ||
2041 | return status; | 963 | return status; |
2042 | } | 964 | } |
2043 | EXPORT_SYMBOL_GPL(gpiod_direction_input); | 965 | EXPORT_SYMBOL_GPL(gpiod_direction_input); |
2044 | 966 | ||
2045 | static int _gpiod_direction_output_raw(struct gpio_desc *desc, int value) | 967 | static int _gpiod_direction_output_raw(struct gpio_desc *desc, int value) |
2046 | { | 968 | { |
2047 | unsigned long flags; | ||
2048 | struct gpio_chip *chip; | 969 | struct gpio_chip *chip; |
2049 | int status = -EINVAL; | 970 | int status = -EINVAL; |
2050 | int offset; | ||
2051 | 971 | ||
2052 | /* GPIOs used for IRQs shall not be set as output */ | 972 | /* GPIOs used for IRQs shall not be set as output */ |
2053 | if (test_bit(FLAG_USED_AS_IRQ, &desc->flags)) { | 973 | if (test_bit(FLAG_USED_AS_IRQ, &desc->flags)) { |
@@ -2073,42 +993,11 @@ static int _gpiod_direction_output_raw(struct gpio_desc *desc, int value) | |||
2073 | return -EIO; | 993 | return -EIO; |
2074 | } | 994 | } |
2075 | 995 | ||
2076 | spin_lock_irqsave(&gpio_lock, flags); | 996 | status = chip->direction_output(chip, gpio_chip_hwgpio(desc), value); |
2077 | |||
2078 | status = gpio_ensure_requested(desc); | ||
2079 | if (status < 0) | ||
2080 | goto fail; | ||
2081 | |||
2082 | /* now we know the gpio is valid and chip won't vanish */ | ||
2083 | |||
2084 | spin_unlock_irqrestore(&gpio_lock, flags); | ||
2085 | |||
2086 | might_sleep_if(chip->can_sleep); | ||
2087 | |||
2088 | offset = gpio_chip_hwgpio(desc); | ||
2089 | if (status) { | ||
2090 | status = chip->request(chip, offset); | ||
2091 | if (status < 0) { | ||
2092 | gpiod_dbg(desc, "%s: chip request fail, %d\n", | ||
2093 | __func__, status); | ||
2094 | /* and it's not available to anyone else ... | ||
2095 | * gpio_request() is the fully clean solution. | ||
2096 | */ | ||
2097 | goto lose; | ||
2098 | } | ||
2099 | } | ||
2100 | |||
2101 | status = chip->direction_output(chip, offset, value); | ||
2102 | if (status == 0) | 997 | if (status == 0) |
2103 | set_bit(FLAG_IS_OUT, &desc->flags); | 998 | set_bit(FLAG_IS_OUT, &desc->flags); |
2104 | trace_gpio_value(desc_to_gpio(desc), 0, value); | 999 | trace_gpio_value(desc_to_gpio(desc), 0, value); |
2105 | trace_gpio_direction(desc_to_gpio(desc), 0, status); | 1000 | trace_gpio_direction(desc_to_gpio(desc), 0, status); |
2106 | lose: | ||
2107 | return status; | ||
2108 | fail: | ||
2109 | spin_unlock_irqrestore(&gpio_lock, flags); | ||
2110 | if (status) | ||
2111 | gpiod_dbg(desc, "%s: gpio status %d\n", __func__, status); | ||
2112 | return status; | 1001 | return status; |
2113 | } | 1002 | } |
2114 | 1003 | ||
@@ -2167,10 +1056,7 @@ EXPORT_SYMBOL_GPL(gpiod_direction_output); | |||
2167 | */ | 1056 | */ |
2168 | int gpiod_set_debounce(struct gpio_desc *desc, unsigned debounce) | 1057 | int gpiod_set_debounce(struct gpio_desc *desc, unsigned debounce) |
2169 | { | 1058 | { |
2170 | unsigned long flags; | ||
2171 | struct gpio_chip *chip; | 1059 | struct gpio_chip *chip; |
2172 | int status = -EINVAL; | ||
2173 | int offset; | ||
2174 | 1060 | ||
2175 | if (!desc || !desc->chip) { | 1061 | if (!desc || !desc->chip) { |
2176 | pr_warn("%s: invalid GPIO\n", __func__); | 1062 | pr_warn("%s: invalid GPIO\n", __func__); |
@@ -2185,27 +1071,7 @@ int gpiod_set_debounce(struct gpio_desc *desc, unsigned debounce) | |||
2185 | return -ENOTSUPP; | 1071 | return -ENOTSUPP; |
2186 | } | 1072 | } |
2187 | 1073 | ||
2188 | spin_lock_irqsave(&gpio_lock, flags); | 1074 | return chip->set_debounce(chip, gpio_chip_hwgpio(desc), debounce); |
2189 | |||
2190 | status = gpio_ensure_requested(desc); | ||
2191 | if (status < 0) | ||
2192 | goto fail; | ||
2193 | |||
2194 | /* now we know the gpio is valid and chip won't vanish */ | ||
2195 | |||
2196 | spin_unlock_irqrestore(&gpio_lock, flags); | ||
2197 | |||
2198 | might_sleep_if(chip->can_sleep); | ||
2199 | |||
2200 | offset = gpio_chip_hwgpio(desc); | ||
2201 | return chip->set_debounce(chip, offset, debounce); | ||
2202 | |||
2203 | fail: | ||
2204 | spin_unlock_irqrestore(&gpio_lock, flags); | ||
2205 | if (status) | ||
2206 | gpiod_dbg(desc, "%s: status %d\n", __func__, status); | ||
2207 | |||
2208 | return status; | ||
2209 | } | 1075 | } |
2210 | EXPORT_SYMBOL_GPL(gpiod_set_debounce); | 1076 | EXPORT_SYMBOL_GPL(gpiod_set_debounce); |
2211 | 1077 | ||
@@ -2448,54 +1314,44 @@ int gpiod_to_irq(const struct gpio_desc *desc) | |||
2448 | EXPORT_SYMBOL_GPL(gpiod_to_irq); | 1314 | EXPORT_SYMBOL_GPL(gpiod_to_irq); |
2449 | 1315 | ||
2450 | /** | 1316 | /** |
2451 | * gpiod_lock_as_irq() - lock a GPIO to be used as IRQ | 1317 | * gpio_lock_as_irq() - lock a GPIO to be used as IRQ |
2452 | * @gpio: the GPIO line to lock as used for IRQ | 1318 | * @chip: the chip the GPIO to lock belongs to |
1319 | * @offset: the offset of the GPIO to lock as IRQ | ||
2453 | * | 1320 | * |
2454 | * This is used directly by GPIO drivers that want to lock down | 1321 | * This is used directly by GPIO drivers that want to lock down |
2455 | * a certain GPIO line to be used for IRQs. | 1322 | * a certain GPIO line to be used for IRQs. |
2456 | */ | 1323 | */ |
2457 | int gpiod_lock_as_irq(struct gpio_desc *desc) | 1324 | int gpio_lock_as_irq(struct gpio_chip *chip, unsigned int offset) |
2458 | { | 1325 | { |
2459 | if (!desc) | 1326 | if (offset >= chip->ngpio) |
2460 | return -EINVAL; | 1327 | return -EINVAL; |
2461 | 1328 | ||
2462 | if (test_bit(FLAG_IS_OUT, &desc->flags)) { | 1329 | if (test_bit(FLAG_IS_OUT, &chip->desc[offset].flags)) { |
2463 | gpiod_err(desc, | 1330 | chip_err(chip, |
2464 | "%s: tried to flag a GPIO set as output for IRQ\n", | 1331 | "%s: tried to flag a GPIO set as output for IRQ\n", |
2465 | __func__); | 1332 | __func__); |
2466 | return -EIO; | 1333 | return -EIO; |
2467 | } | 1334 | } |
2468 | 1335 | ||
2469 | set_bit(FLAG_USED_AS_IRQ, &desc->flags); | 1336 | set_bit(FLAG_USED_AS_IRQ, &chip->desc[offset].flags); |
2470 | return 0; | 1337 | return 0; |
2471 | } | 1338 | } |
2472 | EXPORT_SYMBOL_GPL(gpiod_lock_as_irq); | ||
2473 | |||
2474 | int gpio_lock_as_irq(struct gpio_chip *chip, unsigned int offset) | ||
2475 | { | ||
2476 | return gpiod_lock_as_irq(gpiochip_get_desc(chip, offset)); | ||
2477 | } | ||
2478 | EXPORT_SYMBOL_GPL(gpio_lock_as_irq); | 1339 | EXPORT_SYMBOL_GPL(gpio_lock_as_irq); |
2479 | 1340 | ||
2480 | /** | 1341 | /** |
2481 | * gpiod_unlock_as_irq() - unlock a GPIO used as IRQ | 1342 | * gpio_unlock_as_irq() - unlock a GPIO used as IRQ |
2482 | * @gpio: the GPIO line to unlock from IRQ usage | 1343 | * @chip: the chip the GPIO to lock belongs to |
1344 | * @offset: the offset of the GPIO to lock as IRQ | ||
2483 | * | 1345 | * |
2484 | * This is used directly by GPIO drivers that want to indicate | 1346 | * This is used directly by GPIO drivers that want to indicate |
2485 | * that a certain GPIO is no longer used exclusively for IRQ. | 1347 | * that a certain GPIO is no longer used exclusively for IRQ. |
2486 | */ | 1348 | */ |
2487 | void gpiod_unlock_as_irq(struct gpio_desc *desc) | 1349 | void gpio_unlock_as_irq(struct gpio_chip *chip, unsigned int offset) |
2488 | { | 1350 | { |
2489 | if (!desc) | 1351 | if (offset >= chip->ngpio) |
2490 | return; | 1352 | return; |
2491 | 1353 | ||
2492 | clear_bit(FLAG_USED_AS_IRQ, &desc->flags); | 1354 | clear_bit(FLAG_USED_AS_IRQ, &chip->desc[offset].flags); |
2493 | } | ||
2494 | EXPORT_SYMBOL_GPL(gpiod_unlock_as_irq); | ||
2495 | |||
2496 | void gpio_unlock_as_irq(struct gpio_chip *chip, unsigned int offset) | ||
2497 | { | ||
2498 | return gpiod_unlock_as_irq(gpiochip_get_desc(chip, offset)); | ||
2499 | } | 1355 | } |
2500 | EXPORT_SYMBOL_GPL(gpio_unlock_as_irq); | 1356 | EXPORT_SYMBOL_GPL(gpio_unlock_as_irq); |
2501 | 1357 | ||
@@ -2726,38 +1582,43 @@ static struct gpio_desc *gpiod_find(struct device *dev, const char *con_id, | |||
2726 | * gpiod_get - obtain a GPIO for a given GPIO function | 1582 | * gpiod_get - obtain a GPIO for a given GPIO function |
2727 | * @dev: GPIO consumer, can be NULL for system-global GPIOs | 1583 | * @dev: GPIO consumer, can be NULL for system-global GPIOs |
2728 | * @con_id: function within the GPIO consumer | 1584 | * @con_id: function within the GPIO consumer |
1585 | * @flags: optional GPIO initialization flags | ||
2729 | * | 1586 | * |
2730 | * Return the GPIO descriptor corresponding to the function con_id of device | 1587 | * Return the GPIO descriptor corresponding to the function con_id of device |
2731 | * dev, -ENOENT if no GPIO has been assigned to the requested function, or | 1588 | * dev, -ENOENT if no GPIO has been assigned to the requested function, or |
2732 | * another IS_ERR() code if an error occured while trying to acquire the GPIO. | 1589 | * another IS_ERR() code if an error occured while trying to acquire the GPIO. |
2733 | */ | 1590 | */ |
2734 | struct gpio_desc *__must_check gpiod_get(struct device *dev, const char *con_id) | 1591 | struct gpio_desc *__must_check __gpiod_get(struct device *dev, const char *con_id, |
1592 | enum gpiod_flags flags) | ||
2735 | { | 1593 | { |
2736 | return gpiod_get_index(dev, con_id, 0); | 1594 | return gpiod_get_index(dev, con_id, 0, flags); |
2737 | } | 1595 | } |
2738 | EXPORT_SYMBOL_GPL(gpiod_get); | 1596 | EXPORT_SYMBOL_GPL(__gpiod_get); |
2739 | 1597 | ||
2740 | /** | 1598 | /** |
2741 | * gpiod_get_optional - obtain an optional GPIO for a given GPIO function | 1599 | * gpiod_get_optional - obtain an optional GPIO for a given GPIO function |
2742 | * @dev: GPIO consumer, can be NULL for system-global GPIOs | 1600 | * @dev: GPIO consumer, can be NULL for system-global GPIOs |
2743 | * @con_id: function within the GPIO consumer | 1601 | * @con_id: function within the GPIO consumer |
1602 | * @flags: optional GPIO initialization flags | ||
2744 | * | 1603 | * |
2745 | * This is equivalent to gpiod_get(), except that when no GPIO was assigned to | 1604 | * This is equivalent to gpiod_get(), except that when no GPIO was assigned to |
2746 | * the requested function it will return NULL. This is convenient for drivers | 1605 | * the requested function it will return NULL. This is convenient for drivers |
2747 | * that need to handle optional GPIOs. | 1606 | * that need to handle optional GPIOs. |
2748 | */ | 1607 | */ |
2749 | struct gpio_desc *__must_check gpiod_get_optional(struct device *dev, | 1608 | struct gpio_desc *__must_check __gpiod_get_optional(struct device *dev, |
2750 | const char *con_id) | 1609 | const char *con_id, |
1610 | enum gpiod_flags flags) | ||
2751 | { | 1611 | { |
2752 | return gpiod_get_index_optional(dev, con_id, 0); | 1612 | return gpiod_get_index_optional(dev, con_id, 0, flags); |
2753 | } | 1613 | } |
2754 | EXPORT_SYMBOL_GPL(gpiod_get_optional); | 1614 | EXPORT_SYMBOL_GPL(__gpiod_get_optional); |
2755 | 1615 | ||
2756 | /** | 1616 | /** |
2757 | * gpiod_get_index - obtain a GPIO from a multi-index GPIO function | 1617 | * gpiod_get_index - obtain a GPIO from a multi-index GPIO function |
2758 | * @dev: GPIO consumer, can be NULL for system-global GPIOs | 1618 | * @dev: GPIO consumer, can be NULL for system-global GPIOs |
2759 | * @con_id: function within the GPIO consumer | 1619 | * @con_id: function within the GPIO consumer |
2760 | * @idx: index of the GPIO to obtain in the consumer | 1620 | * @idx: index of the GPIO to obtain in the consumer |
1621 | * @flags: optional GPIO initialization flags | ||
2761 | * | 1622 | * |
2762 | * This variant of gpiod_get() allows to access GPIOs other than the first | 1623 | * This variant of gpiod_get() allows to access GPIOs other than the first |
2763 | * defined one for functions that define several GPIOs. | 1624 | * defined one for functions that define several GPIOs. |
@@ -2766,23 +1627,24 @@ EXPORT_SYMBOL_GPL(gpiod_get_optional); | |||
2766 | * requested function and/or index, or another IS_ERR() code if an error | 1627 | * requested function and/or index, or another IS_ERR() code if an error |
2767 | * occured while trying to acquire the GPIO. | 1628 | * occured while trying to acquire the GPIO. |
2768 | */ | 1629 | */ |
2769 | struct gpio_desc *__must_check gpiod_get_index(struct device *dev, | 1630 | struct gpio_desc *__must_check __gpiod_get_index(struct device *dev, |
2770 | const char *con_id, | 1631 | const char *con_id, |
2771 | unsigned int idx) | 1632 | unsigned int idx, |
1633 | enum gpiod_flags flags) | ||
2772 | { | 1634 | { |
2773 | struct gpio_desc *desc = NULL; | 1635 | struct gpio_desc *desc = NULL; |
2774 | int status; | 1636 | int status; |
2775 | enum gpio_lookup_flags flags = 0; | 1637 | enum gpio_lookup_flags lookupflags = 0; |
2776 | 1638 | ||
2777 | dev_dbg(dev, "GPIO lookup for consumer %s\n", con_id); | 1639 | dev_dbg(dev, "GPIO lookup for consumer %s\n", con_id); |
2778 | 1640 | ||
2779 | /* Using device tree? */ | 1641 | /* Using device tree? */ |
2780 | if (IS_ENABLED(CONFIG_OF) && dev && dev->of_node) { | 1642 | if (IS_ENABLED(CONFIG_OF) && dev && dev->of_node) { |
2781 | dev_dbg(dev, "using device tree for GPIO lookup\n"); | 1643 | dev_dbg(dev, "using device tree for GPIO lookup\n"); |
2782 | desc = of_find_gpio(dev, con_id, idx, &flags); | 1644 | desc = of_find_gpio(dev, con_id, idx, &lookupflags); |
2783 | } else if (IS_ENABLED(CONFIG_ACPI) && dev && ACPI_HANDLE(dev)) { | 1645 | } else if (IS_ENABLED(CONFIG_ACPI) && dev && ACPI_HANDLE(dev)) { |
2784 | dev_dbg(dev, "using ACPI for GPIO lookup\n"); | 1646 | dev_dbg(dev, "using ACPI for GPIO lookup\n"); |
2785 | desc = acpi_find_gpio(dev, con_id, idx, &flags); | 1647 | desc = acpi_find_gpio(dev, con_id, idx, &lookupflags); |
2786 | } | 1648 | } |
2787 | 1649 | ||
2788 | /* | 1650 | /* |
@@ -2791,7 +1653,7 @@ struct gpio_desc *__must_check gpiod_get_index(struct device *dev, | |||
2791 | */ | 1653 | */ |
2792 | if (!desc || desc == ERR_PTR(-ENOENT)) { | 1654 | if (!desc || desc == ERR_PTR(-ENOENT)) { |
2793 | dev_dbg(dev, "using lookup tables for GPIO lookup"); | 1655 | dev_dbg(dev, "using lookup tables for GPIO lookup"); |
2794 | desc = gpiod_find(dev, con_id, idx, &flags); | 1656 | desc = gpiod_find(dev, con_id, idx, &lookupflags); |
2795 | } | 1657 | } |
2796 | 1658 | ||
2797 | if (IS_ERR(desc)) { | 1659 | if (IS_ERR(desc)) { |
@@ -2804,16 +1666,33 @@ struct gpio_desc *__must_check gpiod_get_index(struct device *dev, | |||
2804 | if (status < 0) | 1666 | if (status < 0) |
2805 | return ERR_PTR(status); | 1667 | return ERR_PTR(status); |
2806 | 1668 | ||
2807 | if (flags & GPIO_ACTIVE_LOW) | 1669 | if (lookupflags & GPIO_ACTIVE_LOW) |
2808 | set_bit(FLAG_ACTIVE_LOW, &desc->flags); | 1670 | set_bit(FLAG_ACTIVE_LOW, &desc->flags); |
2809 | if (flags & GPIO_OPEN_DRAIN) | 1671 | if (lookupflags & GPIO_OPEN_DRAIN) |
2810 | set_bit(FLAG_OPEN_DRAIN, &desc->flags); | 1672 | set_bit(FLAG_OPEN_DRAIN, &desc->flags); |
2811 | if (flags & GPIO_OPEN_SOURCE) | 1673 | if (lookupflags & GPIO_OPEN_SOURCE) |
2812 | set_bit(FLAG_OPEN_SOURCE, &desc->flags); | 1674 | set_bit(FLAG_OPEN_SOURCE, &desc->flags); |
2813 | 1675 | ||
1676 | /* No particular flag request, return here... */ | ||
1677 | if (flags & GPIOD_FLAGS_BIT_DIR_SET) | ||
1678 | return desc; | ||
1679 | |||
1680 | /* Process flags */ | ||
1681 | if (flags & GPIOD_FLAGS_BIT_DIR_OUT) | ||
1682 | status = gpiod_direction_output(desc, | ||
1683 | flags & GPIOD_FLAGS_BIT_DIR_VAL); | ||
1684 | else | ||
1685 | status = gpiod_direction_input(desc); | ||
1686 | |||
1687 | if (status < 0) { | ||
1688 | dev_dbg(dev, "setup of GPIO %s failed\n", con_id); | ||
1689 | gpiod_put(desc); | ||
1690 | return ERR_PTR(status); | ||
1691 | } | ||
1692 | |||
2814 | return desc; | 1693 | return desc; |
2815 | } | 1694 | } |
2816 | EXPORT_SYMBOL_GPL(gpiod_get_index); | 1695 | EXPORT_SYMBOL_GPL(__gpiod_get_index); |
2817 | 1696 | ||
2818 | /** | 1697 | /** |
2819 | * gpiod_get_index_optional - obtain an optional GPIO from a multi-index GPIO | 1698 | * gpiod_get_index_optional - obtain an optional GPIO from a multi-index GPIO |
@@ -2821,18 +1700,20 @@ EXPORT_SYMBOL_GPL(gpiod_get_index); | |||
2821 | * @dev: GPIO consumer, can be NULL for system-global GPIOs | 1700 | * @dev: GPIO consumer, can be NULL for system-global GPIOs |
2822 | * @con_id: function within the GPIO consumer | 1701 | * @con_id: function within the GPIO consumer |
2823 | * @index: index of the GPIO to obtain in the consumer | 1702 | * @index: index of the GPIO to obtain in the consumer |
1703 | * @flags: optional GPIO initialization flags | ||
2824 | * | 1704 | * |
2825 | * This is equivalent to gpiod_get_index(), except that when no GPIO with the | 1705 | * This is equivalent to gpiod_get_index(), except that when no GPIO with the |
2826 | * specified index was assigned to the requested function it will return NULL. | 1706 | * specified index was assigned to the requested function it will return NULL. |
2827 | * This is convenient for drivers that need to handle optional GPIOs. | 1707 | * This is convenient for drivers that need to handle optional GPIOs. |
2828 | */ | 1708 | */ |
2829 | struct gpio_desc *__must_check gpiod_get_index_optional(struct device *dev, | 1709 | struct gpio_desc *__must_check __gpiod_get_index_optional(struct device *dev, |
2830 | const char *con_id, | 1710 | const char *con_id, |
2831 | unsigned int index) | 1711 | unsigned int index, |
1712 | enum gpiod_flags flags) | ||
2832 | { | 1713 | { |
2833 | struct gpio_desc *desc; | 1714 | struct gpio_desc *desc; |
2834 | 1715 | ||
2835 | desc = gpiod_get_index(dev, con_id, index); | 1716 | desc = gpiod_get_index(dev, con_id, index, flags); |
2836 | if (IS_ERR(desc)) { | 1717 | if (IS_ERR(desc)) { |
2837 | if (PTR_ERR(desc) == -ENOENT) | 1718 | if (PTR_ERR(desc) == -ENOENT) |
2838 | return NULL; | 1719 | return NULL; |
@@ -2840,7 +1721,7 @@ struct gpio_desc *__must_check gpiod_get_index_optional(struct device *dev, | |||
2840 | 1721 | ||
2841 | return desc; | 1722 | return desc; |
2842 | } | 1723 | } |
2843 | EXPORT_SYMBOL_GPL(gpiod_get_index_optional); | 1724 | EXPORT_SYMBOL_GPL(__gpiod_get_index_optional); |
2844 | 1725 | ||
2845 | /** | 1726 | /** |
2846 | * gpiod_put - dispose of a GPIO descriptor | 1727 | * gpiod_put - dispose of a GPIO descriptor |
diff --git a/drivers/gpio/gpiolib.h b/drivers/gpio/gpiolib.h index 1a4103dd38df..9db2b6a71c5d 100644 --- a/drivers/gpio/gpiolib.h +++ b/drivers/gpio/gpiolib.h | |||
@@ -31,12 +31,21 @@ struct acpi_gpio_info { | |||
31 | void acpi_gpiochip_add(struct gpio_chip *chip); | 31 | void acpi_gpiochip_add(struct gpio_chip *chip); |
32 | void acpi_gpiochip_remove(struct gpio_chip *chip); | 32 | void acpi_gpiochip_remove(struct gpio_chip *chip); |
33 | 33 | ||
34 | void acpi_gpiochip_request_interrupts(struct gpio_chip *chip); | ||
35 | void acpi_gpiochip_free_interrupts(struct gpio_chip *chip); | ||
36 | |||
34 | struct gpio_desc *acpi_get_gpiod_by_index(struct device *dev, int index, | 37 | struct gpio_desc *acpi_get_gpiod_by_index(struct device *dev, int index, |
35 | struct acpi_gpio_info *info); | 38 | struct acpi_gpio_info *info); |
36 | #else | 39 | #else |
37 | static inline void acpi_gpiochip_add(struct gpio_chip *chip) { } | 40 | static inline void acpi_gpiochip_add(struct gpio_chip *chip) { } |
38 | static inline void acpi_gpiochip_remove(struct gpio_chip *chip) { } | 41 | static inline void acpi_gpiochip_remove(struct gpio_chip *chip) { } |
39 | 42 | ||
43 | static inline void | ||
44 | acpi_gpiochip_request_interrupts(struct gpio_chip *chip) { } | ||
45 | |||
46 | static inline void | ||
47 | acpi_gpiochip_free_interrupts(struct gpio_chip *chip) { } | ||
48 | |||
40 | static inline struct gpio_desc * | 49 | static inline struct gpio_desc * |
41 | acpi_get_gpiod_by_index(struct device *dev, int index, | 50 | acpi_get_gpiod_by_index(struct device *dev, int index, |
42 | struct acpi_gpio_info *info) | 51 | struct acpi_gpio_info *info) |
@@ -45,10 +54,100 @@ acpi_get_gpiod_by_index(struct device *dev, int index, | |||
45 | } | 54 | } |
46 | #endif | 55 | #endif |
47 | 56 | ||
48 | int gpiochip_request_own_desc(struct gpio_desc *desc, const char *label); | ||
49 | void gpiochip_free_own_desc(struct gpio_desc *desc); | ||
50 | |||
51 | struct gpio_desc *of_get_named_gpiod_flags(struct device_node *np, | 57 | struct gpio_desc *of_get_named_gpiod_flags(struct device_node *np, |
52 | const char *list_name, int index, enum of_gpio_flags *flags); | 58 | const char *list_name, int index, enum of_gpio_flags *flags); |
53 | 59 | ||
60 | struct gpio_desc *gpiochip_get_desc(struct gpio_chip *chip, u16 hwnum); | ||
61 | |||
62 | extern struct spinlock gpio_lock; | ||
63 | extern struct list_head gpio_chips; | ||
64 | |||
65 | struct gpio_desc { | ||
66 | struct gpio_chip *chip; | ||
67 | unsigned long flags; | ||
68 | /* flag symbols are bit numbers */ | ||
69 | #define FLAG_REQUESTED 0 | ||
70 | #define FLAG_IS_OUT 1 | ||
71 | #define FLAG_EXPORT 2 /* protected by sysfs_lock */ | ||
72 | #define FLAG_SYSFS 3 /* exported via /sys/class/gpio/control */ | ||
73 | #define FLAG_TRIG_FALL 4 /* trigger on falling edge */ | ||
74 | #define FLAG_TRIG_RISE 5 /* trigger on rising edge */ | ||
75 | #define FLAG_ACTIVE_LOW 6 /* value has active low */ | ||
76 | #define FLAG_OPEN_DRAIN 7 /* Gpio is open drain type */ | ||
77 | #define FLAG_OPEN_SOURCE 8 /* Gpio is open source type */ | ||
78 | #define FLAG_USED_AS_IRQ 9 /* GPIO is connected to an IRQ */ | ||
79 | |||
80 | #define ID_SHIFT 16 /* add new flags before this one */ | ||
81 | |||
82 | #define GPIO_FLAGS_MASK ((1 << ID_SHIFT) - 1) | ||
83 | #define GPIO_TRIGGER_MASK (BIT(FLAG_TRIG_FALL) | BIT(FLAG_TRIG_RISE)) | ||
84 | |||
85 | const char *label; | ||
86 | }; | ||
87 | |||
88 | int gpiod_request(struct gpio_desc *desc, const char *label); | ||
89 | void gpiod_free(struct gpio_desc *desc); | ||
90 | |||
91 | /* | ||
92 | * Return the GPIO number of the passed descriptor relative to its chip | ||
93 | */ | ||
94 | static int __maybe_unused gpio_chip_hwgpio(const struct gpio_desc *desc) | ||
95 | { | ||
96 | return desc - &desc->chip->desc[0]; | ||
97 | } | ||
98 | |||
99 | /* With descriptor prefix */ | ||
100 | |||
101 | #define gpiod_emerg(desc, fmt, ...) \ | ||
102 | pr_emerg("gpio-%d (%s): " fmt, desc_to_gpio(desc), desc->label ? : "?",\ | ||
103 | ##__VA_ARGS__) | ||
104 | #define gpiod_crit(desc, fmt, ...) \ | ||
105 | pr_crit("gpio-%d (%s): " fmt, desc_to_gpio(desc), desc->label ? : "?", \ | ||
106 | ##__VA_ARGS__) | ||
107 | #define gpiod_err(desc, fmt, ...) \ | ||
108 | pr_err("gpio-%d (%s): " fmt, desc_to_gpio(desc), desc->label ? : "?", \ | ||
109 | ##__VA_ARGS__) | ||
110 | #define gpiod_warn(desc, fmt, ...) \ | ||
111 | pr_warn("gpio-%d (%s): " fmt, desc_to_gpio(desc), desc->label ? : "?", \ | ||
112 | ##__VA_ARGS__) | ||
113 | #define gpiod_info(desc, fmt, ...) \ | ||
114 | pr_info("gpio-%d (%s): " fmt, desc_to_gpio(desc), desc->label ? : "?", \ | ||
115 | ##__VA_ARGS__) | ||
116 | #define gpiod_dbg(desc, fmt, ...) \ | ||
117 | pr_debug("gpio-%d (%s): " fmt, desc_to_gpio(desc), desc->label ? : "?",\ | ||
118 | ##__VA_ARGS__) | ||
119 | |||
120 | /* With chip prefix */ | ||
121 | |||
122 | #define chip_emerg(chip, fmt, ...) \ | ||
123 | pr_emerg("GPIO chip %s: " fmt, chip->label, ##__VA_ARGS__) | ||
124 | #define chip_crit(chip, fmt, ...) \ | ||
125 | pr_crit("GPIO chip %s: " fmt, chip->label, ##__VA_ARGS__) | ||
126 | #define chip_err(chip, fmt, ...) \ | ||
127 | pr_err("GPIO chip %s: " fmt, chip->label, ##__VA_ARGS__) | ||
128 | #define chip_warn(chip, fmt, ...) \ | ||
129 | pr_warn("GPIO chip %s: " fmt, chip->label, ##__VA_ARGS__) | ||
130 | #define chip_info(chip, fmt, ...) \ | ||
131 | pr_info("GPIO chip %s: " fmt, chip->label, ##__VA_ARGS__) | ||
132 | #define chip_dbg(chip, fmt, ...) \ | ||
133 | pr_debug("GPIO chip %s: " fmt, chip->label, ##__VA_ARGS__) | ||
134 | |||
135 | #ifdef CONFIG_GPIO_SYSFS | ||
136 | |||
137 | int gpiochip_export(struct gpio_chip *chip); | ||
138 | void gpiochip_unexport(struct gpio_chip *chip); | ||
139 | |||
140 | #else | ||
141 | |||
142 | static inline int gpiochip_export(struct gpio_chip *chip) | ||
143 | { | ||
144 | return 0; | ||
145 | } | ||
146 | |||
147 | static inline void gpiochip_unexport(struct gpio_chip *chip) | ||
148 | { | ||
149 | } | ||
150 | |||
151 | #endif /* CONFIG_GPIO_SYSFS */ | ||
152 | |||
54 | #endif /* GPIOLIB_H */ | 153 | #endif /* GPIOLIB_H */ |