12 files changed, 1121 insertions, 16 deletions

diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index 6b4c484a699a..2ad0128c63c6 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -162,6 +162,16 @@ config GPIO_WM831X
           Say yes here to access the GPIO signals of WM831x power management
           chips from Wolfson Microelectronics.
 
+config GPIO_ADP5520
+        tristate "GPIO Support for ADP5520 PMIC"
+        depends on PMIC_ADP5520
+        help
+          This option enables support for on-chip GPIO found
+          on Analog Devices ADP5520 PMICs.
+
+          To compile this driver as a module, choose M here: the module will
+          be called adp5520-gpio.
+
 comment "PCI GPIO expanders:"
 
 config GPIO_BT8XX
@@ -180,6 +190,12 @@ config GPIO_BT8XX
 
           If unsure, say N.
 
+config GPIO_LANGWELL
+        bool "Intel Moorestown Platform Langwell GPIO support"
+        depends on PCI
+        help
+          Say Y here to support Intel Moorestown platform GPIO.
+
 comment "SPI GPIO expanders:"
 
 config GPIO_MAX7301
@@ -195,4 +211,23 @@ config GPIO_MCP23S08
           SPI driver for Microchip MCP23S08 I/O expander.  This provides
           a GPIO interface supporting inputs and outputs.
 
+config GPIO_MC33880
+        tristate "Freescale MC33880 high-side/low-side switch"
+        depends on SPI_MASTER
+        help
+          SPI driver for Freescale MC33880 high-side/low-side switch.
+          This provides GPIO interface supporting inputs and outputs.
+
+comment "AC97 GPIO expanders:"
+
+config GPIO_UCB1400
+        bool "Philips UCB1400 GPIO"
+        depends on UCB1400_CORE
+        help
+          This enables support for the Philips UCB1400 GPIO pins.
+          The UCB1400 is an AC97 audio codec.
+
+          To compile this driver as a module, choose M here: the
+          module will be called ucb1400_gpio.
+
 endif
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index ea7c745f26a8..00a532c9a1e2 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -4,13 +4,17 @@ ccflags-$(CONFIG_DEBUG_GPIO)	+= -DDEBUG
 
 obj-$(CONFIG_GPIOLIB)           += gpiolib.o
 
+obj-$(CONFIG_GPIO_ADP5520)      += adp5520-gpio.o
+obj-$(CONFIG_GPIO_LANGWELL)     += langwell_gpio.o
 obj-$(CONFIG_GPIO_MAX7301)      += max7301.o
 obj-$(CONFIG_GPIO_MAX732X)      += max732x.o
+obj-$(CONFIG_GPIO_MC33880)      += mc33880.o
 obj-$(CONFIG_GPIO_MCP23S08)     += mcp23s08.o
 obj-$(CONFIG_GPIO_PCA953X)      += pca953x.o
 obj-$(CONFIG_GPIO_PCF857X)      += pcf857x.o
 obj-$(CONFIG_GPIO_PL061)        += pl061.o
 obj-$(CONFIG_GPIO_TWL4030)      += twl4030-gpio.o
+obj-$(CONFIG_GPIO_UCB1400)      += ucb1400_gpio.o
 obj-$(CONFIG_GPIO_XILINX)       += xilinx_gpio.o
 obj-$(CONFIG_GPIO_BT8XX)        += bt8xxgpio.o
 obj-$(CONFIG_GPIO_VR41XX)       += vr41xx_giu.o
diff --git a/drivers/gpio/adp5520-gpio.c b/drivers/gpio/adp5520-gpio.c
new file mode 100644
index 000000000000..ad05bbc7ffd5
--- /dev/null
+++ b/drivers/gpio/adp5520-gpio.c
@@ -0,0 +1,206 @@
+/*
+ * GPIO driver for Analog Devices ADP5520 MFD PMICs
+ *
+ * Copyright 2009 Analog Devices Inc.
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/mfd/adp5520.h>
+
+#include <linux/gpio.h>
+
+struct adp5520_gpio {
+        struct device *master;
+        struct gpio_chip gpio_chip;
+        unsigned char lut[ADP5520_MAXGPIOS];
+        unsigned long output;
+};
+
+static int adp5520_gpio_get_value(struct gpio_chip *chip, unsigned off)
+{
+        struct adp5520_gpio *dev;
+        uint8_t reg_val;
+
+        dev = container_of(chip, struct adp5520_gpio, gpio_chip);
+
+        /*
+         * There are dedicated registers for GPIO IN/OUT.
+         * Make sure we return the right value, even when configured as output
+         */
+
+        if (test_bit(off, &dev->output))
+                adp5520_read(dev->master, GPIO_OUT, &reg_val);
+        else
+                adp5520_read(dev->master, GPIO_IN, &reg_val);
+
+        return !!(reg_val & dev->lut[off]);
+}
+
+static void adp5520_gpio_set_value(struct gpio_chip *chip,
+                unsigned off, int val)
+{
+        struct adp5520_gpio *dev;
+        dev = container_of(chip, struct adp5520_gpio, gpio_chip);
+
+        if (val)
+                adp5520_set_bits(dev->master, GPIO_OUT, dev->lut[off]);
+        else
+                adp5520_clr_bits(dev->master, GPIO_OUT, dev->lut[off]);
+}
+
+static int adp5520_gpio_direction_input(struct gpio_chip *chip, unsigned off)
+{
+        struct adp5520_gpio *dev;
+        dev = container_of(chip, struct adp5520_gpio, gpio_chip);
+
+        clear_bit(off, &dev->output);
+
+        return adp5520_clr_bits(dev->master, GPIO_CFG_2, dev->lut[off]);
+}
+
+static int adp5520_gpio_direction_output(struct gpio_chip *chip,
+                unsigned off, int val)
+{
+        struct adp5520_gpio *dev;
+        int ret = 0;
+        dev = container_of(chip, struct adp5520_gpio, gpio_chip);
+
+        set_bit(off, &dev->output);
+
+        if (val)
+                ret |= adp5520_set_bits(dev->master, GPIO_OUT, dev->lut[off]);
+        else
+                ret |= adp5520_clr_bits(dev->master, GPIO_OUT, dev->lut[off]);
+
+        ret |= adp5520_set_bits(dev->master, GPIO_CFG_2, dev->lut[off]);
+
+        return ret;
+}
+
+static int __devinit adp5520_gpio_probe(struct platform_device *pdev)
+{
+        struct adp5520_gpio_platfrom_data *pdata = pdev->dev.platform_data;
+        struct adp5520_gpio *dev;
+        struct gpio_chip *gc;
+        int ret, i, gpios;
+        unsigned char ctl_mask = 0;
+
+        if (pdata == NULL) {
+                dev_err(&pdev->dev, "missing platform data\n");
+                return -ENODEV;
+        }
+
+        if (pdev->id != ID_ADP5520) {
+                dev_err(&pdev->dev, "only ADP5520 supports GPIO\n");
+                return -ENODEV;
+        }
+
+        dev = kzalloc(sizeof(*dev), GFP_KERNEL);
+        if (dev == NULL) {
+                dev_err(&pdev->dev, "failed to alloc memory\n");
+                return -ENOMEM;
+        }
+
+        dev->master = pdev->dev.parent;
+
+        for (gpios = 0, i = 0; i < ADP5520_MAXGPIOS; i++)
+                if (pdata->gpio_en_mask & (1 << i))
+                        dev->lut[gpios++] = 1 << i;
+
+        if (gpios < 1) {
+                ret = -EINVAL;
+                goto err;
+        }
+
+        gc = &dev->gpio_chip;
+        gc->direction_input  = adp5520_gpio_direction_input;
+        gc->direction_output = adp5520_gpio_direction_output;
+        gc->get = adp5520_gpio_get_value;
+        gc->set = adp5520_gpio_set_value;
+        gc->can_sleep = 1;
+
+        gc->base = pdata->gpio_start;
+        gc->ngpio = gpios;
+        gc->label = pdev->name;
+        gc->owner = THIS_MODULE;
+
+        ret = adp5520_clr_bits(dev->master, GPIO_CFG_1,
+                pdata->gpio_en_mask);
+
+        if (pdata->gpio_en_mask & GPIO_C3)
+                ctl_mask |= C3_MODE;
+
+        if (pdata->gpio_en_mask & GPIO_R3)
+                ctl_mask |= R3_MODE;
+
+        if (ctl_mask)
+                ret = adp5520_set_bits(dev->master, LED_CONTROL,
+                        ctl_mask);
+
+        ret |= adp5520_set_bits(dev->master, GPIO_PULLUP,
+                pdata->gpio_pullup_mask);
+
+        if (ret) {
+                dev_err(&pdev->dev, "failed to write\n");
+                goto err;
+        }
+
+        ret = gpiochip_add(&dev->gpio_chip);
+        if (ret)
+                goto err;
+
+        platform_set_drvdata(pdev, dev);
+        return 0;
+
+err:
+        kfree(dev);
+        return ret;
+}
+
+static int __devexit adp5520_gpio_remove(struct platform_device *pdev)
+{
+        struct adp5520_gpio *dev;
+        int ret;
+
+        dev = platform_get_drvdata(pdev);
+        ret = gpiochip_remove(&dev->gpio_chip);
+        if (ret) {
+                dev_err(&pdev->dev, "%s failed, %d\n",
+                                "gpiochip_remove()", ret);
+                return ret;
+        }
+
+        kfree(dev);
+        return 0;
+}
+
+static struct platform_driver adp5520_gpio_driver = {
+        .driver = {
+                .name   = "adp5520-gpio",
+                .owner  = THIS_MODULE,
+        },
+        .probe          = adp5520_gpio_probe,
+        .remove         = __devexit_p(adp5520_gpio_remove),
+};
+
+static int __init adp5520_gpio_init(void)
+{
+        return platform_driver_register(&adp5520_gpio_driver);
+}
+module_init(adp5520_gpio_init);
+
+static void __exit adp5520_gpio_exit(void)
+{
+        platform_driver_unregister(&adp5520_gpio_driver);
+}
+module_exit(adp5520_gpio_exit);
+
+MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
+MODULE_DESCRIPTION("GPIO ADP5520 Driver");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:adp5520-gpio");
diff --git a/drivers/gpio/bt8xxgpio.c b/drivers/gpio/bt8xxgpio.c
index 984b587f0f96..2559f2289409 100644
--- a/drivers/gpio/bt8xxgpio.c
+++ b/drivers/gpio/bt8xxgpio.c
@@ -46,8 +46,7 @@
 #include <linux/module.h>
 #include <linux/pci.h>
 #include <linux/spinlock.h>
-
-#include <asm/gpio.h>
+#include <linux/gpio.h>
 
 /* Steal the hardware definitions from the bttv driver. */
 #include "../media/video/bt8xx/bt848.h"
@@ -331,13 +330,13 @@ static struct pci_driver bt8xxgpio_pci_driver = {
         .resume         = bt8xxgpio_resume,
 };
 
-static int bt8xxgpio_init(void)
+static int __init bt8xxgpio_init(void)
 {
         return pci_register_driver(&bt8xxgpio_pci_driver);
 }
 module_init(bt8xxgpio_init)
 
-static void bt8xxgpio_exit(void)
+static void __exit bt8xxgpio_exit(void)
 {
         pci_unregister_driver(&bt8xxgpio_pci_driver);
 }
diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c
index 51a8d4103be5..bb11a429394a 100644
--- a/drivers/gpio/gpiolib.c
+++ b/drivers/gpio/gpiolib.c
@@ -1,5 +1,6 @@
 #include <linux/kernel.h>
 #include <linux/module.h>
+#include <linux/interrupt.h>
 #include <linux/irq.h>
 #include <linux/spinlock.h>
 #include <linux/device.h>
@@ -7,6 +8,7 @@
 #include <linux/debugfs.h>
 #include <linux/seq_file.h>
 #include <linux/gpio.h>
+#include <linux/idr.h>
 
 
 /* Optional implementation infrastructure for GPIO interfaces.
@@ -49,6 +51,13 @@ struct gpio_desc {
 #define FLAG_RESERVED   2
 #define FLAG_EXPORT     3       /* protected by sysfs_lock */
 #define FLAG_SYSFS      4       /* exported via /sys/class/gpio/control */
+#define FLAG_TRIG_FALL  5       /* trigger on falling edge */
+#define FLAG_TRIG_RISE  6       /* trigger on rising edge */
+
+#define PDESC_ID_SHIFT  16      /* add new flags before this one */
+
+#define GPIO_FLAGS_MASK         ((1 << PDESC_ID_SHIFT) - 1)
+#define GPIO_TRIGGER_MASK       (BIT(FLAG_TRIG_FALL) | BIT(FLAG_TRIG_RISE))
 
 #ifdef CONFIG_DEBUG_FS
         const char              *label;
@@ -56,6 +65,15 @@ struct gpio_desc {
 };
 static struct gpio_desc gpio_desc[ARCH_NR_GPIOS];
 
+#ifdef CONFIG_GPIO_SYSFS
+struct poll_desc {
+        struct work_struct      work;
+        struct sysfs_dirent     *value_sd;
+};
+
+static struct idr pdesc_idr;
+#endif
+
 static inline void desc_set_label(struct gpio_desc *d, const char *label)
 {
 #ifdef CONFIG_DEBUG_FS
@@ -188,10 +206,10 @@ static DEFINE_MUTEX(sysfs_lock);
  *   /value
  *      * always readable, subject to hardware behavior
  *      * may be writable, as zero/nonzero
- *
- * REVISIT there will likely be an attribute for configuring async
- * notifications, e.g. to specify polling interval or IRQ trigger type
- * that would for example trigger a poll() on the "value".
+ *   /edge
+ *      * configures behavior of poll(2) on /value
+ *      * available only if pin can generate IRQs on input
+ *      * is read/write as "none", "falling", "rising", or "both"
  */
 
 static ssize_t gpio_direction_show(struct device *dev,
@@ -288,6 +306,175 @@ static ssize_t gpio_value_store(struct device *dev,
 static /*const*/ DEVICE_ATTR(value, 0644,
                 gpio_value_show, gpio_value_store);
 
+static irqreturn_t gpio_sysfs_irq(int irq, void *priv)
+{
+        struct work_struct      *work = priv;
+
+        schedule_work(work);
+        return IRQ_HANDLED;
+}
+
+static void gpio_notify_sysfs(struct work_struct *work)
+{
+        struct poll_desc        *pdesc;
+
+        pdesc = container_of(work, struct poll_desc, work);
+        sysfs_notify_dirent(pdesc->value_sd);
+}
+
+static int gpio_setup_irq(struct gpio_desc *desc, struct device *dev,
+                unsigned long gpio_flags)
+{
+        struct poll_desc        *pdesc;
+        unsigned long           irq_flags;
+        int                     ret, irq, id;
+
+        if ((desc->flags & GPIO_TRIGGER_MASK) == gpio_flags)
+                return 0;
+
+        irq = gpio_to_irq(desc - gpio_desc);
+        if (irq < 0)
+                return -EIO;
+
+        id = desc->flags >> PDESC_ID_SHIFT;
+        pdesc = idr_find(&pdesc_idr, id);
+        if (pdesc) {
+                free_irq(irq, &pdesc->work);
+                cancel_work_sync(&pdesc->work);
+        }
+
+        desc->flags &= ~GPIO_TRIGGER_MASK;
+
+        if (!gpio_flags) {
+                ret = 0;
+                goto free_sd;
+        }
+
+        irq_flags = IRQF_SHARED;
+        if (test_bit(FLAG_TRIG_FALL, &gpio_flags))
+                irq_flags |= IRQF_TRIGGER_FALLING;
+        if (test_bit(FLAG_TRIG_RISE, &gpio_flags))
+                irq_flags |= IRQF_TRIGGER_RISING;
+
+        if (!pdesc) {
+                pdesc = kmalloc(sizeof(*pdesc), GFP_KERNEL);
+                if (!pdesc) {
+                        ret = -ENOMEM;
+                        goto err_out;
+                }
+
+                do {
+                        ret = -ENOMEM;
+                        if (idr_pre_get(&pdesc_idr, GFP_KERNEL))
+                                ret = idr_get_new_above(&pdesc_idr,
+                                                pdesc, 1, &id);
+                } while (ret == -EAGAIN);
+
+                if (ret)
+                        goto free_mem;
+
+                desc->flags &= GPIO_FLAGS_MASK;
+                desc->flags |= (unsigned long)id << PDESC_ID_SHIFT;
+
+                if (desc->flags >> PDESC_ID_SHIFT != id) {
+                        ret = -ERANGE;
+                        goto free_id;
+                }
+
+                pdesc->value_sd = sysfs_get_dirent(dev->kobj.sd, "value");
+                if (!pdesc->value_sd) {
+                        ret = -ENODEV;
+                        goto free_id;
+                }
+                INIT_WORK(&pdesc->work, gpio_notify_sysfs);
+        }
+
+        ret = request_irq(irq, gpio_sysfs_irq, irq_flags,
+                        "gpiolib", &pdesc->work);
+        if (ret)
+                goto free_sd;
+
+        desc->flags |= gpio_flags;
+        return 0;
+
+free_sd:
+        sysfs_put(pdesc->value_sd);
+free_id:
+        idr_remove(&pdesc_idr, id);
+        desc->flags &= GPIO_FLAGS_MASK;
+free_mem:
+        kfree(pdesc);
+err_out:
+        return ret;
+}
+
+static const struct {
+        const char *name;
+        unsigned long flags;
+} trigger_types[] = {
+        { "none",    0 },
+        { "falling", BIT(FLAG_TRIG_FALL) },
+        { "rising",  BIT(FLAG_TRIG_RISE) },
+        { "both",    BIT(FLAG_TRIG_FALL) | BIT(FLAG_TRIG_RISE) },
+};
+
+static ssize_t gpio_edge_show(struct device *dev,
+                struct device_attribute *attr, char *buf)
+{
+        const struct gpio_desc  *desc = dev_get_drvdata(dev);
+        ssize_t                 status;
+
+        mutex_lock(&sysfs_lock);
+
+        if (!test_bit(FLAG_EXPORT, &desc->flags))
+                status = -EIO;
+        else {
+                int i;
+
+                status = 0;
+                for (i = 0; i < ARRAY_SIZE(trigger_types); i++)
+                        if ((desc->flags & GPIO_TRIGGER_MASK)
+                                        == trigger_types[i].flags) {
+                                status = sprintf(buf, "%s\n",
+                                                 trigger_types[i].name);
+                                break;
+                        }
+        }
+
+        mutex_unlock(&sysfs_lock);
+        return status;
+}
+
+static ssize_t gpio_edge_store(struct device *dev,
+                struct device_attribute *attr, const char *buf, size_t size)
+{
+        struct gpio_desc        *desc = dev_get_drvdata(dev);
+        ssize_t                 status;
+        int                     i;
+
+        for (i = 0; i < ARRAY_SIZE(trigger_types); i++)
+                if (sysfs_streq(trigger_types[i].name, buf))
+                        goto found;
+        return -EINVAL;
+
+found:
+        mutex_lock(&sysfs_lock);
+
+        if (!test_bit(FLAG_EXPORT, &desc->flags))
+                status = -EIO;
+        else {
+                status = gpio_setup_irq(desc, dev, trigger_types[i].flags);
+                if (!status)
+                        status = size;
+        }
+
+        mutex_unlock(&sysfs_lock);
+
+        return status;
+}
+
+static DEVICE_ATTR(edge, 0644, gpio_edge_show, gpio_edge_store);
+
 static const struct attribute *gpio_attrs[] = {
         &dev_attr_direction.attr,
         &dev_attr_value.attr,
@@ -473,7 +660,7 @@ int gpio_export(unsigned gpio, bool direction_may_change)
                 struct device   *dev;
 
                 dev = device_create(&gpio_class, desc->chip->dev, MKDEV(0, 0),
-                                    desc, ioname ? ioname : "gpio%d", gpio);
+                                desc, ioname ? ioname : "gpio%d", gpio);
                 if (dev) {
                         if (direction_may_change)
                                 status = sysfs_create_group(&dev->kobj,
@@ -481,6 +668,14 @@ int gpio_export(unsigned gpio, bool direction_may_change)
                         else
                                 status = device_create_file(dev,
                                                 &dev_attr_value);
+
+                        if (!status && gpio_to_irq(gpio) >= 0
+                                        && (direction_may_change
+                                                || !test_bit(FLAG_IS_OUT,
+                                                        &desc->flags)))
+                                status = device_create_file(dev,
+                                                &dev_attr_edge);
+
                         if (status != 0)
                                 device_unregister(dev);
                 } else
@@ -505,6 +700,51 @@ static int match_export(struct device *dev, void *data)
 }
 
 /**
+ * gpio_export_link - create a sysfs link to an exported GPIO node
+ * @dev: device under which to create symlink
+ * @name: name of the symlink
+ * @gpio: gpio to create symlink to, already exported
+ *
+ * Set up a symlink from /sys/.../dev/name to /sys/class/gpio/gpioN
+ * node. Caller is responsible for unlinking.
+ *
+ * Returns zero on success, else an error.
+ */
+int gpio_export_link(struct device *dev, const char *name, unsigned gpio)
+{
+        struct gpio_desc        *desc;
+        int                     status = -EINVAL;
+
+        if (!gpio_is_valid(gpio))
+                goto done;
+
+        mutex_lock(&sysfs_lock);
+
+        desc = &gpio_desc[gpio];
+
+        if (test_bit(FLAG_EXPORT, &desc->flags)) {
+                struct device *tdev;
+
+                tdev = class_find_device(&gpio_class, NULL, desc, match_export);
+                if (tdev != NULL) {
+                        status = sysfs_create_link(&dev->kobj, &tdev->kobj,
+                                                name);
+                } else {
+                        status = -ENODEV;
+                }
+        }
+
+        mutex_unlock(&sysfs_lock);
+
+done:
+        if (status)
+                pr_debug("%s: gpio%d status %d\n", __func__, gpio, status);
+
+        return status;
+}
+EXPORT_SYMBOL_GPL(gpio_export_link);
+
+/**
  * gpio_unexport - reverse effect of gpio_export()
  * @gpio: gpio to make unavailable
  *
@@ -527,6 +767,7 @@ void gpio_unexport(unsigned gpio)
 
                 dev = class_find_device(&gpio_class, NULL, desc, match_export);
                 if (dev) {
+                        gpio_setup_irq(desc, dev, 0);
                         clear_bit(FLAG_EXPORT, &desc->flags);
                         put_device(dev);
                         device_unregister(dev);
@@ -611,6 +852,8 @@ static int __init gpiolib_sysfs_init(void)
         unsigned long   flags;
         unsigned        gpio;
 
+        idr_init(&pdesc_idr);
+
         status = class_register(&gpio_class);
         if (status < 0)
                 return status;
diff --git a/drivers/gpio/langwell_gpio.c b/drivers/gpio/langwell_gpio.c
new file mode 100644
index 000000000000..5711ce5353c6
--- /dev/null
+++ b/drivers/gpio/langwell_gpio.c
@@ -0,0 +1,297 @@
+/* langwell_gpio.c Moorestown platform Langwell chip GPIO driver
+ * Copyright (c) 2008 - 2009,  Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+/* Supports:
+ * Moorestown platform Langwell chip.
+ */
+
+#include <linux/module.h>
+#include <linux/pci.h>
+#include <linux/kernel.h>
+#include <linux/delay.h>
+#include <linux/stddef.h>
+#include <linux/interrupt.h>
+#include <linux/init.h>
+#include <linux/irq.h>
+#include <linux/io.h>
+#include <linux/gpio.h>
+
+struct lnw_gpio_register {
+        u32     GPLR[2];
+        u32     GPDR[2];
+        u32     GPSR[2];
+        u32     GPCR[2];
+        u32     GRER[2];
+        u32     GFER[2];
+        u32     GEDR[2];
+};
+
+struct lnw_gpio {
+        struct gpio_chip                chip;
+        struct lnw_gpio_register        *reg_base;
+        spinlock_t                      lock;
+        unsigned                        irq_base;
+};
+
+static int lnw_gpio_get(struct gpio_chip *chip, unsigned offset)
+{
+        struct lnw_gpio *lnw = container_of(chip, struct lnw_gpio, chip);
+        u8 reg = offset / 32;
+        void __iomem *gplr;
+
+        gplr = (void __iomem *)(&lnw->reg_base->GPLR[reg]);
+        return readl(gplr) & BIT(offset % 32);
+}
+
+static void lnw_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
+{
+        struct lnw_gpio *lnw = container_of(chip, struct lnw_gpio, chip);
+        u8 reg = offset / 32;
+        void __iomem *gpsr, *gpcr;
+
+        if (value) {
+                gpsr = (void __iomem *)(&lnw->reg_base->GPSR[reg]);
+                writel(BIT(offset % 32), gpsr);
+        } else {
+                gpcr = (void __iomem *)(&lnw->reg_base->GPCR[reg]);
+                writel(BIT(offset % 32), gpcr);
+        }
+}
+
+static int lnw_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
+{
+        struct lnw_gpio *lnw = container_of(chip, struct lnw_gpio, chip);
+        u8 reg = offset / 32;
+        u32 value;
+        unsigned long flags;
+        void __iomem *gpdr;
+
+        gpdr = (void __iomem *)(&lnw->reg_base->GPDR[reg]);
+        spin_lock_irqsave(&lnw->lock, flags);
+        value = readl(gpdr);
+        value &= ~BIT(offset % 32);
+        writel(value, gpdr);
+        spin_unlock_irqrestore(&lnw->lock, flags);
+        return 0;
+}
+
+static int lnw_gpio_direction_output(struct gpio_chip *chip,
+                        unsigned offset, int value)
+{
+        struct lnw_gpio *lnw = container_of(chip, struct lnw_gpio, chip);
+        u8 reg = offset / 32;
+        unsigned long flags;
+        void __iomem *gpdr;
+
+        lnw_gpio_set(chip, offset, value);
+        gpdr = (void __iomem *)(&lnw->reg_base->GPDR[reg]);
+        spin_lock_irqsave(&lnw->lock, flags);
+        value = readl(gpdr);
+        value |= BIT(offset % 32);;
+        writel(value, gpdr);
+        spin_unlock_irqrestore(&lnw->lock, flags);
+        return 0;
+}
+
+static int lnw_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
+{
+        struct lnw_gpio *lnw = container_of(chip, struct lnw_gpio, chip);
+        return lnw->irq_base + offset;
+}
+
+static int lnw_irq_type(unsigned irq, unsigned type)
+{
+        struct lnw_gpio *lnw = get_irq_chip_data(irq);
+        u32 gpio = irq - lnw->irq_base;
+        u8 reg = gpio / 32;
+        unsigned long flags;
+        u32 value;
+        void __iomem *grer = (void __iomem *)(&lnw->reg_base->GRER[reg]);
+        void __iomem *gfer = (void __iomem *)(&lnw->reg_base->GFER[reg]);
+
+        if (gpio < 0 || gpio > lnw->chip.ngpio)
+                return -EINVAL;
+        spin_lock_irqsave(&lnw->lock, flags);
+        if (type & IRQ_TYPE_EDGE_RISING)
+                value = readl(grer) | BIT(gpio % 32);
+        else
+                value = readl(grer) & (~BIT(gpio % 32));
+        writel(value, grer);
+
+        if (type & IRQ_TYPE_EDGE_FALLING)
+                value = readl(gfer) | BIT(gpio % 32);
+        else
+                value = readl(gfer) & (~BIT(gpio % 32));
+        writel(value, gfer);
+        spin_unlock_irqrestore(&lnw->lock, flags);
+
+        return 0;
+};
+
+static void lnw_irq_unmask(unsigned irq)
+{
+        struct lnw_gpio *lnw = get_irq_chip_data(irq);
+        u32 gpio = irq - lnw->irq_base;
+        u8 reg = gpio / 32;
+        void __iomem *gedr;
+
+        gedr = (void __iomem *)(&lnw->reg_base->GEDR[reg]);
+        writel(BIT(gpio % 32), gedr);
+};
+
+static void lnw_irq_mask(unsigned irq)
+{
+};
+
+static struct irq_chip lnw_irqchip = {
+        .name           = "LNW-GPIO",
+        .mask           = lnw_irq_mask,
+        .unmask         = lnw_irq_unmask,
+        .set_type       = lnw_irq_type,
+};
+
+static struct pci_device_id lnw_gpio_ids[] = {
+        { PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x080f) },
+        { 0, }
+};
+MODULE_DEVICE_TABLE(pci, lnw_gpio_ids);
+
+static void lnw_irq_handler(unsigned irq, struct irq_desc *desc)
+{
+        struct lnw_gpio *lnw = (struct lnw_gpio *)get_irq_data(irq);
+        u32 reg, gpio;
+        void __iomem *gedr;
+        u32 gedr_v;
+
+        /* check GPIO controller to check which pin triggered the interrupt */
+        for (reg = 0; reg < lnw->chip.ngpio / 32; reg++) {
+                gedr = (void __iomem *)(&lnw->reg_base->GEDR[reg]);
+                gedr_v = readl(gedr);
+                if (!gedr_v)
+                        continue;
+                for (gpio = reg*32; gpio < reg*32+32; gpio++) {
+                        gedr_v = readl(gedr);
+                        if (gedr_v & BIT(gpio % 32)) {
+                                pr_debug("pin %d triggered\n", gpio);
+                                generic_handle_irq(lnw->irq_base + gpio);
+                        }
+                }
+                /* clear the edge detect status bit */
+                writel(gedr_v, gedr);
+        }
+        desc->chip->eoi(irq);
+}
+
+static int __devinit lnw_gpio_probe(struct pci_dev *pdev,
+                        const struct pci_device_id *id)
+{
+        void *base;
+        int i;
+        resource_size_t start, len;
+        struct lnw_gpio *lnw;
+        u32 irq_base;
+        u32 gpio_base;
+        int retval = 0;
+
+        retval = pci_enable_device(pdev);
+        if (retval)
+                goto done;
+
+        retval = pci_request_regions(pdev, "langwell_gpio");
+        if (retval) {
+                dev_err(&pdev->dev, "error requesting resources\n");
+                goto err2;
+        }
+        /* get the irq_base from bar1 */
+        start = pci_resource_start(pdev, 1);
+        len = pci_resource_len(pdev, 1);
+        base = ioremap_nocache(start, len);
+        if (!base) {
+                dev_err(&pdev->dev, "error mapping bar1\n");
+                goto err3;
+        }
+        irq_base = *(u32 *)base;
+        gpio_base = *((u32 *)base + 1);
+        /* release the IO mapping, since we already get the info from bar1 */
+        iounmap(base);
+        /* get the register base from bar0 */
+        start = pci_resource_start(pdev, 0);
+        len = pci_resource_len(pdev, 0);
+        base = ioremap_nocache(start, len);
+        if (!base) {
+                dev_err(&pdev->dev, "error mapping bar0\n");
+                retval = -EFAULT;
+                goto err3;
+        }
+
+        lnw = kzalloc(sizeof(struct lnw_gpio), GFP_KERNEL);
+        if (!lnw) {
+                dev_err(&pdev->dev, "can't allocate langwell_gpio chip data\n");
+                retval = -ENOMEM;
+                goto err4;
+        }
+        lnw->reg_base = base;
+        lnw->irq_base = irq_base;
+        lnw->chip.label = dev_name(&pdev->dev);
+        lnw->chip.direction_input = lnw_gpio_direction_input;
+        lnw->chip.direction_output = lnw_gpio_direction_output;
+        lnw->chip.get = lnw_gpio_get;
+        lnw->chip.set = lnw_gpio_set;
+        lnw->chip.to_irq = lnw_gpio_to_irq;
+        lnw->chip.base = gpio_base;
+        lnw->chip.ngpio = 64;
+        lnw->chip.can_sleep = 0;
+        pci_set_drvdata(pdev, lnw);
+        retval = gpiochip_add(&lnw->chip);
+        if (retval) {
+                dev_err(&pdev->dev, "langwell gpiochip_add error %d\n", retval);
+                goto err5;
+        }
+        set_irq_data(pdev->irq, lnw);
+        set_irq_chained_handler(pdev->irq, lnw_irq_handler);
+        for (i = 0; i < lnw->chip.ngpio; i++) {
+                set_irq_chip_and_handler_name(i + lnw->irq_base, &lnw_irqchip,
+                                        handle_simple_irq, "demux");
+                set_irq_chip_data(i + lnw->irq_base, lnw);
+        }
+
+        spin_lock_init(&lnw->lock);
+        goto done;
+err5:
+        kfree(lnw);
+err4:
+        iounmap(base);
+err3:
+        pci_release_regions(pdev);
+err2:
+        pci_disable_device(pdev);
+done:
+        return retval;
+}
+
+static struct pci_driver lnw_gpio_driver = {
+        .name           = "langwell_gpio",
+        .id_table       = lnw_gpio_ids,
+        .probe          = lnw_gpio_probe,
+};
+
+static int __init lnw_gpio_init(void)
+{
+        return pci_register_driver(&lnw_gpio_driver);
+}
+
+device_initcall(lnw_gpio_init);
diff --git a/drivers/gpio/max7301.c b/drivers/gpio/max7301.c
index 7b82eaae2621..480956f1ca50 100644
--- a/drivers/gpio/max7301.c
+++ b/drivers/gpio/max7301.c
@@ -339,3 +339,4 @@ module_exit(max7301_exit);
 MODULE_AUTHOR("Juergen Beisert");
 MODULE_LICENSE("GPL v2");
 MODULE_DESCRIPTION("MAX7301 SPI based GPIO-Expander");
+MODULE_ALIAS("spi:" DRIVER_NAME);
diff --git a/drivers/gpio/mc33880.c b/drivers/gpio/mc33880.c
new file mode 100644
index 000000000000..e7d01bd8fdb3
--- /dev/null
+++ b/drivers/gpio/mc33880.c
@@ -0,0 +1,196 @@
+/*
+ * mc33880.c MC33880 high-side/low-side switch GPIO driver
+ * Copyright (c) 2009 Intel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+/* Supports:
+ * Freescale MC33880 high-side/low-side switch
+ */
+
+#include <linux/init.h>
+#include <linux/mutex.h>
+#include <linux/spi/spi.h>
+#include <linux/spi/mc33880.h>
+#include <linux/gpio.h>
+
+#define DRIVER_NAME "mc33880"
+
+/*
+ * Pin configurations, see MAX7301 datasheet page 6
+ */
+#define PIN_CONFIG_MASK 0x03
+#define PIN_CONFIG_IN_PULLUP 0x03
+#define PIN_CONFIG_IN_WO_PULLUP 0x02
+#define PIN_CONFIG_OUT 0x01
+
+#define PIN_NUMBER 8
+
+
+/*
+ * Some registers must be read back to modify.
+ * To save time we cache them here in memory
+ */
+struct mc33880 {
+        struct mutex    lock;   /* protect from simultanous accesses */
+        u8              port_config;
+        struct gpio_chip chip;
+        struct spi_device *spi;
+};
+
+static int mc33880_write_config(struct mc33880 *mc)
+{
+        return spi_write(mc->spi, &mc->port_config, sizeof(mc->port_config));
+}
+
+
+static int __mc33880_set(struct mc33880 *mc, unsigned offset, int value)
+{
+        if (value)
+                mc->port_config |= 1 << offset;
+        else
+                mc->port_config &= ~(1 << offset);
+
+        return mc33880_write_config(mc);
+}
+
+
+static void mc33880_set(struct gpio_chip *chip, unsigned offset, int value)
+{
+        struct mc33880 *mc = container_of(chip, struct mc33880, chip);
+
+        mutex_lock(&mc->lock);
+
+        __mc33880_set(mc, offset, value);
+
+        mutex_unlock(&mc->lock);
+}
+
+static int __devinit mc33880_probe(struct spi_device *spi)
+{
+        struct mc33880 *mc;
+        struct mc33880_platform_data *pdata;
+        int ret;
+
+        pdata = spi->dev.platform_data;
+        if (!pdata || !pdata->base) {
+                dev_dbg(&spi->dev, "incorrect or missing platform data\n");
+                return -EINVAL;
+        }
+
+        /*
+         * bits_per_word cannot be configured in platform data
+         */
+        spi->bits_per_word = 8;
+
+        ret = spi_setup(spi);
+        if (ret < 0)
+                return ret;
+
+        mc = kzalloc(sizeof(struct mc33880), GFP_KERNEL);
+        if (!mc)
+                return -ENOMEM;
+
+        mutex_init(&mc->lock);
+
+        dev_set_drvdata(&spi->dev, mc);
+
+        mc->spi = spi;
+
+        mc->chip.label = DRIVER_NAME,
+        mc->chip.set = mc33880_set;
+        mc->chip.base = pdata->base;
+        mc->chip.ngpio = PIN_NUMBER;
+        mc->chip.can_sleep = 1;
+        mc->chip.dev = &spi->dev;
+        mc->chip.owner = THIS_MODULE;
+
+        mc->port_config = 0x00;
+        /* write twice, because during initialisation the first setting
+         * is just for testing SPI communication, and the second is the
+         * "real" configuration
+         */
+        ret = mc33880_write_config(mc);
+        mc->port_config = 0x00;
+        if (!ret)
+                ret = mc33880_write_config(mc);
+
+        if (ret) {
+                printk(KERN_ERR "Failed writing to " DRIVER_NAME ": %d\n", ret);
+                goto exit_destroy;
+        }
+
+        ret = gpiochip_add(&mc->chip);
+        if (ret)
+                goto exit_destroy;
+
+        return ret;
+
+exit_destroy:
+        dev_set_drvdata(&spi->dev, NULL);
+        mutex_destroy(&mc->lock);
+        kfree(mc);
+        return ret;
+}
+
+static int mc33880_remove(struct spi_device *spi)
+{
+        struct mc33880 *mc;
+        int ret;
+
+        mc = dev_get_drvdata(&spi->dev);
+        if (mc == NULL)
+                return -ENODEV;
+
+        dev_set_drvdata(&spi->dev, NULL);
+
+        ret = gpiochip_remove(&mc->chip);
+        if (!ret) {
+                mutex_destroy(&mc->lock);
+                kfree(mc);
+        } else
+                dev_err(&spi->dev, "Failed to remove the GPIO controller: %d\n",
+                        ret);
+
+        return ret;
+}
+
+static struct spi_driver mc33880_driver = {
+        .driver = {
+                .name           = DRIVER_NAME,
+                .owner          = THIS_MODULE,
+        },
+        .probe          = mc33880_probe,
+        .remove         = __devexit_p(mc33880_remove),
+};
+
+static int __init mc33880_init(void)
+{
+        return spi_register_driver(&mc33880_driver);
+}
+/* register after spi postcore initcall and before
+ * subsys initcalls that may rely on these GPIOs
+ */
+subsys_initcall(mc33880_init);
+
+static void __exit mc33880_exit(void)
+{
+        spi_unregister_driver(&mc33880_driver);
+}
+module_exit(mc33880_exit);
+
+MODULE_AUTHOR("Mocean Laboratories <info@mocean-labs.com>");
+MODULE_LICENSE("GPL v2");
+
diff --git a/drivers/gpio/mcp23s08.c b/drivers/gpio/mcp23s08.c
index f6fae0e50e65..cd651ec8d034 100644
--- a/drivers/gpio/mcp23s08.c
+++ b/drivers/gpio/mcp23s08.c
@@ -6,12 +6,10 @@
 #include <linux/device.h>
 #include <linux/workqueue.h>
 #include <linux/mutex.h>
-
+#include <linux/gpio.h>
 #include <linux/spi/spi.h>
 #include <linux/spi/mcp23s08.h>
 
-#include <asm/gpio.h>
-
 
 /* Registers are all 8 bits wide.
  *
@@ -433,3 +431,4 @@ static void __exit mcp23s08_exit(void)
 module_exit(mcp23s08_exit);
 
 MODULE_LICENSE("GPL");
+MODULE_ALIAS("spi:mcp23s08");
diff --git a/drivers/gpio/pca953x.c b/drivers/gpio/pca953x.c
index cdb6574d25a6..6a2fb3fbb3d9 100644
--- a/drivers/gpio/pca953x.c
+++ b/drivers/gpio/pca953x.c
@@ -13,6 +13,7 @@
 
 #include <linux/module.h>
 #include <linux/init.h>
+#include <linux/gpio.h>
 #include <linux/i2c.h>
 #include <linux/i2c/pca953x.h>
 #ifdef CONFIG_OF_GPIO
@@ -20,8 +21,6 @@
 #include <linux/of_gpio.h>
 #endif
 
-#include <asm/gpio.h>
-
 #define PCA953X_INPUT          0
 #define PCA953X_OUTPUT         1
 #define PCA953X_INVERT         2
@@ -40,6 +39,7 @@ static const struct i2c_device_id pca953x_id[] = {
         { "pca9557", 8, },
 
         { "max7310", 8, },
+        { "max7315", 8, },
         { "pca6107", 8, },
         { "tca6408", 8, },
         { "tca6416", 16, },
diff --git a/drivers/gpio/pcf857x.c b/drivers/gpio/pcf857x.c
index 9525724be731..29f19ce3e80f 100644
--- a/drivers/gpio/pcf857x.c
+++ b/drivers/gpio/pcf857x.c
@@ -20,14 +20,14 @@
 
 #include <linux/kernel.h>
 #include <linux/slab.h>
+#include <linux/gpio.h>
 #include <linux/i2c.h>
 #include <linux/i2c/pcf857x.h>
 
-#include <asm/gpio.h>
-
 
 static const struct i2c_device_id pcf857x_id[] = {
         { "pcf8574", 8 },
+        { "pcf8574a", 8 },
         { "pca8574", 8 },
         { "pca9670", 8 },
         { "pca9672", 8 },
diff --git a/drivers/gpio/ucb1400_gpio.c b/drivers/gpio/ucb1400_gpio.c
new file mode 100644
index 000000000000..50e6bd1392ce
--- /dev/null
+++ b/drivers/gpio/ucb1400_gpio.c
@@ -0,0 +1,125 @@
+/*
+ * Philips UCB1400 GPIO driver
+ *
+ * Author: Marek Vasut <marek.vasut@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/ucb1400.h>
+
+struct ucb1400_gpio_data *ucbdata;
+
+static int ucb1400_gpio_dir_in(struct gpio_chip *gc, unsigned off)
+{
+        struct ucb1400_gpio *gpio;
+        gpio = container_of(gc, struct ucb1400_gpio, gc);
+        ucb1400_gpio_set_direction(gpio->ac97, off, 0);
+        return 0;
+}
+
+static int ucb1400_gpio_dir_out(struct gpio_chip *gc, unsigned off, int val)
+{
+        struct ucb1400_gpio *gpio;
+        gpio = container_of(gc, struct ucb1400_gpio, gc);
+        ucb1400_gpio_set_direction(gpio->ac97, off, 1);
+        ucb1400_gpio_set_value(gpio->ac97, off, val);
+        return 0;
+}
+
+static int ucb1400_gpio_get(struct gpio_chip *gc, unsigned off)
+{
+        struct ucb1400_gpio *gpio;
+        gpio = container_of(gc, struct ucb1400_gpio, gc);
+        return ucb1400_gpio_get_value(gpio->ac97, off);
+}
+
+static void ucb1400_gpio_set(struct gpio_chip *gc, unsigned off, int val)
+{
+        struct ucb1400_gpio *gpio;
+        gpio = container_of(gc, struct ucb1400_gpio, gc);
+        ucb1400_gpio_set_value(gpio->ac97, off, val);
+}
+
+static int ucb1400_gpio_probe(struct platform_device *dev)
+{
+        struct ucb1400_gpio *ucb = dev->dev.platform_data;
+        int err = 0;
+
+        if (!(ucbdata && ucbdata->gpio_offset)) {
+                err = -EINVAL;
+                goto err;
+        }
+
+        platform_set_drvdata(dev, ucb);
+
+        ucb->gc.label = "ucb1400_gpio";
+        ucb->gc.base = ucbdata->gpio_offset;
+        ucb->gc.ngpio = 10;
+        ucb->gc.owner = THIS_MODULE;
+
+        ucb->gc.direction_input = ucb1400_gpio_dir_in;
+        ucb->gc.direction_output = ucb1400_gpio_dir_out;
+        ucb->gc.get = ucb1400_gpio_get;
+        ucb->gc.set = ucb1400_gpio_set;
+        ucb->gc.can_sleep = 1;
+
+        err = gpiochip_add(&ucb->gc);
+        if (err)
+                goto err;
+
+        if (ucbdata && ucbdata->gpio_setup)
+                err = ucbdata->gpio_setup(&dev->dev, ucb->gc.ngpio);
+
+err:
+        return err;
+
+}
+
+static int ucb1400_gpio_remove(struct platform_device *dev)
+{
+        int err = 0;
+        struct ucb1400_gpio *ucb = platform_get_drvdata(dev);
+
+        if (ucbdata && ucbdata->gpio_teardown) {
+                err = ucbdata->gpio_teardown(&dev->dev, ucb->gc.ngpio);
+                if (err)
+                        return err;
+        }
+
+        err = gpiochip_remove(&ucb->gc);
+        return err;
+}
+
+static struct platform_driver ucb1400_gpio_driver = {
+        .probe  = ucb1400_gpio_probe,
+        .remove = ucb1400_gpio_remove,
+        .driver = {
+                .name   = "ucb1400_gpio"
+        },
+};
+
+static int __init ucb1400_gpio_init(void)
+{
+        return platform_driver_register(&ucb1400_gpio_driver);
+}
+
+static void __exit ucb1400_gpio_exit(void)
+{
+        platform_driver_unregister(&ucb1400_gpio_driver);
+}
+
+void __init ucb1400_gpio_set_data(struct ucb1400_gpio_data *data)
+{
+        ucbdata = data;
+}
+
+module_init(ucb1400_gpio_init);
+module_exit(ucb1400_gpio_exit);
+
+MODULE_DESCRIPTION("Philips UCB1400 GPIO driver");
+MODULE_LICENSE("GPL");