diff options
Diffstat (limited to 'drivers/gpio')
-rw-r--r-- | drivers/gpio/Kconfig | 26 | ||||
-rw-r--r-- | drivers/gpio/Makefile | 5 | ||||
-rw-r--r-- | drivers/gpio/janz-ttl.c | 258 | ||||
-rw-r--r-- | drivers/gpio/rdc321x-gpio.c | 246 | ||||
-rw-r--r-- | drivers/gpio/tc35892-gpio.c | 381 |
5 files changed, 915 insertions, 1 deletions
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 4fd0f276df5a..724038dab4ca 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig | |||
@@ -195,6 +195,13 @@ config GPIO_PCF857X | |||
195 | This driver provides an in-kernel interface to those GPIOs using | 195 | This driver provides an in-kernel interface to those GPIOs using |
196 | platform-neutral GPIO calls. | 196 | platform-neutral GPIO calls. |
197 | 197 | ||
198 | config GPIO_TC35892 | ||
199 | bool "TC35892 GPIOs" | ||
200 | depends on MFD_TC35892 | ||
201 | help | ||
202 | This enables support for the GPIOs found on the TC35892 | ||
203 | I/O Expander. | ||
204 | |||
198 | config GPIO_TWL4030 | 205 | config GPIO_TWL4030 |
199 | tristate "TWL4030, TWL5030, and TPS659x0 GPIOs" | 206 | tristate "TWL4030, TWL5030, and TPS659x0 GPIOs" |
200 | depends on TWL4030_CORE | 207 | depends on TWL4030_CORE |
@@ -282,6 +289,15 @@ config GPIO_TIMBERDALE | |||
282 | ---help--- | 289 | ---help--- |
283 | Add support for the GPIO IP in the timberdale FPGA. | 290 | Add support for the GPIO IP in the timberdale FPGA. |
284 | 291 | ||
292 | config GPIO_RDC321X | ||
293 | tristate "RDC R-321x GPIO support" | ||
294 | depends on PCI && GPIOLIB | ||
295 | select MFD_CORE | ||
296 | select MFD_RDC321X | ||
297 | help | ||
298 | Support for the RDC R321x SoC GPIOs over southbridge | ||
299 | PCI configuration space. | ||
300 | |||
285 | comment "SPI GPIO expanders:" | 301 | comment "SPI GPIO expanders:" |
286 | 302 | ||
287 | config GPIO_MAX7301 | 303 | config GPIO_MAX7301 |
@@ -317,4 +333,14 @@ config GPIO_UCB1400 | |||
317 | To compile this driver as a module, choose M here: the | 333 | To compile this driver as a module, choose M here: the |
318 | module will be called ucb1400_gpio. | 334 | module will be called ucb1400_gpio. |
319 | 335 | ||
336 | comment "MODULbus GPIO expanders:" | ||
337 | |||
338 | config GPIO_JANZ_TTL | ||
339 | tristate "Janz VMOD-TTL Digital IO Module" | ||
340 | depends on MFD_JANZ_CMODIO | ||
341 | help | ||
342 | This enables support for the Janz VMOD-TTL Digital IO module. | ||
343 | This driver provides support for driving the pins in output | ||
344 | mode only. Input mode is not supported. | ||
345 | |||
320 | endif | 346 | endif |
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index 10f3f8d958b1..51c3cdd41b5a 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile | |||
@@ -16,6 +16,7 @@ obj-$(CONFIG_GPIO_MCP23S08) += mcp23s08.o | |||
16 | obj-$(CONFIG_GPIO_PCA953X) += pca953x.o | 16 | obj-$(CONFIG_GPIO_PCA953X) += pca953x.o |
17 | obj-$(CONFIG_GPIO_PCF857X) += pcf857x.o | 17 | obj-$(CONFIG_GPIO_PCF857X) += pcf857x.o |
18 | obj-$(CONFIG_GPIO_PL061) += pl061.o | 18 | obj-$(CONFIG_GPIO_PL061) += pl061.o |
19 | obj-$(CONFIG_GPIO_TC35892) += tc35892-gpio.o | ||
19 | obj-$(CONFIG_GPIO_TIMBERDALE) += timbgpio.o | 20 | obj-$(CONFIG_GPIO_TIMBERDALE) += timbgpio.o |
20 | obj-$(CONFIG_GPIO_TWL4030) += twl4030-gpio.o | 21 | obj-$(CONFIG_GPIO_TWL4030) += twl4030-gpio.o |
21 | obj-$(CONFIG_GPIO_UCB1400) += ucb1400_gpio.o | 22 | obj-$(CONFIG_GPIO_UCB1400) += ucb1400_gpio.o |
@@ -27,4 +28,6 @@ obj-$(CONFIG_GPIO_VR41XX) += vr41xx_giu.o | |||
27 | obj-$(CONFIG_GPIO_WM831X) += wm831x-gpio.o | 28 | obj-$(CONFIG_GPIO_WM831X) += wm831x-gpio.o |
28 | obj-$(CONFIG_GPIO_WM8350) += wm8350-gpiolib.o | 29 | obj-$(CONFIG_GPIO_WM8350) += wm8350-gpiolib.o |
29 | obj-$(CONFIG_GPIO_WM8994) += wm8994-gpio.o | 30 | obj-$(CONFIG_GPIO_WM8994) += wm8994-gpio.o |
30 | obj-$(CONFIG_GPIO_SCH) += sch_gpio.o \ No newline at end of file | 31 | obj-$(CONFIG_GPIO_SCH) += sch_gpio.o |
32 | obj-$(CONFIG_GPIO_RDC321X) += rdc321x-gpio.o | ||
33 | obj-$(CONFIG_GPIO_JANZ_TTL) += janz-ttl.o | ||
diff --git a/drivers/gpio/janz-ttl.c b/drivers/gpio/janz-ttl.c new file mode 100644 index 000000000000..813ac077e5d7 --- /dev/null +++ b/drivers/gpio/janz-ttl.c | |||
@@ -0,0 +1,258 @@ | |||
1 | /* | ||
2 | * Janz MODULbus VMOD-TTL GPIO Driver | ||
3 | * | ||
4 | * Copyright (c) 2010 Ira W. Snyder <iws@ovro.caltech.edu> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify it | ||
7 | * under the terms of the GNU General Public License as published by the | ||
8 | * Free Software Foundation; either version 2 of the License, or (at your | ||
9 | * option) any later version. | ||
10 | */ | ||
11 | |||
12 | #include <linux/kernel.h> | ||
13 | #include <linux/module.h> | ||
14 | #include <linux/init.h> | ||
15 | #include <linux/interrupt.h> | ||
16 | #include <linux/delay.h> | ||
17 | #include <linux/platform_device.h> | ||
18 | #include <linux/io.h> | ||
19 | #include <linux/gpio.h> | ||
20 | #include <linux/slab.h> | ||
21 | |||
22 | #include <linux/mfd/janz.h> | ||
23 | |||
24 | #define DRV_NAME "janz-ttl" | ||
25 | |||
26 | #define PORTA_DIRECTION 0x23 | ||
27 | #define PORTB_DIRECTION 0x2B | ||
28 | #define PORTC_DIRECTION 0x06 | ||
29 | #define PORTA_IOCTL 0x24 | ||
30 | #define PORTB_IOCTL 0x2C | ||
31 | #define PORTC_IOCTL 0x07 | ||
32 | |||
33 | #define MASTER_INT_CTL 0x00 | ||
34 | #define MASTER_CONF_CTL 0x01 | ||
35 | |||
36 | #define CONF_PAE (1 << 2) | ||
37 | #define CONF_PBE (1 << 7) | ||
38 | #define CONF_PCE (1 << 4) | ||
39 | |||
40 | struct ttl_control_regs { | ||
41 | __be16 portc; | ||
42 | __be16 portb; | ||
43 | __be16 porta; | ||
44 | __be16 control; | ||
45 | }; | ||
46 | |||
47 | struct ttl_module { | ||
48 | struct gpio_chip gpio; | ||
49 | |||
50 | /* base address of registers */ | ||
51 | struct ttl_control_regs __iomem *regs; | ||
52 | |||
53 | u8 portc_shadow; | ||
54 | u8 portb_shadow; | ||
55 | u8 porta_shadow; | ||
56 | |||
57 | spinlock_t lock; | ||
58 | }; | ||
59 | |||
60 | static int ttl_get_value(struct gpio_chip *gpio, unsigned offset) | ||
61 | { | ||
62 | struct ttl_module *mod = dev_get_drvdata(gpio->dev); | ||
63 | u8 *shadow; | ||
64 | int ret; | ||
65 | |||
66 | if (offset < 8) { | ||
67 | shadow = &mod->porta_shadow; | ||
68 | } else if (offset < 16) { | ||
69 | shadow = &mod->portb_shadow; | ||
70 | offset -= 8; | ||
71 | } else { | ||
72 | shadow = &mod->portc_shadow; | ||
73 | offset -= 16; | ||
74 | } | ||
75 | |||
76 | spin_lock(&mod->lock); | ||
77 | ret = *shadow & (1 << offset); | ||
78 | spin_unlock(&mod->lock); | ||
79 | return ret; | ||
80 | } | ||
81 | |||
82 | static void ttl_set_value(struct gpio_chip *gpio, unsigned offset, int value) | ||
83 | { | ||
84 | struct ttl_module *mod = dev_get_drvdata(gpio->dev); | ||
85 | void __iomem *port; | ||
86 | u8 *shadow; | ||
87 | |||
88 | if (offset < 8) { | ||
89 | port = &mod->regs->porta; | ||
90 | shadow = &mod->porta_shadow; | ||
91 | } else if (offset < 16) { | ||
92 | port = &mod->regs->portb; | ||
93 | shadow = &mod->portb_shadow; | ||
94 | offset -= 8; | ||
95 | } else { | ||
96 | port = &mod->regs->portc; | ||
97 | shadow = &mod->portc_shadow; | ||
98 | offset -= 16; | ||
99 | } | ||
100 | |||
101 | spin_lock(&mod->lock); | ||
102 | if (value) | ||
103 | *shadow |= (1 << offset); | ||
104 | else | ||
105 | *shadow &= ~(1 << offset); | ||
106 | |||
107 | iowrite16be(*shadow, port); | ||
108 | spin_unlock(&mod->lock); | ||
109 | } | ||
110 | |||
111 | static void __devinit ttl_write_reg(struct ttl_module *mod, u8 reg, u16 val) | ||
112 | { | ||
113 | iowrite16be(reg, &mod->regs->control); | ||
114 | iowrite16be(val, &mod->regs->control); | ||
115 | } | ||
116 | |||
117 | static void __devinit ttl_setup_device(struct ttl_module *mod) | ||
118 | { | ||
119 | /* reset the device to a known state */ | ||
120 | iowrite16be(0x0000, &mod->regs->control); | ||
121 | iowrite16be(0x0001, &mod->regs->control); | ||
122 | iowrite16be(0x0000, &mod->regs->control); | ||
123 | |||
124 | /* put all ports in open-drain mode */ | ||
125 | ttl_write_reg(mod, PORTA_IOCTL, 0x00ff); | ||
126 | ttl_write_reg(mod, PORTB_IOCTL, 0x00ff); | ||
127 | ttl_write_reg(mod, PORTC_IOCTL, 0x000f); | ||
128 | |||
129 | /* set all ports as outputs */ | ||
130 | ttl_write_reg(mod, PORTA_DIRECTION, 0x0000); | ||
131 | ttl_write_reg(mod, PORTB_DIRECTION, 0x0000); | ||
132 | ttl_write_reg(mod, PORTC_DIRECTION, 0x0000); | ||
133 | |||
134 | /* set all ports to drive zeroes */ | ||
135 | iowrite16be(0x0000, &mod->regs->porta); | ||
136 | iowrite16be(0x0000, &mod->regs->portb); | ||
137 | iowrite16be(0x0000, &mod->regs->portc); | ||
138 | |||
139 | /* enable all ports */ | ||
140 | ttl_write_reg(mod, MASTER_CONF_CTL, CONF_PAE | CONF_PBE | CONF_PCE); | ||
141 | } | ||
142 | |||
143 | static int __devinit ttl_probe(struct platform_device *pdev) | ||
144 | { | ||
145 | struct janz_platform_data *pdata; | ||
146 | struct device *dev = &pdev->dev; | ||
147 | struct ttl_module *mod; | ||
148 | struct gpio_chip *gpio; | ||
149 | struct resource *res; | ||
150 | int ret; | ||
151 | |||
152 | pdata = pdev->dev.platform_data; | ||
153 | if (!pdata) { | ||
154 | dev_err(dev, "no platform data\n"); | ||
155 | ret = -ENXIO; | ||
156 | goto out_return; | ||
157 | } | ||
158 | |||
159 | mod = kzalloc(sizeof(*mod), GFP_KERNEL); | ||
160 | if (!mod) { | ||
161 | dev_err(dev, "unable to allocate private data\n"); | ||
162 | ret = -ENOMEM; | ||
163 | goto out_return; | ||
164 | } | ||
165 | |||
166 | platform_set_drvdata(pdev, mod); | ||
167 | spin_lock_init(&mod->lock); | ||
168 | |||
169 | /* get access to the MODULbus registers for this module */ | ||
170 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
171 | if (!res) { | ||
172 | dev_err(dev, "MODULbus registers not found\n"); | ||
173 | ret = -ENODEV; | ||
174 | goto out_free_mod; | ||
175 | } | ||
176 | |||
177 | mod->regs = ioremap(res->start, resource_size(res)); | ||
178 | if (!mod->regs) { | ||
179 | dev_err(dev, "MODULbus registers not ioremap\n"); | ||
180 | ret = -ENOMEM; | ||
181 | goto out_free_mod; | ||
182 | } | ||
183 | |||
184 | ttl_setup_device(mod); | ||
185 | |||
186 | /* Initialize the GPIO data structures */ | ||
187 | gpio = &mod->gpio; | ||
188 | gpio->dev = &pdev->dev; | ||
189 | gpio->label = pdev->name; | ||
190 | gpio->get = ttl_get_value; | ||
191 | gpio->set = ttl_set_value; | ||
192 | gpio->owner = THIS_MODULE; | ||
193 | |||
194 | /* request dynamic allocation */ | ||
195 | gpio->base = -1; | ||
196 | gpio->ngpio = 20; | ||
197 | |||
198 | ret = gpiochip_add(gpio); | ||
199 | if (ret) { | ||
200 | dev_err(dev, "unable to add GPIO chip\n"); | ||
201 | goto out_iounmap_regs; | ||
202 | } | ||
203 | |||
204 | dev_info(&pdev->dev, "module %d: registered GPIO device\n", | ||
205 | pdata->modno); | ||
206 | return 0; | ||
207 | |||
208 | out_iounmap_regs: | ||
209 | iounmap(mod->regs); | ||
210 | out_free_mod: | ||
211 | kfree(mod); | ||
212 | out_return: | ||
213 | return ret; | ||
214 | } | ||
215 | |||
216 | static int __devexit ttl_remove(struct platform_device *pdev) | ||
217 | { | ||
218 | struct ttl_module *mod = platform_get_drvdata(pdev); | ||
219 | struct device *dev = &pdev->dev; | ||
220 | int ret; | ||
221 | |||
222 | ret = gpiochip_remove(&mod->gpio); | ||
223 | if (ret) { | ||
224 | dev_err(dev, "unable to remove GPIO chip\n"); | ||
225 | return ret; | ||
226 | } | ||
227 | |||
228 | iounmap(mod->regs); | ||
229 | kfree(mod); | ||
230 | return 0; | ||
231 | } | ||
232 | |||
233 | static struct platform_driver ttl_driver = { | ||
234 | .driver = { | ||
235 | .name = DRV_NAME, | ||
236 | .owner = THIS_MODULE, | ||
237 | }, | ||
238 | .probe = ttl_probe, | ||
239 | .remove = __devexit_p(ttl_remove), | ||
240 | }; | ||
241 | |||
242 | static int __init ttl_init(void) | ||
243 | { | ||
244 | return platform_driver_register(&ttl_driver); | ||
245 | } | ||
246 | |||
247 | static void __exit ttl_exit(void) | ||
248 | { | ||
249 | platform_driver_unregister(&ttl_driver); | ||
250 | } | ||
251 | |||
252 | MODULE_AUTHOR("Ira W. Snyder <iws@ovro.caltech.edu>"); | ||
253 | MODULE_DESCRIPTION("Janz MODULbus VMOD-TTL Driver"); | ||
254 | MODULE_LICENSE("GPL"); | ||
255 | MODULE_ALIAS("platform:janz-ttl"); | ||
256 | |||
257 | module_init(ttl_init); | ||
258 | module_exit(ttl_exit); | ||
diff --git a/drivers/gpio/rdc321x-gpio.c b/drivers/gpio/rdc321x-gpio.c new file mode 100644 index 000000000000..2762698e0204 --- /dev/null +++ b/drivers/gpio/rdc321x-gpio.c | |||
@@ -0,0 +1,246 @@ | |||
1 | /* | ||
2 | * RDC321x GPIO driver | ||
3 | * | ||
4 | * Copyright (C) 2008, Volker Weiss <dev@tintuc.de> | ||
5 | * Copyright (C) 2007-2010 Florian Fainelli <florian@openwrt.org> | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; either version 2 of the License, or | ||
10 | * (at your option) any later version. | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, | ||
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
15 | * GNU General Public License for more details. | ||
16 | * | ||
17 | * You should have received a copy of the GNU General Public License | ||
18 | * along with this program; if not, write to the Free Software | ||
19 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
20 | * | ||
21 | */ | ||
22 | #include <linux/module.h> | ||
23 | #include <linux/kernel.h> | ||
24 | #include <linux/init.h> | ||
25 | #include <linux/spinlock.h> | ||
26 | #include <linux/platform_device.h> | ||
27 | #include <linux/pci.h> | ||
28 | #include <linux/gpio.h> | ||
29 | #include <linux/mfd/rdc321x.h> | ||
30 | #include <linux/slab.h> | ||
31 | |||
32 | struct rdc321x_gpio { | ||
33 | spinlock_t lock; | ||
34 | struct pci_dev *sb_pdev; | ||
35 | u32 data_reg[2]; | ||
36 | int reg1_ctrl_base; | ||
37 | int reg1_data_base; | ||
38 | int reg2_ctrl_base; | ||
39 | int reg2_data_base; | ||
40 | struct gpio_chip chip; | ||
41 | }; | ||
42 | |||
43 | /* read GPIO pin */ | ||
44 | static int rdc_gpio_get_value(struct gpio_chip *chip, unsigned gpio) | ||
45 | { | ||
46 | struct rdc321x_gpio *gpch; | ||
47 | u32 value = 0; | ||
48 | int reg; | ||
49 | |||
50 | gpch = container_of(chip, struct rdc321x_gpio, chip); | ||
51 | reg = gpio < 32 ? gpch->reg1_data_base : gpch->reg2_data_base; | ||
52 | |||
53 | spin_lock(&gpch->lock); | ||
54 | pci_write_config_dword(gpch->sb_pdev, reg, | ||
55 | gpch->data_reg[gpio < 32 ? 0 : 1]); | ||
56 | pci_read_config_dword(gpch->sb_pdev, reg, &value); | ||
57 | spin_unlock(&gpch->lock); | ||
58 | |||
59 | return (1 << (gpio & 0x1f)) & value ? 1 : 0; | ||
60 | } | ||
61 | |||
62 | static void rdc_gpio_set_value_impl(struct gpio_chip *chip, | ||
63 | unsigned gpio, int value) | ||
64 | { | ||
65 | struct rdc321x_gpio *gpch; | ||
66 | int reg = (gpio < 32) ? 0 : 1; | ||
67 | |||
68 | gpch = container_of(chip, struct rdc321x_gpio, chip); | ||
69 | |||
70 | if (value) | ||
71 | gpch->data_reg[reg] |= 1 << (gpio & 0x1f); | ||
72 | else | ||
73 | gpch->data_reg[reg] &= ~(1 << (gpio & 0x1f)); | ||
74 | |||
75 | pci_write_config_dword(gpch->sb_pdev, | ||
76 | reg ? gpch->reg2_data_base : gpch->reg1_data_base, | ||
77 | gpch->data_reg[reg]); | ||
78 | } | ||
79 | |||
80 | /* set GPIO pin to value */ | ||
81 | static void rdc_gpio_set_value(struct gpio_chip *chip, | ||
82 | unsigned gpio, int value) | ||
83 | { | ||
84 | struct rdc321x_gpio *gpch; | ||
85 | |||
86 | gpch = container_of(chip, struct rdc321x_gpio, chip); | ||
87 | spin_lock(&gpch->lock); | ||
88 | rdc_gpio_set_value_impl(chip, gpio, value); | ||
89 | spin_unlock(&gpch->lock); | ||
90 | } | ||
91 | |||
92 | static int rdc_gpio_config(struct gpio_chip *chip, | ||
93 | unsigned gpio, int value) | ||
94 | { | ||
95 | struct rdc321x_gpio *gpch; | ||
96 | int err; | ||
97 | u32 reg; | ||
98 | |||
99 | gpch = container_of(chip, struct rdc321x_gpio, chip); | ||
100 | |||
101 | spin_lock(&gpch->lock); | ||
102 | err = pci_read_config_dword(gpch->sb_pdev, gpio < 32 ? | ||
103 | gpch->reg1_ctrl_base : gpch->reg2_ctrl_base, ®); | ||
104 | if (err) | ||
105 | goto unlock; | ||
106 | |||
107 | reg |= 1 << (gpio & 0x1f); | ||
108 | |||
109 | err = pci_write_config_dword(gpch->sb_pdev, gpio < 32 ? | ||
110 | gpch->reg1_ctrl_base : gpch->reg2_ctrl_base, reg); | ||
111 | if (err) | ||
112 | goto unlock; | ||
113 | |||
114 | rdc_gpio_set_value_impl(chip, gpio, value); | ||
115 | |||
116 | unlock: | ||
117 | spin_unlock(&gpch->lock); | ||
118 | |||
119 | return err; | ||
120 | } | ||
121 | |||
122 | /* configure GPIO pin as input */ | ||
123 | static int rdc_gpio_direction_input(struct gpio_chip *chip, unsigned gpio) | ||
124 | { | ||
125 | return rdc_gpio_config(chip, gpio, 1); | ||
126 | } | ||
127 | |||
128 | /* | ||
129 | * Cache the initial value of both GPIO data registers | ||
130 | */ | ||
131 | static int __devinit rdc321x_gpio_probe(struct platform_device *pdev) | ||
132 | { | ||
133 | int err; | ||
134 | struct resource *r; | ||
135 | struct rdc321x_gpio *rdc321x_gpio_dev; | ||
136 | struct rdc321x_gpio_pdata *pdata; | ||
137 | |||
138 | pdata = pdev->dev.platform_data; | ||
139 | if (!pdata) { | ||
140 | dev_err(&pdev->dev, "no platform data supplied\n"); | ||
141 | return -ENODEV; | ||
142 | } | ||
143 | |||
144 | rdc321x_gpio_dev = kzalloc(sizeof(struct rdc321x_gpio), GFP_KERNEL); | ||
145 | if (!rdc321x_gpio_dev) { | ||
146 | dev_err(&pdev->dev, "failed to allocate private data\n"); | ||
147 | return -ENOMEM; | ||
148 | } | ||
149 | |||
150 | r = platform_get_resource_byname(pdev, IORESOURCE_IO, "gpio-reg1"); | ||
151 | if (!r) { | ||
152 | dev_err(&pdev->dev, "failed to get gpio-reg1 resource\n"); | ||
153 | err = -ENODEV; | ||
154 | goto out_free; | ||
155 | } | ||
156 | |||
157 | spin_lock_init(&rdc321x_gpio_dev->lock); | ||
158 | rdc321x_gpio_dev->sb_pdev = pdata->sb_pdev; | ||
159 | rdc321x_gpio_dev->reg1_ctrl_base = r->start; | ||
160 | rdc321x_gpio_dev->reg1_data_base = r->start + 0x4; | ||
161 | |||
162 | r = platform_get_resource_byname(pdev, IORESOURCE_IO, "gpio-reg2"); | ||
163 | if (!r) { | ||
164 | dev_err(&pdev->dev, "failed to get gpio-reg2 resource\n"); | ||
165 | err = -ENODEV; | ||
166 | goto out_free; | ||
167 | } | ||
168 | |||
169 | rdc321x_gpio_dev->reg2_ctrl_base = r->start; | ||
170 | rdc321x_gpio_dev->reg2_data_base = r->start + 0x4; | ||
171 | |||
172 | rdc321x_gpio_dev->chip.label = "rdc321x-gpio"; | ||
173 | rdc321x_gpio_dev->chip.direction_input = rdc_gpio_direction_input; | ||
174 | rdc321x_gpio_dev->chip.direction_output = rdc_gpio_config; | ||
175 | rdc321x_gpio_dev->chip.get = rdc_gpio_get_value; | ||
176 | rdc321x_gpio_dev->chip.set = rdc_gpio_set_value; | ||
177 | rdc321x_gpio_dev->chip.base = 0; | ||
178 | rdc321x_gpio_dev->chip.ngpio = pdata->max_gpios; | ||
179 | |||
180 | platform_set_drvdata(pdev, rdc321x_gpio_dev); | ||
181 | |||
182 | /* This might not be, what others (BIOS, bootloader, etc.) | ||
183 | wrote to these registers before, but it's a good guess. Still | ||
184 | better than just using 0xffffffff. */ | ||
185 | err = pci_read_config_dword(rdc321x_gpio_dev->sb_pdev, | ||
186 | rdc321x_gpio_dev->reg1_data_base, | ||
187 | &rdc321x_gpio_dev->data_reg[0]); | ||
188 | if (err) | ||
189 | goto out_drvdata; | ||
190 | |||
191 | err = pci_read_config_dword(rdc321x_gpio_dev->sb_pdev, | ||
192 | rdc321x_gpio_dev->reg2_data_base, | ||
193 | &rdc321x_gpio_dev->data_reg[1]); | ||
194 | if (err) | ||
195 | goto out_drvdata; | ||
196 | |||
197 | dev_info(&pdev->dev, "registering %d GPIOs\n", | ||
198 | rdc321x_gpio_dev->chip.ngpio); | ||
199 | return gpiochip_add(&rdc321x_gpio_dev->chip); | ||
200 | |||
201 | out_drvdata: | ||
202 | platform_set_drvdata(pdev, NULL); | ||
203 | out_free: | ||
204 | kfree(rdc321x_gpio_dev); | ||
205 | return err; | ||
206 | } | ||
207 | |||
208 | static int __devexit rdc321x_gpio_remove(struct platform_device *pdev) | ||
209 | { | ||
210 | int ret; | ||
211 | struct rdc321x_gpio *rdc321x_gpio_dev = platform_get_drvdata(pdev); | ||
212 | |||
213 | ret = gpiochip_remove(&rdc321x_gpio_dev->chip); | ||
214 | if (ret) | ||
215 | dev_err(&pdev->dev, "failed to unregister chip\n"); | ||
216 | |||
217 | kfree(rdc321x_gpio_dev); | ||
218 | platform_set_drvdata(pdev, NULL); | ||
219 | |||
220 | return ret; | ||
221 | } | ||
222 | |||
223 | static struct platform_driver rdc321x_gpio_driver = { | ||
224 | .driver.name = "rdc321x-gpio", | ||
225 | .driver.owner = THIS_MODULE, | ||
226 | .probe = rdc321x_gpio_probe, | ||
227 | .remove = __devexit_p(rdc321x_gpio_remove), | ||
228 | }; | ||
229 | |||
230 | static int __init rdc321x_gpio_init(void) | ||
231 | { | ||
232 | return platform_driver_register(&rdc321x_gpio_driver); | ||
233 | } | ||
234 | |||
235 | static void __exit rdc321x_gpio_exit(void) | ||
236 | { | ||
237 | platform_driver_unregister(&rdc321x_gpio_driver); | ||
238 | } | ||
239 | |||
240 | module_init(rdc321x_gpio_init); | ||
241 | module_exit(rdc321x_gpio_exit); | ||
242 | |||
243 | MODULE_AUTHOR("Florian Fainelli <florian@openwrt.org>"); | ||
244 | MODULE_DESCRIPTION("RDC321x GPIO driver"); | ||
245 | MODULE_LICENSE("GPL"); | ||
246 | MODULE_ALIAS("platform:rdc321x-gpio"); | ||
diff --git a/drivers/gpio/tc35892-gpio.c b/drivers/gpio/tc35892-gpio.c new file mode 100644 index 000000000000..1be6288780de --- /dev/null +++ b/drivers/gpio/tc35892-gpio.c | |||
@@ -0,0 +1,381 @@ | |||
1 | /* | ||
2 | * Copyright (C) ST-Ericsson SA 2010 | ||
3 | * | ||
4 | * License Terms: GNU General Public License, version 2 | ||
5 | * Author: Hanumath Prasad <hanumath.prasad@stericsson.com> for ST-Ericsson | ||
6 | * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson | ||
7 | */ | ||
8 | |||
9 | #include <linux/module.h> | ||
10 | #include <linux/init.h> | ||
11 | #include <linux/platform_device.h> | ||
12 | #include <linux/slab.h> | ||
13 | #include <linux/gpio.h> | ||
14 | #include <linux/irq.h> | ||
15 | #include <linux/interrupt.h> | ||
16 | #include <linux/mfd/tc35892.h> | ||
17 | |||
18 | /* | ||
19 | * These registers are modified under the irq bus lock and cached to avoid | ||
20 | * unnecessary writes in bus_sync_unlock. | ||
21 | */ | ||
22 | enum { REG_IBE, REG_IEV, REG_IS, REG_IE }; | ||
23 | |||
24 | #define CACHE_NR_REGS 4 | ||
25 | #define CACHE_NR_BANKS 3 | ||
26 | |||
27 | struct tc35892_gpio { | ||
28 | struct gpio_chip chip; | ||
29 | struct tc35892 *tc35892; | ||
30 | struct device *dev; | ||
31 | struct mutex irq_lock; | ||
32 | |||
33 | int irq_base; | ||
34 | |||
35 | /* Caches of interrupt control registers for bus_lock */ | ||
36 | u8 regs[CACHE_NR_REGS][CACHE_NR_BANKS]; | ||
37 | u8 oldregs[CACHE_NR_REGS][CACHE_NR_BANKS]; | ||
38 | }; | ||
39 | |||
40 | static inline struct tc35892_gpio *to_tc35892_gpio(struct gpio_chip *chip) | ||
41 | { | ||
42 | return container_of(chip, struct tc35892_gpio, chip); | ||
43 | } | ||
44 | |||
45 | static int tc35892_gpio_get(struct gpio_chip *chip, unsigned offset) | ||
46 | { | ||
47 | struct tc35892_gpio *tc35892_gpio = to_tc35892_gpio(chip); | ||
48 | struct tc35892 *tc35892 = tc35892_gpio->tc35892; | ||
49 | u8 reg = TC35892_GPIODATA0 + (offset / 8) * 2; | ||
50 | u8 mask = 1 << (offset % 8); | ||
51 | int ret; | ||
52 | |||
53 | ret = tc35892_reg_read(tc35892, reg); | ||
54 | if (ret < 0) | ||
55 | return ret; | ||
56 | |||
57 | return ret & mask; | ||
58 | } | ||
59 | |||
60 | static void tc35892_gpio_set(struct gpio_chip *chip, unsigned offset, int val) | ||
61 | { | ||
62 | struct tc35892_gpio *tc35892_gpio = to_tc35892_gpio(chip); | ||
63 | struct tc35892 *tc35892 = tc35892_gpio->tc35892; | ||
64 | u8 reg = TC35892_GPIODATA0 + (offset / 8) * 2; | ||
65 | unsigned pos = offset % 8; | ||
66 | u8 data[] = {!!val << pos, 1 << pos}; | ||
67 | |||
68 | tc35892_block_write(tc35892, reg, ARRAY_SIZE(data), data); | ||
69 | } | ||
70 | |||
71 | static int tc35892_gpio_direction_output(struct gpio_chip *chip, | ||
72 | unsigned offset, int val) | ||
73 | { | ||
74 | struct tc35892_gpio *tc35892_gpio = to_tc35892_gpio(chip); | ||
75 | struct tc35892 *tc35892 = tc35892_gpio->tc35892; | ||
76 | u8 reg = TC35892_GPIODIR0 + offset / 8; | ||
77 | unsigned pos = offset % 8; | ||
78 | |||
79 | tc35892_gpio_set(chip, offset, val); | ||
80 | |||
81 | return tc35892_set_bits(tc35892, reg, 1 << pos, 1 << pos); | ||
82 | } | ||
83 | |||
84 | static int tc35892_gpio_direction_input(struct gpio_chip *chip, | ||
85 | unsigned offset) | ||
86 | { | ||
87 | struct tc35892_gpio *tc35892_gpio = to_tc35892_gpio(chip); | ||
88 | struct tc35892 *tc35892 = tc35892_gpio->tc35892; | ||
89 | u8 reg = TC35892_GPIODIR0 + offset / 8; | ||
90 | unsigned pos = offset % 8; | ||
91 | |||
92 | return tc35892_set_bits(tc35892, reg, 1 << pos, 0); | ||
93 | } | ||
94 | |||
95 | static int tc35892_gpio_to_irq(struct gpio_chip *chip, unsigned offset) | ||
96 | { | ||
97 | struct tc35892_gpio *tc35892_gpio = to_tc35892_gpio(chip); | ||
98 | |||
99 | return tc35892_gpio->irq_base + offset; | ||
100 | } | ||
101 | |||
102 | static struct gpio_chip template_chip = { | ||
103 | .label = "tc35892", | ||
104 | .owner = THIS_MODULE, | ||
105 | .direction_input = tc35892_gpio_direction_input, | ||
106 | .get = tc35892_gpio_get, | ||
107 | .direction_output = tc35892_gpio_direction_output, | ||
108 | .set = tc35892_gpio_set, | ||
109 | .to_irq = tc35892_gpio_to_irq, | ||
110 | .can_sleep = 1, | ||
111 | }; | ||
112 | |||
113 | static int tc35892_gpio_irq_set_type(unsigned int irq, unsigned int type) | ||
114 | { | ||
115 | struct tc35892_gpio *tc35892_gpio = get_irq_chip_data(irq); | ||
116 | int offset = irq - tc35892_gpio->irq_base; | ||
117 | int regoffset = offset / 8; | ||
118 | int mask = 1 << (offset % 8); | ||
119 | |||
120 | if (type == IRQ_TYPE_EDGE_BOTH) { | ||
121 | tc35892_gpio->regs[REG_IBE][regoffset] |= mask; | ||
122 | return 0; | ||
123 | } | ||
124 | |||
125 | tc35892_gpio->regs[REG_IBE][regoffset] &= ~mask; | ||
126 | |||
127 | if (type == IRQ_TYPE_LEVEL_LOW || type == IRQ_TYPE_LEVEL_HIGH) | ||
128 | tc35892_gpio->regs[REG_IS][regoffset] |= mask; | ||
129 | else | ||
130 | tc35892_gpio->regs[REG_IS][regoffset] &= ~mask; | ||
131 | |||
132 | if (type == IRQ_TYPE_EDGE_RISING || type == IRQ_TYPE_LEVEL_HIGH) | ||
133 | tc35892_gpio->regs[REG_IEV][regoffset] |= mask; | ||
134 | else | ||
135 | tc35892_gpio->regs[REG_IEV][regoffset] &= ~mask; | ||
136 | |||
137 | return 0; | ||
138 | } | ||
139 | |||
140 | static void tc35892_gpio_irq_lock(unsigned int irq) | ||
141 | { | ||
142 | struct tc35892_gpio *tc35892_gpio = get_irq_chip_data(irq); | ||
143 | |||
144 | mutex_lock(&tc35892_gpio->irq_lock); | ||
145 | } | ||
146 | |||
147 | static void tc35892_gpio_irq_sync_unlock(unsigned int irq) | ||
148 | { | ||
149 | struct tc35892_gpio *tc35892_gpio = get_irq_chip_data(irq); | ||
150 | struct tc35892 *tc35892 = tc35892_gpio->tc35892; | ||
151 | static const u8 regmap[] = { | ||
152 | [REG_IBE] = TC35892_GPIOIBE0, | ||
153 | [REG_IEV] = TC35892_GPIOIEV0, | ||
154 | [REG_IS] = TC35892_GPIOIS0, | ||
155 | [REG_IE] = TC35892_GPIOIE0, | ||
156 | }; | ||
157 | int i, j; | ||
158 | |||
159 | for (i = 0; i < CACHE_NR_REGS; i++) { | ||
160 | for (j = 0; j < CACHE_NR_BANKS; j++) { | ||
161 | u8 old = tc35892_gpio->oldregs[i][j]; | ||
162 | u8 new = tc35892_gpio->regs[i][j]; | ||
163 | |||
164 | if (new == old) | ||
165 | continue; | ||
166 | |||
167 | tc35892_gpio->oldregs[i][j] = new; | ||
168 | tc35892_reg_write(tc35892, regmap[i] + j * 8, new); | ||
169 | } | ||
170 | } | ||
171 | |||
172 | mutex_unlock(&tc35892_gpio->irq_lock); | ||
173 | } | ||
174 | |||
175 | static void tc35892_gpio_irq_mask(unsigned int irq) | ||
176 | { | ||
177 | struct tc35892_gpio *tc35892_gpio = get_irq_chip_data(irq); | ||
178 | int offset = irq - tc35892_gpio->irq_base; | ||
179 | int regoffset = offset / 8; | ||
180 | int mask = 1 << (offset % 8); | ||
181 | |||
182 | tc35892_gpio->regs[REG_IE][regoffset] &= ~mask; | ||
183 | } | ||
184 | |||
185 | static void tc35892_gpio_irq_unmask(unsigned int irq) | ||
186 | { | ||
187 | struct tc35892_gpio *tc35892_gpio = get_irq_chip_data(irq); | ||
188 | int offset = irq - tc35892_gpio->irq_base; | ||
189 | int regoffset = offset / 8; | ||
190 | int mask = 1 << (offset % 8); | ||
191 | |||
192 | tc35892_gpio->regs[REG_IE][regoffset] |= mask; | ||
193 | } | ||
194 | |||
195 | static struct irq_chip tc35892_gpio_irq_chip = { | ||
196 | .name = "tc35892-gpio", | ||
197 | .bus_lock = tc35892_gpio_irq_lock, | ||
198 | .bus_sync_unlock = tc35892_gpio_irq_sync_unlock, | ||
199 | .mask = tc35892_gpio_irq_mask, | ||
200 | .unmask = tc35892_gpio_irq_unmask, | ||
201 | .set_type = tc35892_gpio_irq_set_type, | ||
202 | }; | ||
203 | |||
204 | static irqreturn_t tc35892_gpio_irq(int irq, void *dev) | ||
205 | { | ||
206 | struct tc35892_gpio *tc35892_gpio = dev; | ||
207 | struct tc35892 *tc35892 = tc35892_gpio->tc35892; | ||
208 | u8 status[CACHE_NR_BANKS]; | ||
209 | int ret; | ||
210 | int i; | ||
211 | |||
212 | ret = tc35892_block_read(tc35892, TC35892_GPIOMIS0, | ||
213 | ARRAY_SIZE(status), status); | ||
214 | if (ret < 0) | ||
215 | return IRQ_NONE; | ||
216 | |||
217 | for (i = 0; i < ARRAY_SIZE(status); i++) { | ||
218 | unsigned int stat = status[i]; | ||
219 | if (!stat) | ||
220 | continue; | ||
221 | |||
222 | while (stat) { | ||
223 | int bit = __ffs(stat); | ||
224 | int line = i * 8 + bit; | ||
225 | |||
226 | handle_nested_irq(tc35892_gpio->irq_base + line); | ||
227 | stat &= ~(1 << bit); | ||
228 | } | ||
229 | |||
230 | tc35892_reg_write(tc35892, TC35892_GPIOIC0 + i, status[i]); | ||
231 | } | ||
232 | |||
233 | return IRQ_HANDLED; | ||
234 | } | ||
235 | |||
236 | static int tc35892_gpio_irq_init(struct tc35892_gpio *tc35892_gpio) | ||
237 | { | ||
238 | int base = tc35892_gpio->irq_base; | ||
239 | int irq; | ||
240 | |||
241 | for (irq = base; irq < base + tc35892_gpio->chip.ngpio; irq++) { | ||
242 | set_irq_chip_data(irq, tc35892_gpio); | ||
243 | set_irq_chip_and_handler(irq, &tc35892_gpio_irq_chip, | ||
244 | handle_simple_irq); | ||
245 | set_irq_nested_thread(irq, 1); | ||
246 | #ifdef CONFIG_ARM | ||
247 | set_irq_flags(irq, IRQF_VALID); | ||
248 | #else | ||
249 | set_irq_noprobe(irq); | ||
250 | #endif | ||
251 | } | ||
252 | |||
253 | return 0; | ||
254 | } | ||
255 | |||
256 | static void tc35892_gpio_irq_remove(struct tc35892_gpio *tc35892_gpio) | ||
257 | { | ||
258 | int base = tc35892_gpio->irq_base; | ||
259 | int irq; | ||
260 | |||
261 | for (irq = base; irq < base + tc35892_gpio->chip.ngpio; irq++) { | ||
262 | #ifdef CONFIG_ARM | ||
263 | set_irq_flags(irq, 0); | ||
264 | #endif | ||
265 | set_irq_chip_and_handler(irq, NULL, NULL); | ||
266 | set_irq_chip_data(irq, NULL); | ||
267 | } | ||
268 | } | ||
269 | |||
270 | static int __devinit tc35892_gpio_probe(struct platform_device *pdev) | ||
271 | { | ||
272 | struct tc35892 *tc35892 = dev_get_drvdata(pdev->dev.parent); | ||
273 | struct tc35892_gpio_platform_data *pdata; | ||
274 | struct tc35892_gpio *tc35892_gpio; | ||
275 | int ret; | ||
276 | int irq; | ||
277 | |||
278 | pdata = tc35892->pdata->gpio; | ||
279 | if (!pdata) | ||
280 | return -ENODEV; | ||
281 | |||
282 | irq = platform_get_irq(pdev, 0); | ||
283 | if (irq < 0) | ||
284 | return irq; | ||
285 | |||
286 | tc35892_gpio = kzalloc(sizeof(struct tc35892_gpio), GFP_KERNEL); | ||
287 | if (!tc35892_gpio) | ||
288 | return -ENOMEM; | ||
289 | |||
290 | mutex_init(&tc35892_gpio->irq_lock); | ||
291 | |||
292 | tc35892_gpio->dev = &pdev->dev; | ||
293 | tc35892_gpio->tc35892 = tc35892; | ||
294 | |||
295 | tc35892_gpio->chip = template_chip; | ||
296 | tc35892_gpio->chip.ngpio = tc35892->num_gpio; | ||
297 | tc35892_gpio->chip.dev = &pdev->dev; | ||
298 | tc35892_gpio->chip.base = pdata->gpio_base; | ||
299 | |||
300 | tc35892_gpio->irq_base = tc35892->irq_base + TC35892_INT_GPIO(0); | ||
301 | |||
302 | /* Bring the GPIO module out of reset */ | ||
303 | ret = tc35892_set_bits(tc35892, TC35892_RSTCTRL, | ||
304 | TC35892_RSTCTRL_GPIRST, 0); | ||
305 | if (ret < 0) | ||
306 | goto out_free; | ||
307 | |||
308 | ret = tc35892_gpio_irq_init(tc35892_gpio); | ||
309 | if (ret) | ||
310 | goto out_free; | ||
311 | |||
312 | ret = request_threaded_irq(irq, NULL, tc35892_gpio_irq, IRQF_ONESHOT, | ||
313 | "tc35892-gpio", tc35892_gpio); | ||
314 | if (ret) { | ||
315 | dev_err(&pdev->dev, "unable to get irq: %d\n", ret); | ||
316 | goto out_removeirq; | ||
317 | } | ||
318 | |||
319 | ret = gpiochip_add(&tc35892_gpio->chip); | ||
320 | if (ret) { | ||
321 | dev_err(&pdev->dev, "unable to add gpiochip: %d\n", ret); | ||
322 | goto out_freeirq; | ||
323 | } | ||
324 | |||
325 | platform_set_drvdata(pdev, tc35892_gpio); | ||
326 | |||
327 | return 0; | ||
328 | |||
329 | out_freeirq: | ||
330 | free_irq(irq, tc35892_gpio); | ||
331 | out_removeirq: | ||
332 | tc35892_gpio_irq_remove(tc35892_gpio); | ||
333 | out_free: | ||
334 | kfree(tc35892_gpio); | ||
335 | return ret; | ||
336 | } | ||
337 | |||
338 | static int __devexit tc35892_gpio_remove(struct platform_device *pdev) | ||
339 | { | ||
340 | struct tc35892_gpio *tc35892_gpio = platform_get_drvdata(pdev); | ||
341 | int irq = platform_get_irq(pdev, 0); | ||
342 | int ret; | ||
343 | |||
344 | ret = gpiochip_remove(&tc35892_gpio->chip); | ||
345 | if (ret < 0) { | ||
346 | dev_err(tc35892_gpio->dev, | ||
347 | "unable to remove gpiochip: %d\n", ret); | ||
348 | return ret; | ||
349 | } | ||
350 | |||
351 | free_irq(irq, tc35892_gpio); | ||
352 | tc35892_gpio_irq_remove(tc35892_gpio); | ||
353 | |||
354 | platform_set_drvdata(pdev, NULL); | ||
355 | kfree(tc35892_gpio); | ||
356 | |||
357 | return 0; | ||
358 | } | ||
359 | |||
360 | static struct platform_driver tc35892_gpio_driver = { | ||
361 | .driver.name = "tc35892-gpio", | ||
362 | .driver.owner = THIS_MODULE, | ||
363 | .probe = tc35892_gpio_probe, | ||
364 | .remove = __devexit_p(tc35892_gpio_remove), | ||
365 | }; | ||
366 | |||
367 | static int __init tc35892_gpio_init(void) | ||
368 | { | ||
369 | return platform_driver_register(&tc35892_gpio_driver); | ||
370 | } | ||
371 | subsys_initcall(tc35892_gpio_init); | ||
372 | |||
373 | static void __exit tc35892_gpio_exit(void) | ||
374 | { | ||
375 | platform_driver_unregister(&tc35892_gpio_driver); | ||
376 | } | ||
377 | module_exit(tc35892_gpio_exit); | ||
378 | |||
379 | MODULE_LICENSE("GPL v2"); | ||
380 | MODULE_DESCRIPTION("TC35892 GPIO driver"); | ||
381 | MODULE_AUTHOR("Hanumath Prasad, Rabin Vincent"); | ||