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-rw-r--r--drivers/gpio/langwell_gpio.c11
1 files changed, 1 insertions, 10 deletions
diff --git a/drivers/gpio/langwell_gpio.c b/drivers/gpio/langwell_gpio.c
index 5711ce5353c6..4baf3d7d0f8e 100644
--- a/drivers/gpio/langwell_gpio.c
+++ b/drivers/gpio/langwell_gpio.c
@@ -144,13 +144,6 @@ static int lnw_irq_type(unsigned irq, unsigned type)
144 144
145static void lnw_irq_unmask(unsigned irq) 145static void lnw_irq_unmask(unsigned irq)
146{ 146{
147 struct lnw_gpio *lnw = get_irq_chip_data(irq);
148 u32 gpio = irq - lnw->irq_base;
149 u8 reg = gpio / 32;
150 void __iomem *gedr;
151
152 gedr = (void __iomem *)(&lnw->reg_base->GEDR[reg]);
153 writel(BIT(gpio % 32), gedr);
154}; 147};
155 148
156static void lnw_irq_mask(unsigned irq) 149static void lnw_irq_mask(unsigned irq)
@@ -183,13 +176,11 @@ static void lnw_irq_handler(unsigned irq, struct irq_desc *desc)
183 gedr_v = readl(gedr); 176 gedr_v = readl(gedr);
184 if (!gedr_v) 177 if (!gedr_v)
185 continue; 178 continue;
186 for (gpio = reg*32; gpio < reg*32+32; gpio++) { 179 for (gpio = reg*32; gpio < reg*32+32; gpio++)
187 gedr_v = readl(gedr);
188 if (gedr_v & BIT(gpio % 32)) { 180 if (gedr_v & BIT(gpio % 32)) {
189 pr_debug("pin %d triggered\n", gpio); 181 pr_debug("pin %d triggered\n", gpio);
190 generic_handle_irq(lnw->irq_base + gpio); 182 generic_handle_irq(lnw->irq_base + gpio);
191 } 183 }
192 }
193 /* clear the edge detect status bit */ 184 /* clear the edge detect status bit */
194 writel(gedr_v, gedr); 185 writel(gedr_v, gedr);
195 } 186 }