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-rw-r--r--drivers/gpio/Kconfig82
-rw-r--r--drivers/gpio/Makefile9
-rw-r--r--drivers/gpio/adp5520-gpio.c37
-rw-r--r--drivers/gpio/adp5588-gpio.c267
-rw-r--r--drivers/gpio/bt8xxgpio.c1
-rw-r--r--drivers/gpio/cs5535-gpio.c357
-rw-r--r--drivers/gpio/gpiolib.c229
-rw-r--r--drivers/gpio/it8761e_gpio.c231
-rw-r--r--drivers/gpio/langwell_gpio.c3
-rw-r--r--drivers/gpio/max7300.c95
-rw-r--r--drivers/gpio/max7301.c294
-rw-r--r--drivers/gpio/max730x.c249
-rw-r--r--drivers/gpio/mc33880.c1
-rw-r--r--drivers/gpio/mcp23s08.c1
-rw-r--r--drivers/gpio/pca953x.c262
-rw-r--r--drivers/gpio/pl061.c17
-rw-r--r--drivers/gpio/sch_gpio.c295
-rw-r--r--drivers/gpio/timbgpio.c362
-rw-r--r--drivers/gpio/twl4030-gpio.c21
-rw-r--r--drivers/gpio/wm831x-gpio.c59
-rw-r--r--drivers/gpio/wm8350-gpiolib.c182
-rw-r--r--drivers/gpio/wm8994-gpio.c205
-rw-r--r--drivers/gpio/xilinx_gpio.c1
23 files changed, 2927 insertions, 333 deletions
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index 2ad0128c63c6..fee678f74a19 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -65,8 +65,17 @@ config GPIO_SYSFS
65 65
66# put expanders in the right section, in alphabetical order 66# put expanders in the right section, in alphabetical order
67 67
68config GPIO_MAX730X
69 tristate
70
68comment "Memory mapped GPIO expanders:" 71comment "Memory mapped GPIO expanders:"
69 72
73config GPIO_IT8761E
74 tristate "IT8761E GPIO support"
75 depends on GPIOLIB
76 help
77 Say yes here to support GPIO functionality of IT8761E super I/O chip.
78
70config GPIO_PL061 79config GPIO_PL061
71 bool "PrimeCell PL061 GPIO support" 80 bool "PrimeCell PL061 GPIO support"
72 depends on ARM_AMBA 81 depends on ARM_AMBA
@@ -85,8 +94,32 @@ config GPIO_VR41XX
85 help 94 help
86 Say yes here to support the NEC VR4100 series General-purpose I/O Uint 95 Say yes here to support the NEC VR4100 series General-purpose I/O Uint
87 96
97config GPIO_SCH
98 tristate "Intel SCH GPIO"
99 depends on GPIOLIB && PCI
100 select MFD_CORE
101 select LPC_SCH
102 help
103 Say yes here to support GPIO interface on Intel Poulsbo SCH.
104 The Intel SCH contains a total of 14 GPIO pins. Ten GPIOs are
105 powered by the core power rail and are turned off during sleep
106 modes (S3 and higher). The remaining four GPIOs are powered by
107 the Intel SCH suspend power supply. These GPIOs remain
108 active during S3. The suspend powered GPIOs can be used to wake the
109 system from the Suspend-to-RAM state.
110
111 This driver can also be built as a module. If so, the module
112 will be called sch-gpio.
113
88comment "I2C GPIO expanders:" 114comment "I2C GPIO expanders:"
89 115
116config GPIO_MAX7300
117 tristate "Maxim MAX7300 GPIO expander"
118 depends on I2C
119 select GPIO_MAX730X
120 help
121 GPIO driver for Maxim MAX7301 I2C-based GPIO expander.
122
90config GPIO_MAX732X 123config GPIO_MAX732X
91 tristate "MAX7319, MAX7320-7327 I2C Port Expanders" 124 tristate "MAX7319, MAX7320-7327 I2C Port Expanders"
92 depends on I2C 125 depends on I2C
@@ -124,6 +157,13 @@ config GPIO_PCA953X
124 This driver can also be built as a module. If so, the module 157 This driver can also be built as a module. If so, the module
125 will be called pca953x. 158 will be called pca953x.
126 159
160config GPIO_PCA953X_IRQ
161 bool "Interrupt controller support for PCA953x"
162 depends on GPIO_PCA953X=y
163 help
164 Say yes here to enable the pca953x to be used as an interrupt
165 controller. It requires the driver to be built in the kernel.
166
127config GPIO_PCF857X 167config GPIO_PCF857X
128 tristate "PCF857x, PCA{85,96}7x, and MAX732[89] I2C GPIO expanders" 168 tristate "PCF857x, PCA{85,96}7x, and MAX732[89] I2C GPIO expanders"
129 depends on I2C 169 depends on I2C
@@ -162,6 +202,20 @@ config GPIO_WM831X
162 Say yes here to access the GPIO signals of WM831x power management 202 Say yes here to access the GPIO signals of WM831x power management
163 chips from Wolfson Microelectronics. 203 chips from Wolfson Microelectronics.
164 204
205config GPIO_WM8350
206 tristate "WM8350 GPIOs"
207 depends on MFD_WM8350
208 help
209 Say yes here to access the GPIO signals of WM8350 power management
210 chips from Wolfson Microelectronics.
211
212config GPIO_WM8994
213 tristate "WM8994 GPIOs"
214 depends on MFD_WM8994
215 help
216 Say yes here to access the GPIO signals of WM8994 audio hub
217 CODECs from Wolfson Microelectronics.
218
165config GPIO_ADP5520 219config GPIO_ADP5520
166 tristate "GPIO Support for ADP5520 PMIC" 220 tristate "GPIO Support for ADP5520 PMIC"
167 depends on PMIC_ADP5520 221 depends on PMIC_ADP5520
@@ -172,8 +226,27 @@ config GPIO_ADP5520
172 To compile this driver as a module, choose M here: the module will 226 To compile this driver as a module, choose M here: the module will
173 be called adp5520-gpio. 227 be called adp5520-gpio.
174 228
229config GPIO_ADP5588
230 tristate "ADP5588 I2C GPIO expander"
231 depends on I2C
232 help
233 This option enables support for 18 GPIOs found
234 on Analog Devices ADP5588 GPIO Expanders.
235 To compile this driver as a module, choose M here: the module will be
236 called adp5588-gpio.
237
175comment "PCI GPIO expanders:" 238comment "PCI GPIO expanders:"
176 239
240config GPIO_CS5535
241 tristate "AMD CS5535/CS5536 GPIO support"
242 depends on PCI && !CS5535_GPIO
243 help
244 The AMD CS5535 and CS5536 southbridges support 28 GPIO pins that
245 can be used for quite a number of things. The CS5535/6 is found on
246 AMD Geode and Lemote Yeeloong devices.
247
248 If unsure, say N.
249
177config GPIO_BT8XX 250config GPIO_BT8XX
178 tristate "BT8XX GPIO abuser" 251 tristate "BT8XX GPIO abuser"
179 depends on PCI && VIDEO_BT848=n 252 depends on PCI && VIDEO_BT848=n
@@ -196,13 +269,20 @@ config GPIO_LANGWELL
196 help 269 help
197 Say Y here to support Intel Moorestown platform GPIO. 270 Say Y here to support Intel Moorestown platform GPIO.
198 271
272config GPIO_TIMBERDALE
273 bool "Support for timberdale GPIO IP"
274 depends on MFD_TIMBERDALE && GPIOLIB && HAS_IOMEM
275 ---help---
276 Add support for the GPIO IP in the timberdale FPGA.
277
199comment "SPI GPIO expanders:" 278comment "SPI GPIO expanders:"
200 279
201config GPIO_MAX7301 280config GPIO_MAX7301
202 tristate "Maxim MAX7301 GPIO expander" 281 tristate "Maxim MAX7301 GPIO expander"
203 depends on SPI_MASTER 282 depends on SPI_MASTER
283 select GPIO_MAX730X
204 help 284 help
205 gpio driver for Maxim MAX7301 SPI GPIO expander. 285 GPIO driver for Maxim MAX7301 SPI-based GPIO expander.
206 286
207config GPIO_MCP23S08 287config GPIO_MCP23S08
208 tristate "Microchip MCP23S08 I/O expander" 288 tristate "Microchip MCP23S08 I/O expander"
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 00a532c9a1e2..10f3f8d958b1 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -5,7 +5,10 @@ ccflags-$(CONFIG_DEBUG_GPIO) += -DDEBUG
5obj-$(CONFIG_GPIOLIB) += gpiolib.o 5obj-$(CONFIG_GPIOLIB) += gpiolib.o
6 6
7obj-$(CONFIG_GPIO_ADP5520) += adp5520-gpio.o 7obj-$(CONFIG_GPIO_ADP5520) += adp5520-gpio.o
8obj-$(CONFIG_GPIO_ADP5588) += adp5588-gpio.o
8obj-$(CONFIG_GPIO_LANGWELL) += langwell_gpio.o 9obj-$(CONFIG_GPIO_LANGWELL) += langwell_gpio.o
10obj-$(CONFIG_GPIO_MAX730X) += max730x.o
11obj-$(CONFIG_GPIO_MAX7300) += max7300.o
9obj-$(CONFIG_GPIO_MAX7301) += max7301.o 12obj-$(CONFIG_GPIO_MAX7301) += max7301.o
10obj-$(CONFIG_GPIO_MAX732X) += max732x.o 13obj-$(CONFIG_GPIO_MAX732X) += max732x.o
11obj-$(CONFIG_GPIO_MC33880) += mc33880.o 14obj-$(CONFIG_GPIO_MC33880) += mc33880.o
@@ -13,9 +16,15 @@ obj-$(CONFIG_GPIO_MCP23S08) += mcp23s08.o
13obj-$(CONFIG_GPIO_PCA953X) += pca953x.o 16obj-$(CONFIG_GPIO_PCA953X) += pca953x.o
14obj-$(CONFIG_GPIO_PCF857X) += pcf857x.o 17obj-$(CONFIG_GPIO_PCF857X) += pcf857x.o
15obj-$(CONFIG_GPIO_PL061) += pl061.o 18obj-$(CONFIG_GPIO_PL061) += pl061.o
19obj-$(CONFIG_GPIO_TIMBERDALE) += timbgpio.o
16obj-$(CONFIG_GPIO_TWL4030) += twl4030-gpio.o 20obj-$(CONFIG_GPIO_TWL4030) += twl4030-gpio.o
17obj-$(CONFIG_GPIO_UCB1400) += ucb1400_gpio.o 21obj-$(CONFIG_GPIO_UCB1400) += ucb1400_gpio.o
18obj-$(CONFIG_GPIO_XILINX) += xilinx_gpio.o 22obj-$(CONFIG_GPIO_XILINX) += xilinx_gpio.o
23obj-$(CONFIG_GPIO_CS5535) += cs5535-gpio.o
19obj-$(CONFIG_GPIO_BT8XX) += bt8xxgpio.o 24obj-$(CONFIG_GPIO_BT8XX) += bt8xxgpio.o
25obj-$(CONFIG_GPIO_IT8761E) += it8761e_gpio.o
20obj-$(CONFIG_GPIO_VR41XX) += vr41xx_giu.o 26obj-$(CONFIG_GPIO_VR41XX) += vr41xx_giu.o
21obj-$(CONFIG_GPIO_WM831X) += wm831x-gpio.o 27obj-$(CONFIG_GPIO_WM831X) += wm831x-gpio.o
28obj-$(CONFIG_GPIO_WM8350) += wm8350-gpiolib.o
29obj-$(CONFIG_GPIO_WM8994) += wm8994-gpio.o
30obj-$(CONFIG_GPIO_SCH) += sch_gpio.o \ No newline at end of file
diff --git a/drivers/gpio/adp5520-gpio.c b/drivers/gpio/adp5520-gpio.c
index ad05bbc7ffd5..9f2781537001 100644
--- a/drivers/gpio/adp5520-gpio.c
+++ b/drivers/gpio/adp5520-gpio.c
@@ -7,6 +7,7 @@
7 */ 7 */
8 8
9#include <linux/module.h> 9#include <linux/module.h>
10#include <linux/slab.h>
10#include <linux/kernel.h> 11#include <linux/kernel.h>
11#include <linux/init.h> 12#include <linux/init.h>
12#include <linux/platform_device.h> 13#include <linux/platform_device.h>
@@ -34,9 +35,9 @@ static int adp5520_gpio_get_value(struct gpio_chip *chip, unsigned off)
34 */ 35 */
35 36
36 if (test_bit(off, &dev->output)) 37 if (test_bit(off, &dev->output))
37 adp5520_read(dev->master, GPIO_OUT, &reg_val); 38 adp5520_read(dev->master, ADP5520_GPIO_OUT, &reg_val);
38 else 39 else
39 adp5520_read(dev->master, GPIO_IN, &reg_val); 40 adp5520_read(dev->master, ADP5520_GPIO_IN, &reg_val);
40 41
41 return !!(reg_val & dev->lut[off]); 42 return !!(reg_val & dev->lut[off]);
42} 43}
@@ -48,9 +49,9 @@ static void adp5520_gpio_set_value(struct gpio_chip *chip,
48 dev = container_of(chip, struct adp5520_gpio, gpio_chip); 49 dev = container_of(chip, struct adp5520_gpio, gpio_chip);
49 50
50 if (val) 51 if (val)
51 adp5520_set_bits(dev->master, GPIO_OUT, dev->lut[off]); 52 adp5520_set_bits(dev->master, ADP5520_GPIO_OUT, dev->lut[off]);
52 else 53 else
53 adp5520_clr_bits(dev->master, GPIO_OUT, dev->lut[off]); 54 adp5520_clr_bits(dev->master, ADP5520_GPIO_OUT, dev->lut[off]);
54} 55}
55 56
56static int adp5520_gpio_direction_input(struct gpio_chip *chip, unsigned off) 57static int adp5520_gpio_direction_input(struct gpio_chip *chip, unsigned off)
@@ -60,7 +61,8 @@ static int adp5520_gpio_direction_input(struct gpio_chip *chip, unsigned off)
60 61
61 clear_bit(off, &dev->output); 62 clear_bit(off, &dev->output);
62 63
63 return adp5520_clr_bits(dev->master, GPIO_CFG_2, dev->lut[off]); 64 return adp5520_clr_bits(dev->master, ADP5520_GPIO_CFG_2,
65 dev->lut[off]);
64} 66}
65 67
66static int adp5520_gpio_direction_output(struct gpio_chip *chip, 68static int adp5520_gpio_direction_output(struct gpio_chip *chip,
@@ -73,18 +75,21 @@ static int adp5520_gpio_direction_output(struct gpio_chip *chip,
73 set_bit(off, &dev->output); 75 set_bit(off, &dev->output);
74 76
75 if (val) 77 if (val)
76 ret |= adp5520_set_bits(dev->master, GPIO_OUT, dev->lut[off]); 78 ret |= adp5520_set_bits(dev->master, ADP5520_GPIO_OUT,
79 dev->lut[off]);
77 else 80 else
78 ret |= adp5520_clr_bits(dev->master, GPIO_OUT, dev->lut[off]); 81 ret |= adp5520_clr_bits(dev->master, ADP5520_GPIO_OUT,
82 dev->lut[off]);
79 83
80 ret |= adp5520_set_bits(dev->master, GPIO_CFG_2, dev->lut[off]); 84 ret |= adp5520_set_bits(dev->master, ADP5520_GPIO_CFG_2,
85 dev->lut[off]);
81 86
82 return ret; 87 return ret;
83} 88}
84 89
85static int __devinit adp5520_gpio_probe(struct platform_device *pdev) 90static int __devinit adp5520_gpio_probe(struct platform_device *pdev)
86{ 91{
87 struct adp5520_gpio_platfrom_data *pdata = pdev->dev.platform_data; 92 struct adp5520_gpio_platform_data *pdata = pdev->dev.platform_data;
88 struct adp5520_gpio *dev; 93 struct adp5520_gpio *dev;
89 struct gpio_chip *gc; 94 struct gpio_chip *gc;
90 int ret, i, gpios; 95 int ret, i, gpios;
@@ -129,20 +134,20 @@ static int __devinit adp5520_gpio_probe(struct platform_device *pdev)
129 gc->label = pdev->name; 134 gc->label = pdev->name;
130 gc->owner = THIS_MODULE; 135 gc->owner = THIS_MODULE;
131 136
132 ret = adp5520_clr_bits(dev->master, GPIO_CFG_1, 137 ret = adp5520_clr_bits(dev->master, ADP5520_GPIO_CFG_1,
133 pdata->gpio_en_mask); 138 pdata->gpio_en_mask);
134 139
135 if (pdata->gpio_en_mask & GPIO_C3) 140 if (pdata->gpio_en_mask & ADP5520_GPIO_C3)
136 ctl_mask |= C3_MODE; 141 ctl_mask |= ADP5520_C3_MODE;
137 142
138 if (pdata->gpio_en_mask & GPIO_R3) 143 if (pdata->gpio_en_mask & ADP5520_GPIO_R3)
139 ctl_mask |= R3_MODE; 144 ctl_mask |= ADP5520_R3_MODE;
140 145
141 if (ctl_mask) 146 if (ctl_mask)
142 ret = adp5520_set_bits(dev->master, LED_CONTROL, 147 ret = adp5520_set_bits(dev->master, ADP5520_LED_CONTROL,
143 ctl_mask); 148 ctl_mask);
144 149
145 ret |= adp5520_set_bits(dev->master, GPIO_PULLUP, 150 ret |= adp5520_set_bits(dev->master, ADP5520_GPIO_PULLUP,
146 pdata->gpio_pullup_mask); 151 pdata->gpio_pullup_mask);
147 152
148 if (ret) { 153 if (ret) {
diff --git a/drivers/gpio/adp5588-gpio.c b/drivers/gpio/adp5588-gpio.c
new file mode 100644
index 000000000000..2e8e9e24f887
--- /dev/null
+++ b/drivers/gpio/adp5588-gpio.c
@@ -0,0 +1,267 @@
1/*
2 * GPIO Chip driver for Analog Devices
3 * ADP5588 I/O Expander and QWERTY Keypad Controller
4 *
5 * Copyright 2009 Analog Devices Inc.
6 *
7 * Licensed under the GPL-2 or later.
8 */
9
10#include <linux/module.h>
11#include <linux/kernel.h>
12#include <linux/slab.h>
13#include <linux/init.h>
14#include <linux/i2c.h>
15#include <linux/gpio.h>
16
17#include <linux/i2c/adp5588.h>
18
19#define DRV_NAME "adp5588-gpio"
20#define MAXGPIO 18
21#define ADP_BANK(offs) ((offs) >> 3)
22#define ADP_BIT(offs) (1u << ((offs) & 0x7))
23
24struct adp5588_gpio {
25 struct i2c_client *client;
26 struct gpio_chip gpio_chip;
27 struct mutex lock; /* protect cached dir, dat_out */
28 unsigned gpio_start;
29 uint8_t dat_out[3];
30 uint8_t dir[3];
31};
32
33static int adp5588_gpio_read(struct i2c_client *client, u8 reg)
34{
35 int ret = i2c_smbus_read_byte_data(client, reg);
36
37 if (ret < 0)
38 dev_err(&client->dev, "Read Error\n");
39
40 return ret;
41}
42
43static int adp5588_gpio_write(struct i2c_client *client, u8 reg, u8 val)
44{
45 int ret = i2c_smbus_write_byte_data(client, reg, val);
46
47 if (ret < 0)
48 dev_err(&client->dev, "Write Error\n");
49
50 return ret;
51}
52
53static int adp5588_gpio_get_value(struct gpio_chip *chip, unsigned off)
54{
55 struct adp5588_gpio *dev =
56 container_of(chip, struct adp5588_gpio, gpio_chip);
57
58 return !!(adp5588_gpio_read(dev->client, GPIO_DAT_STAT1 + ADP_BANK(off))
59 & ADP_BIT(off));
60}
61
62static void adp5588_gpio_set_value(struct gpio_chip *chip,
63 unsigned off, int val)
64{
65 unsigned bank, bit;
66 struct adp5588_gpio *dev =
67 container_of(chip, struct adp5588_gpio, gpio_chip);
68
69 bank = ADP_BANK(off);
70 bit = ADP_BIT(off);
71
72 mutex_lock(&dev->lock);
73 if (val)
74 dev->dat_out[bank] |= bit;
75 else
76 dev->dat_out[bank] &= ~bit;
77
78 adp5588_gpio_write(dev->client, GPIO_DAT_OUT1 + bank,
79 dev->dat_out[bank]);
80 mutex_unlock(&dev->lock);
81}
82
83static int adp5588_gpio_direction_input(struct gpio_chip *chip, unsigned off)
84{
85 int ret;
86 unsigned bank;
87 struct adp5588_gpio *dev =
88 container_of(chip, struct adp5588_gpio, gpio_chip);
89
90 bank = ADP_BANK(off);
91
92 mutex_lock(&dev->lock);
93 dev->dir[bank] &= ~ADP_BIT(off);
94 ret = adp5588_gpio_write(dev->client, GPIO_DIR1 + bank, dev->dir[bank]);
95 mutex_unlock(&dev->lock);
96
97 return ret;
98}
99
100static int adp5588_gpio_direction_output(struct gpio_chip *chip,
101 unsigned off, int val)
102{
103 int ret;
104 unsigned bank, bit;
105 struct adp5588_gpio *dev =
106 container_of(chip, struct adp5588_gpio, gpio_chip);
107
108 bank = ADP_BANK(off);
109 bit = ADP_BIT(off);
110
111 mutex_lock(&dev->lock);
112 dev->dir[bank] |= bit;
113
114 if (val)
115 dev->dat_out[bank] |= bit;
116 else
117 dev->dat_out[bank] &= ~bit;
118
119 ret = adp5588_gpio_write(dev->client, GPIO_DAT_OUT1 + bank,
120 dev->dat_out[bank]);
121 ret |= adp5588_gpio_write(dev->client, GPIO_DIR1 + bank,
122 dev->dir[bank]);
123 mutex_unlock(&dev->lock);
124
125 return ret;
126}
127
128static int __devinit adp5588_gpio_probe(struct i2c_client *client,
129 const struct i2c_device_id *id)
130{
131 struct adp5588_gpio_platform_data *pdata = client->dev.platform_data;
132 struct adp5588_gpio *dev;
133 struct gpio_chip *gc;
134 int ret, i, revid;
135
136 if (pdata == NULL) {
137 dev_err(&client->dev, "missing platform data\n");
138 return -ENODEV;
139 }
140
141 if (!i2c_check_functionality(client->adapter,
142 I2C_FUNC_SMBUS_BYTE_DATA)) {
143 dev_err(&client->dev, "SMBUS Byte Data not Supported\n");
144 return -EIO;
145 }
146
147 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
148 if (dev == NULL) {
149 dev_err(&client->dev, "failed to alloc memory\n");
150 return -ENOMEM;
151 }
152
153 dev->client = client;
154
155 gc = &dev->gpio_chip;
156 gc->direction_input = adp5588_gpio_direction_input;
157 gc->direction_output = adp5588_gpio_direction_output;
158 gc->get = adp5588_gpio_get_value;
159 gc->set = adp5588_gpio_set_value;
160 gc->can_sleep = 1;
161
162 gc->base = pdata->gpio_start;
163 gc->ngpio = MAXGPIO;
164 gc->label = client->name;
165 gc->owner = THIS_MODULE;
166
167 mutex_init(&dev->lock);
168
169
170 ret = adp5588_gpio_read(dev->client, DEV_ID);
171 if (ret < 0)
172 goto err;
173
174 revid = ret & ADP5588_DEVICE_ID_MASK;
175
176 for (i = 0, ret = 0; i <= ADP_BANK(MAXGPIO); i++) {
177 dev->dat_out[i] = adp5588_gpio_read(client, GPIO_DAT_OUT1 + i);
178 dev->dir[i] = adp5588_gpio_read(client, GPIO_DIR1 + i);
179 ret |= adp5588_gpio_write(client, KP_GPIO1 + i, 0);
180 ret |= adp5588_gpio_write(client, GPIO_PULL1 + i,
181 (pdata->pullup_dis_mask >> (8 * i)) & 0xFF);
182
183 if (ret)
184 goto err;
185 }
186
187 ret = gpiochip_add(&dev->gpio_chip);
188 if (ret)
189 goto err;
190
191 dev_info(&client->dev, "gpios %d..%d on a %s Rev. %d\n",
192 gc->base, gc->base + gc->ngpio - 1,
193 client->name, revid);
194
195 if (pdata->setup) {
196 ret = pdata->setup(client, gc->base, gc->ngpio, pdata->context);
197 if (ret < 0)
198 dev_warn(&client->dev, "setup failed, %d\n", ret);
199 }
200
201 i2c_set_clientdata(client, dev);
202 return 0;
203
204err:
205 kfree(dev);
206 return ret;
207}
208
209static int __devexit adp5588_gpio_remove(struct i2c_client *client)
210{
211 struct adp5588_gpio_platform_data *pdata = client->dev.platform_data;
212 struct adp5588_gpio *dev = i2c_get_clientdata(client);
213 int ret;
214
215 if (pdata->teardown) {
216 ret = pdata->teardown(client,
217 dev->gpio_chip.base, dev->gpio_chip.ngpio,
218 pdata->context);
219 if (ret < 0) {
220 dev_err(&client->dev, "teardown failed %d\n", ret);
221 return ret;
222 }
223 }
224
225 ret = gpiochip_remove(&dev->gpio_chip);
226 if (ret) {
227 dev_err(&client->dev, "gpiochip_remove failed %d\n", ret);
228 return ret;
229 }
230
231 kfree(dev);
232 return 0;
233}
234
235static const struct i2c_device_id adp5588_gpio_id[] = {
236 {DRV_NAME, 0},
237 {}
238};
239
240MODULE_DEVICE_TABLE(i2c, adp5588_gpio_id);
241
242static struct i2c_driver adp5588_gpio_driver = {
243 .driver = {
244 .name = DRV_NAME,
245 },
246 .probe = adp5588_gpio_probe,
247 .remove = __devexit_p(adp5588_gpio_remove),
248 .id_table = adp5588_gpio_id,
249};
250
251static int __init adp5588_gpio_init(void)
252{
253 return i2c_add_driver(&adp5588_gpio_driver);
254}
255
256module_init(adp5588_gpio_init);
257
258static void __exit adp5588_gpio_exit(void)
259{
260 i2c_del_driver(&adp5588_gpio_driver);
261}
262
263module_exit(adp5588_gpio_exit);
264
265MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
266MODULE_DESCRIPTION("GPIO ADP5588 Driver");
267MODULE_LICENSE("GPL");
diff --git a/drivers/gpio/bt8xxgpio.c b/drivers/gpio/bt8xxgpio.c
index 2559f2289409..aa4f09ad3ced 100644
--- a/drivers/gpio/bt8xxgpio.c
+++ b/drivers/gpio/bt8xxgpio.c
@@ -47,6 +47,7 @@
47#include <linux/pci.h> 47#include <linux/pci.h>
48#include <linux/spinlock.h> 48#include <linux/spinlock.h>
49#include <linux/gpio.h> 49#include <linux/gpio.h>
50#include <linux/slab.h>
50 51
51/* Steal the hardware definitions from the bttv driver. */ 52/* Steal the hardware definitions from the bttv driver. */
52#include "../media/video/bt8xx/bt848.h" 53#include "../media/video/bt8xx/bt848.h"
diff --git a/drivers/gpio/cs5535-gpio.c b/drivers/gpio/cs5535-gpio.c
new file mode 100644
index 000000000000..0c3c498f2260
--- /dev/null
+++ b/drivers/gpio/cs5535-gpio.c
@@ -0,0 +1,357 @@
1/*
2 * AMD CS5535/CS5536 GPIO driver
3 * Copyright (C) 2006 Advanced Micro Devices, Inc.
4 * Copyright (C) 2007-2009 Andres Salomon <dilinger@collabora.co.uk>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of version 2 of the GNU General Public License
8 * as published by the Free Software Foundation.
9 */
10
11#include <linux/kernel.h>
12#include <linux/spinlock.h>
13#include <linux/module.h>
14#include <linux/pci.h>
15#include <linux/gpio.h>
16#include <linux/io.h>
17#include <linux/cs5535.h>
18
19#define DRV_NAME "cs5535-gpio"
20#define GPIO_BAR 1
21
22/*
23 * Some GPIO pins
24 * 31-29,23 : reserved (always mask out)
25 * 28 : Power Button
26 * 26 : PME#
27 * 22-16 : LPC
28 * 14,15 : SMBus
29 * 9,8 : UART1
30 * 7 : PCI INTB
31 * 3,4 : UART2/DDC
32 * 2 : IDE_IRQ0
33 * 1 : AC_BEEP
34 * 0 : PCI INTA
35 *
36 * If a mask was not specified, allow all except
37 * reserved and Power Button
38 */
39#define GPIO_DEFAULT_MASK 0x0F7FFFFF
40
41static ulong mask = GPIO_DEFAULT_MASK;
42module_param_named(mask, mask, ulong, 0444);
43MODULE_PARM_DESC(mask, "GPIO channel mask.");
44
45static struct cs5535_gpio_chip {
46 struct gpio_chip chip;
47 resource_size_t base;
48
49 struct pci_dev *pdev;
50 spinlock_t lock;
51} cs5535_gpio_chip;
52
53/*
54 * The CS5535/CS5536 GPIOs support a number of extra features not defined
55 * by the gpio_chip API, so these are exported. For a full list of the
56 * registers, see include/linux/cs5535.h.
57 */
58
59static void __cs5535_gpio_set(struct cs5535_gpio_chip *chip, unsigned offset,
60 unsigned int reg)
61{
62 if (offset < 16)
63 /* low bank register */
64 outl(1 << offset, chip->base + reg);
65 else
66 /* high bank register */
67 outl(1 << (offset - 16), chip->base + 0x80 + reg);
68}
69
70void cs5535_gpio_set(unsigned offset, unsigned int reg)
71{
72 struct cs5535_gpio_chip *chip = &cs5535_gpio_chip;
73 unsigned long flags;
74
75 spin_lock_irqsave(&chip->lock, flags);
76 __cs5535_gpio_set(chip, offset, reg);
77 spin_unlock_irqrestore(&chip->lock, flags);
78}
79EXPORT_SYMBOL_GPL(cs5535_gpio_set);
80
81static void __cs5535_gpio_clear(struct cs5535_gpio_chip *chip, unsigned offset,
82 unsigned int reg)
83{
84 if (offset < 16)
85 /* low bank register */
86 outl(1 << (offset + 16), chip->base + reg);
87 else
88 /* high bank register */
89 outl(1 << offset, chip->base + 0x80 + reg);
90}
91
92void cs5535_gpio_clear(unsigned offset, unsigned int reg)
93{
94 struct cs5535_gpio_chip *chip = &cs5535_gpio_chip;
95 unsigned long flags;
96
97 spin_lock_irqsave(&chip->lock, flags);
98 __cs5535_gpio_clear(chip, offset, reg);
99 spin_unlock_irqrestore(&chip->lock, flags);
100}
101EXPORT_SYMBOL_GPL(cs5535_gpio_clear);
102
103int cs5535_gpio_isset(unsigned offset, unsigned int reg)
104{
105 struct cs5535_gpio_chip *chip = &cs5535_gpio_chip;
106 unsigned long flags;
107 long val;
108
109 spin_lock_irqsave(&chip->lock, flags);
110 if (offset < 16)
111 /* low bank register */
112 val = inl(chip->base + reg);
113 else {
114 /* high bank register */
115 val = inl(chip->base + 0x80 + reg);
116 offset -= 16;
117 }
118 spin_unlock_irqrestore(&chip->lock, flags);
119
120 return (val & (1 << offset)) ? 1 : 0;
121}
122EXPORT_SYMBOL_GPL(cs5535_gpio_isset);
123
124/*
125 * Generic gpio_chip API support.
126 */
127
128static int chip_gpio_request(struct gpio_chip *c, unsigned offset)
129{
130 struct cs5535_gpio_chip *chip = (struct cs5535_gpio_chip *) c;
131 unsigned long flags;
132
133 spin_lock_irqsave(&chip->lock, flags);
134
135 /* check if this pin is available */
136 if ((mask & (1 << offset)) == 0) {
137 dev_info(&chip->pdev->dev,
138 "pin %u is not available (check mask)\n", offset);
139 spin_unlock_irqrestore(&chip->lock, flags);
140 return -EINVAL;
141 }
142
143 /* disable output aux 1 & 2 on this pin */
144 __cs5535_gpio_clear(chip, offset, GPIO_OUTPUT_AUX1);
145 __cs5535_gpio_clear(chip, offset, GPIO_OUTPUT_AUX2);
146
147 /* disable input aux 1 on this pin */
148 __cs5535_gpio_clear(chip, offset, GPIO_INPUT_AUX1);
149
150 spin_unlock_irqrestore(&chip->lock, flags);
151
152 return 0;
153}
154
155static int chip_gpio_get(struct gpio_chip *chip, unsigned offset)
156{
157 return cs5535_gpio_isset(offset, GPIO_READ_BACK);
158}
159
160static void chip_gpio_set(struct gpio_chip *chip, unsigned offset, int val)
161{
162 if (val)
163 cs5535_gpio_set(offset, GPIO_OUTPUT_VAL);
164 else
165 cs5535_gpio_clear(offset, GPIO_OUTPUT_VAL);
166}
167
168static int chip_direction_input(struct gpio_chip *c, unsigned offset)
169{
170 struct cs5535_gpio_chip *chip = (struct cs5535_gpio_chip *) c;
171 unsigned long flags;
172
173 spin_lock_irqsave(&chip->lock, flags);
174 __cs5535_gpio_set(chip, offset, GPIO_INPUT_ENABLE);
175 __cs5535_gpio_clear(chip, offset, GPIO_OUTPUT_ENABLE);
176 spin_unlock_irqrestore(&chip->lock, flags);
177
178 return 0;
179}
180
181static int chip_direction_output(struct gpio_chip *c, unsigned offset, int val)
182{
183 struct cs5535_gpio_chip *chip = (struct cs5535_gpio_chip *) c;
184 unsigned long flags;
185
186 spin_lock_irqsave(&chip->lock, flags);
187
188 __cs5535_gpio_set(chip, offset, GPIO_INPUT_ENABLE);
189 __cs5535_gpio_set(chip, offset, GPIO_OUTPUT_ENABLE);
190 if (val)
191 __cs5535_gpio_set(chip, offset, GPIO_OUTPUT_VAL);
192 else
193 __cs5535_gpio_clear(chip, offset, GPIO_OUTPUT_VAL);
194
195 spin_unlock_irqrestore(&chip->lock, flags);
196
197 return 0;
198}
199
200static char *cs5535_gpio_names[] = {
201 "GPIO0", "GPIO1", "GPIO2", "GPIO3",
202 "GPIO4", "GPIO5", "GPIO6", "GPIO7",
203 "GPIO8", "GPIO9", "GPIO10", "GPIO11",
204 "GPIO12", "GPIO13", "GPIO14", "GPIO15",
205 "GPIO16", "GPIO17", "GPIO18", "GPIO19",
206 "GPIO20", "GPIO21", "GPIO22", NULL,
207 "GPIO24", "GPIO25", "GPIO26", "GPIO27",
208 "GPIO28", NULL, NULL, NULL,
209};
210
211static struct cs5535_gpio_chip cs5535_gpio_chip = {
212 .chip = {
213 .owner = THIS_MODULE,
214 .label = DRV_NAME,
215
216 .base = 0,
217 .ngpio = 32,
218 .names = cs5535_gpio_names,
219 .request = chip_gpio_request,
220
221 .get = chip_gpio_get,
222 .set = chip_gpio_set,
223
224 .direction_input = chip_direction_input,
225 .direction_output = chip_direction_output,
226 },
227};
228
229static int __init cs5535_gpio_probe(struct pci_dev *pdev,
230 const struct pci_device_id *pci_id)
231{
232 int err;
233 ulong mask_orig = mask;
234
235 /* There are two ways to get the GPIO base address; one is by
236 * fetching it from MSR_LBAR_GPIO, the other is by reading the
237 * PCI BAR info. The latter method is easier (especially across
238 * different architectures), so we'll stick with that for now. If
239 * it turns out to be unreliable in the face of crappy BIOSes, we
240 * can always go back to using MSRs.. */
241
242 err = pci_enable_device_io(pdev);
243 if (err) {
244 dev_err(&pdev->dev, "can't enable device IO\n");
245 goto done;
246 }
247
248 err = pci_request_region(pdev, GPIO_BAR, DRV_NAME);
249 if (err) {
250 dev_err(&pdev->dev, "can't alloc PCI BAR #%d\n", GPIO_BAR);
251 goto done;
252 }
253
254 /* set up the driver-specific struct */
255 cs5535_gpio_chip.base = pci_resource_start(pdev, GPIO_BAR);
256 cs5535_gpio_chip.pdev = pdev;
257 spin_lock_init(&cs5535_gpio_chip.lock);
258
259 dev_info(&pdev->dev, "allocated PCI BAR #%d: base 0x%llx\n", GPIO_BAR,
260 (unsigned long long) cs5535_gpio_chip.base);
261
262 /* mask out reserved pins */
263 mask &= 0x1F7FFFFF;
264
265 /* do not allow pin 28, Power Button, as there's special handling
266 * in the PMC needed. (note 12, p. 48) */
267 mask &= ~(1 << 28);
268
269 if (mask_orig != mask)
270 dev_info(&pdev->dev, "mask changed from 0x%08lX to 0x%08lX\n",
271 mask_orig, mask);
272
273 /* finally, register with the generic GPIO API */
274 err = gpiochip_add(&cs5535_gpio_chip.chip);
275 if (err)
276 goto release_region;
277
278 dev_info(&pdev->dev, DRV_NAME ": GPIO support successfully loaded.\n");
279 return 0;
280
281release_region:
282 pci_release_region(pdev, GPIO_BAR);
283done:
284 return err;
285}
286
287static void __exit cs5535_gpio_remove(struct pci_dev *pdev)
288{
289 int err;
290
291 err = gpiochip_remove(&cs5535_gpio_chip.chip);
292 if (err) {
293 /* uhh? */
294 dev_err(&pdev->dev, "unable to remove gpio_chip?\n");
295 }
296 pci_release_region(pdev, GPIO_BAR);
297}
298
299static struct pci_device_id cs5535_gpio_pci_tbl[] = {
300 { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_CS5535_ISA) },
301 { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_ISA) },
302 { 0, },
303};
304MODULE_DEVICE_TABLE(pci, cs5535_gpio_pci_tbl);
305
306/*
307 * We can't use the standard PCI driver registration stuff here, since
308 * that allows only one driver to bind to each PCI device (and we want
309 * multiple drivers to be able to bind to the device). Instead, manually
310 * scan for the PCI device, request a single region, and keep track of the
311 * devices that we're using.
312 */
313
314static int __init cs5535_gpio_scan_pci(void)
315{
316 struct pci_dev *pdev;
317 int err = -ENODEV;
318 int i;
319
320 for (i = 0; i < ARRAY_SIZE(cs5535_gpio_pci_tbl); i++) {
321 pdev = pci_get_device(cs5535_gpio_pci_tbl[i].vendor,
322 cs5535_gpio_pci_tbl[i].device, NULL);
323 if (pdev) {
324 err = cs5535_gpio_probe(pdev, &cs5535_gpio_pci_tbl[i]);
325 if (err)
326 pci_dev_put(pdev);
327
328 /* we only support a single CS5535/6 southbridge */
329 break;
330 }
331 }
332
333 return err;
334}
335
336static void __exit cs5535_gpio_free_pci(void)
337{
338 cs5535_gpio_remove(cs5535_gpio_chip.pdev);
339 pci_dev_put(cs5535_gpio_chip.pdev);
340}
341
342static int __init cs5535_gpio_init(void)
343{
344 return cs5535_gpio_scan_pci();
345}
346
347static void __exit cs5535_gpio_exit(void)
348{
349 cs5535_gpio_free_pci();
350}
351
352module_init(cs5535_gpio_init);
353module_exit(cs5535_gpio_exit);
354
355MODULE_AUTHOR("Andres Salomon <dilinger@collabora.co.uk>");
356MODULE_DESCRIPTION("AMD CS5535/CS5536 GPIO driver");
357MODULE_LICENSE("GPL");
diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c
index 50de0f5750d8..eb0c3fe44b29 100644
--- a/drivers/gpio/gpiolib.c
+++ b/drivers/gpio/gpiolib.c
@@ -9,6 +9,7 @@
9#include <linux/seq_file.h> 9#include <linux/seq_file.h>
10#include <linux/gpio.h> 10#include <linux/gpio.h>
11#include <linux/idr.h> 11#include <linux/idr.h>
12#include <linux/slab.h>
12 13
13 14
14/* Optional implementation infrastructure for GPIO interfaces. 15/* Optional implementation infrastructure for GPIO interfaces.
@@ -53,6 +54,7 @@ struct gpio_desc {
53#define FLAG_SYSFS 4 /* exported via /sys/class/gpio/control */ 54#define FLAG_SYSFS 4 /* exported via /sys/class/gpio/control */
54#define FLAG_TRIG_FALL 5 /* trigger on falling edge */ 55#define FLAG_TRIG_FALL 5 /* trigger on falling edge */
55#define FLAG_TRIG_RISE 6 /* trigger on rising edge */ 56#define FLAG_TRIG_RISE 6 /* trigger on rising edge */
57#define FLAG_ACTIVE_LOW 7 /* sysfs value has active low */
56 58
57#define PDESC_ID_SHIFT 16 /* add new flags before this one */ 59#define PDESC_ID_SHIFT 16 /* add new flags before this one */
58 60
@@ -210,6 +212,11 @@ static DEFINE_MUTEX(sysfs_lock);
210 * * configures behavior of poll(2) on /value 212 * * configures behavior of poll(2) on /value
211 * * available only if pin can generate IRQs on input 213 * * available only if pin can generate IRQs on input
212 * * is read/write as "none", "falling", "rising", or "both" 214 * * is read/write as "none", "falling", "rising", or "both"
215 * /active_low
216 * * configures polarity of /value
217 * * is read/write as zero/nonzero
218 * * also affects existing and subsequent "falling" and "rising"
219 * /edge configuration
213 */ 220 */
214 221
215static ssize_t gpio_direction_show(struct device *dev, 222static ssize_t gpio_direction_show(struct device *dev,
@@ -255,7 +262,7 @@ static ssize_t gpio_direction_store(struct device *dev,
255 return status ? : size; 262 return status ? : size;
256} 263}
257 264
258static const DEVICE_ATTR(direction, 0644, 265static /* const */ DEVICE_ATTR(direction, 0644,
259 gpio_direction_show, gpio_direction_store); 266 gpio_direction_show, gpio_direction_store);
260 267
261static ssize_t gpio_value_show(struct device *dev, 268static ssize_t gpio_value_show(struct device *dev,
@@ -267,10 +274,17 @@ static ssize_t gpio_value_show(struct device *dev,
267 274
268 mutex_lock(&sysfs_lock); 275 mutex_lock(&sysfs_lock);
269 276
270 if (!test_bit(FLAG_EXPORT, &desc->flags)) 277 if (!test_bit(FLAG_EXPORT, &desc->flags)) {
271 status = -EIO; 278 status = -EIO;
272 else 279 } else {
273 status = sprintf(buf, "%d\n", !!gpio_get_value_cansleep(gpio)); 280 int value;
281
282 value = !!gpio_get_value_cansleep(gpio);
283 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
284 value = !value;
285
286 status = sprintf(buf, "%d\n", value);
287 }
274 288
275 mutex_unlock(&sysfs_lock); 289 mutex_unlock(&sysfs_lock);
276 return status; 290 return status;
@@ -294,6 +308,8 @@ static ssize_t gpio_value_store(struct device *dev,
294 308
295 status = strict_strtol(buf, 0, &value); 309 status = strict_strtol(buf, 0, &value);
296 if (status == 0) { 310 if (status == 0) {
311 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
312 value = !value;
297 gpio_set_value_cansleep(gpio, value != 0); 313 gpio_set_value_cansleep(gpio, value != 0);
298 status = size; 314 status = size;
299 } 315 }
@@ -303,7 +319,7 @@ static ssize_t gpio_value_store(struct device *dev,
303 return status; 319 return status;
304} 320}
305 321
306static /*const*/ DEVICE_ATTR(value, 0644, 322static const DEVICE_ATTR(value, 0644,
307 gpio_value_show, gpio_value_store); 323 gpio_value_show, gpio_value_store);
308 324
309static irqreturn_t gpio_sysfs_irq(int irq, void *priv) 325static irqreturn_t gpio_sysfs_irq(int irq, void *priv)
@@ -352,9 +368,11 @@ static int gpio_setup_irq(struct gpio_desc *desc, struct device *dev,
352 368
353 irq_flags = IRQF_SHARED; 369 irq_flags = IRQF_SHARED;
354 if (test_bit(FLAG_TRIG_FALL, &gpio_flags)) 370 if (test_bit(FLAG_TRIG_FALL, &gpio_flags))
355 irq_flags |= IRQF_TRIGGER_FALLING; 371 irq_flags |= test_bit(FLAG_ACTIVE_LOW, &desc->flags) ?
372 IRQF_TRIGGER_RISING : IRQF_TRIGGER_FALLING;
356 if (test_bit(FLAG_TRIG_RISE, &gpio_flags)) 373 if (test_bit(FLAG_TRIG_RISE, &gpio_flags))
357 irq_flags |= IRQF_TRIGGER_RISING; 374 irq_flags |= test_bit(FLAG_ACTIVE_LOW, &desc->flags) ?
375 IRQF_TRIGGER_FALLING : IRQF_TRIGGER_RISING;
358 376
359 if (!pdesc) { 377 if (!pdesc) {
360 pdesc = kmalloc(sizeof(*pdesc), GFP_KERNEL); 378 pdesc = kmalloc(sizeof(*pdesc), GFP_KERNEL);
@@ -398,7 +416,8 @@ static int gpio_setup_irq(struct gpio_desc *desc, struct device *dev,
398 return 0; 416 return 0;
399 417
400free_sd: 418free_sd:
401 sysfs_put(pdesc->value_sd); 419 if (pdesc)
420 sysfs_put(pdesc->value_sd);
402free_id: 421free_id:
403 idr_remove(&pdesc_idr, id); 422 idr_remove(&pdesc_idr, id);
404 desc->flags &= GPIO_FLAGS_MASK; 423 desc->flags &= GPIO_FLAGS_MASK;
@@ -475,9 +494,79 @@ found:
475 494
476static DEVICE_ATTR(edge, 0644, gpio_edge_show, gpio_edge_store); 495static DEVICE_ATTR(edge, 0644, gpio_edge_show, gpio_edge_store);
477 496
497static int sysfs_set_active_low(struct gpio_desc *desc, struct device *dev,
498 int value)
499{
500 int status = 0;
501
502 if (!!test_bit(FLAG_ACTIVE_LOW, &desc->flags) == !!value)
503 return 0;
504
505 if (value)
506 set_bit(FLAG_ACTIVE_LOW, &desc->flags);
507 else
508 clear_bit(FLAG_ACTIVE_LOW, &desc->flags);
509
510 /* reconfigure poll(2) support if enabled on one edge only */
511 if (dev != NULL && (!!test_bit(FLAG_TRIG_RISE, &desc->flags) ^
512 !!test_bit(FLAG_TRIG_FALL, &desc->flags))) {
513 unsigned long trigger_flags = desc->flags & GPIO_TRIGGER_MASK;
514
515 gpio_setup_irq(desc, dev, 0);
516 status = gpio_setup_irq(desc, dev, trigger_flags);
517 }
518
519 return status;
520}
521
522static ssize_t gpio_active_low_show(struct device *dev,
523 struct device_attribute *attr, char *buf)
524{
525 const struct gpio_desc *desc = dev_get_drvdata(dev);
526 ssize_t status;
527
528 mutex_lock(&sysfs_lock);
529
530 if (!test_bit(FLAG_EXPORT, &desc->flags))
531 status = -EIO;
532 else
533 status = sprintf(buf, "%d\n",
534 !!test_bit(FLAG_ACTIVE_LOW, &desc->flags));
535
536 mutex_unlock(&sysfs_lock);
537
538 return status;
539}
540
541static ssize_t gpio_active_low_store(struct device *dev,
542 struct device_attribute *attr, const char *buf, size_t size)
543{
544 struct gpio_desc *desc = dev_get_drvdata(dev);
545 ssize_t status;
546
547 mutex_lock(&sysfs_lock);
548
549 if (!test_bit(FLAG_EXPORT, &desc->flags)) {
550 status = -EIO;
551 } else {
552 long value;
553
554 status = strict_strtol(buf, 0, &value);
555 if (status == 0)
556 status = sysfs_set_active_low(desc, dev, value != 0);
557 }
558
559 mutex_unlock(&sysfs_lock);
560
561 return status ? : size;
562}
563
564static const DEVICE_ATTR(active_low, 0644,
565 gpio_active_low_show, gpio_active_low_store);
566
478static const struct attribute *gpio_attrs[] = { 567static const struct attribute *gpio_attrs[] = {
479 &dev_attr_direction.attr,
480 &dev_attr_value.attr, 568 &dev_attr_value.attr,
569 &dev_attr_active_low.attr,
481 NULL, 570 NULL,
482}; 571};
483 572
@@ -536,7 +625,9 @@ static const struct attribute_group gpiochip_attr_group = {
536 * /sys/class/gpio/unexport ... write-only 625 * /sys/class/gpio/unexport ... write-only
537 * integer N ... number of GPIO to unexport 626 * integer N ... number of GPIO to unexport
538 */ 627 */
539static ssize_t export_store(struct class *class, const char *buf, size_t len) 628static ssize_t export_store(struct class *class,
629 struct class_attribute *attr,
630 const char *buf, size_t len)
540{ 631{
541 long gpio; 632 long gpio;
542 int status; 633 int status;
@@ -566,7 +657,9 @@ done:
566 return status ? : len; 657 return status ? : len;
567} 658}
568 659
569static ssize_t unexport_store(struct class *class, const char *buf, size_t len) 660static ssize_t unexport_store(struct class *class,
661 struct class_attribute *attr,
662 const char *buf, size_t len)
570{ 663{
571 long gpio; 664 long gpio;
572 int status; 665 int status;
@@ -662,12 +755,12 @@ int gpio_export(unsigned gpio, bool direction_may_change)
662 dev = device_create(&gpio_class, desc->chip->dev, MKDEV(0, 0), 755 dev = device_create(&gpio_class, desc->chip->dev, MKDEV(0, 0),
663 desc, ioname ? ioname : "gpio%d", gpio); 756 desc, ioname ? ioname : "gpio%d", gpio);
664 if (!IS_ERR(dev)) { 757 if (!IS_ERR(dev)) {
665 if (direction_may_change) 758 status = sysfs_create_group(&dev->kobj,
666 status = sysfs_create_group(&dev->kobj,
667 &gpio_attr_group); 759 &gpio_attr_group);
668 else 760
761 if (!status && direction_may_change)
669 status = device_create_file(dev, 762 status = device_create_file(dev,
670 &dev_attr_value); 763 &dev_attr_direction);
671 764
672 if (!status && gpio_to_irq(gpio) >= 0 765 if (!status && gpio_to_irq(gpio) >= 0
673 && (direction_may_change 766 && (direction_may_change
@@ -744,6 +837,53 @@ done:
744} 837}
745EXPORT_SYMBOL_GPL(gpio_export_link); 838EXPORT_SYMBOL_GPL(gpio_export_link);
746 839
840
841/**
842 * gpio_sysfs_set_active_low - set the polarity of gpio sysfs value
843 * @gpio: gpio to change
844 * @value: non-zero to use active low, i.e. inverted values
845 *
846 * Set the polarity of /sys/class/gpio/gpioN/value sysfs attribute.
847 * The GPIO does not have to be exported yet. If poll(2) support has
848 * been enabled for either rising or falling edge, it will be
849 * reconfigured to follow the new polarity.
850 *
851 * Returns zero on success, else an error.
852 */
853int gpio_sysfs_set_active_low(unsigned gpio, int value)
854{
855 struct gpio_desc *desc;
856 struct device *dev = NULL;
857 int status = -EINVAL;
858
859 if (!gpio_is_valid(gpio))
860 goto done;
861
862 mutex_lock(&sysfs_lock);
863
864 desc = &gpio_desc[gpio];
865
866 if (test_bit(FLAG_EXPORT, &desc->flags)) {
867 dev = class_find_device(&gpio_class, NULL, desc, match_export);
868 if (dev == NULL) {
869 status = -ENODEV;
870 goto unlock;
871 }
872 }
873
874 status = sysfs_set_active_low(desc, dev, value);
875
876unlock:
877 mutex_unlock(&sysfs_lock);
878
879done:
880 if (status)
881 pr_debug("%s: gpio%d status %d\n", __func__, gpio, status);
882
883 return status;
884}
885EXPORT_SYMBOL_GPL(gpio_sysfs_set_active_low);
886
747/** 887/**
748 * gpio_unexport - reverse effect of gpio_export() 888 * gpio_unexport - reverse effect of gpio_export()
749 * @gpio: gpio to make unavailable 889 * @gpio: gpio to make unavailable
@@ -1094,6 +1234,7 @@ void gpio_free(unsigned gpio)
1094 } 1234 }
1095 desc_set_label(desc, NULL); 1235 desc_set_label(desc, NULL);
1096 module_put(desc->chip->owner); 1236 module_put(desc->chip->owner);
1237 clear_bit(FLAG_ACTIVE_LOW, &desc->flags);
1097 clear_bit(FLAG_REQUESTED, &desc->flags); 1238 clear_bit(FLAG_REQUESTED, &desc->flags);
1098 } else 1239 } else
1099 WARN_ON(extra_checks); 1240 WARN_ON(extra_checks);
@@ -1102,6 +1243,64 @@ void gpio_free(unsigned gpio)
1102} 1243}
1103EXPORT_SYMBOL_GPL(gpio_free); 1244EXPORT_SYMBOL_GPL(gpio_free);
1104 1245
1246/**
1247 * gpio_request_one - request a single GPIO with initial configuration
1248 * @gpio: the GPIO number
1249 * @flags: GPIO configuration as specified by GPIOF_*
1250 * @label: a literal description string of this GPIO
1251 */
1252int gpio_request_one(unsigned gpio, unsigned long flags, const char *label)
1253{
1254 int err;
1255
1256 err = gpio_request(gpio, label);
1257 if (err)
1258 return err;
1259
1260 if (flags & GPIOF_DIR_IN)
1261 err = gpio_direction_input(gpio);
1262 else
1263 err = gpio_direction_output(gpio,
1264 (flags & GPIOF_INIT_HIGH) ? 1 : 0);
1265
1266 return err;
1267}
1268EXPORT_SYMBOL_GPL(gpio_request_one);
1269
1270/**
1271 * gpio_request_array - request multiple GPIOs in a single call
1272 * @array: array of the 'struct gpio'
1273 * @num: how many GPIOs in the array
1274 */
1275int gpio_request_array(struct gpio *array, size_t num)
1276{
1277 int i, err;
1278
1279 for (i = 0; i < num; i++, array++) {
1280 err = gpio_request_one(array->gpio, array->flags, array->label);
1281 if (err)
1282 goto err_free;
1283 }
1284 return 0;
1285
1286err_free:
1287 while (i--)
1288 gpio_free((--array)->gpio);
1289 return err;
1290}
1291EXPORT_SYMBOL_GPL(gpio_request_array);
1292
1293/**
1294 * gpio_free_array - release multiple GPIOs in a single call
1295 * @array: array of the 'struct gpio'
1296 * @num: how many GPIOs in the array
1297 */
1298void gpio_free_array(struct gpio *array, size_t num)
1299{
1300 while (num--)
1301 gpio_free((array++)->gpio);
1302}
1303EXPORT_SYMBOL_GPL(gpio_free_array);
1105 1304
1106/** 1305/**
1107 * gpiochip_is_requested - return string iff signal was requested 1306 * gpiochip_is_requested - return string iff signal was requested
diff --git a/drivers/gpio/it8761e_gpio.c b/drivers/gpio/it8761e_gpio.c
new file mode 100644
index 000000000000..41a9388f2fde
--- /dev/null
+++ b/drivers/gpio/it8761e_gpio.c
@@ -0,0 +1,231 @@
1/*
2 * it8761_gpio.c - GPIO interface for IT8761E Super I/O chip
3 *
4 * Author: Denis Turischev <denis@compulab.co.il>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License 2 as published
8 * by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; see the file COPYING. If not, write to
17 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
18 */
19
20#include <linux/init.h>
21#include <linux/kernel.h>
22#include <linux/module.h>
23#include <linux/io.h>
24#include <linux/errno.h>
25#include <linux/ioport.h>
26
27#include <linux/gpio.h>
28
29#define SIO_CHIP_ID 0x8761
30#define CHIP_ID_HIGH_BYTE 0x20
31#define CHIP_ID_LOW_BYTE 0x21
32
33static u8 ports[2] = { 0x2e, 0x4e };
34static u8 port;
35
36static DEFINE_SPINLOCK(sio_lock);
37
38#define GPIO_NAME "it8761-gpio"
39#define GPIO_BA_HIGH_BYTE 0x60
40#define GPIO_BA_LOW_BYTE 0x61
41#define GPIO_IOSIZE 4
42#define GPIO1X_IO 0xf0
43#define GPIO2X_IO 0xf1
44
45static u16 gpio_ba;
46
47static u8 read_reg(u8 addr, u8 port)
48{
49 outb(addr, port);
50 return inb(port + 1);
51}
52
53static void write_reg(u8 data, u8 addr, u8 port)
54{
55 outb(addr, port);
56 outb(data, port + 1);
57}
58
59static void enter_conf_mode(u8 port)
60{
61 outb(0x87, port);
62 outb(0x61, port);
63 outb(0x55, port);
64 outb((port == 0x2e) ? 0x55 : 0xaa, port);
65}
66
67static void exit_conf_mode(u8 port)
68{
69 outb(0x2, port);
70 outb(0x2, port + 1);
71}
72
73static void enter_gpio_mode(u8 port)
74{
75 write_reg(0x2, 0x7, port);
76}
77
78static int it8761e_gpio_get(struct gpio_chip *gc, unsigned gpio_num)
79{
80 u16 reg;
81 u8 bit;
82
83 bit = gpio_num % 8;
84 reg = (gpio_num >= 8) ? gpio_ba + 1 : gpio_ba;
85
86 return !!(inb(reg) & (1 << bit));
87}
88
89static int it8761e_gpio_direction_in(struct gpio_chip *gc, unsigned gpio_num)
90{
91 u8 curr_dirs;
92 u8 io_reg, bit;
93
94 bit = gpio_num % 8;
95 io_reg = (gpio_num >= 8) ? GPIO2X_IO : GPIO1X_IO;
96
97 spin_lock(&sio_lock);
98
99 enter_conf_mode(port);
100 enter_gpio_mode(port);
101
102 curr_dirs = read_reg(io_reg, port);
103
104 if (curr_dirs & (1 << bit))
105 write_reg(curr_dirs & ~(1 << bit), io_reg, port);
106
107 exit_conf_mode(port);
108
109 spin_unlock(&sio_lock);
110 return 0;
111}
112
113static void it8761e_gpio_set(struct gpio_chip *gc,
114 unsigned gpio_num, int val)
115{
116 u8 curr_vals, bit;
117 u16 reg;
118
119 bit = gpio_num % 8;
120 reg = (gpio_num >= 8) ? gpio_ba + 1 : gpio_ba;
121
122 spin_lock(&sio_lock);
123
124 curr_vals = inb(reg);
125 if (val)
126 outb(curr_vals | (1 << bit) , reg);
127 else
128 outb(curr_vals & ~(1 << bit), reg);
129
130 spin_unlock(&sio_lock);
131}
132
133static int it8761e_gpio_direction_out(struct gpio_chip *gc,
134 unsigned gpio_num, int val)
135{
136 u8 curr_dirs, io_reg, bit;
137
138 bit = gpio_num % 8;
139 io_reg = (gpio_num >= 8) ? GPIO2X_IO : GPIO1X_IO;
140
141 it8761e_gpio_set(gc, gpio_num, val);
142
143 spin_lock(&sio_lock);
144
145 enter_conf_mode(port);
146 enter_gpio_mode(port);
147
148 curr_dirs = read_reg(io_reg, port);
149
150 if (!(curr_dirs & (1 << bit)))
151 write_reg(curr_dirs | (1 << bit), io_reg, port);
152
153 exit_conf_mode(port);
154
155 spin_unlock(&sio_lock);
156 return 0;
157}
158
159static struct gpio_chip it8761e_gpio_chip = {
160 .label = GPIO_NAME,
161 .owner = THIS_MODULE,
162 .get = it8761e_gpio_get,
163 .direction_input = it8761e_gpio_direction_in,
164 .set = it8761e_gpio_set,
165 .direction_output = it8761e_gpio_direction_out,
166};
167
168static int __init it8761e_gpio_init(void)
169{
170 int i, id, err;
171
172 /* chip and port detection */
173 for (i = 0; i < ARRAY_SIZE(ports); i++) {
174 spin_lock(&sio_lock);
175 enter_conf_mode(ports[i]);
176
177 id = (read_reg(CHIP_ID_HIGH_BYTE, ports[i]) << 8) +
178 read_reg(CHIP_ID_LOW_BYTE, ports[i]);
179
180 exit_conf_mode(ports[i]);
181 spin_unlock(&sio_lock);
182
183 if (id == SIO_CHIP_ID) {
184 port = ports[i];
185 break;
186 }
187 }
188
189 if (!port)
190 return -ENODEV;
191
192 /* fetch GPIO base address */
193 enter_conf_mode(port);
194 enter_gpio_mode(port);
195 gpio_ba = (read_reg(GPIO_BA_HIGH_BYTE, port) << 8) +
196 read_reg(GPIO_BA_LOW_BYTE, port);
197 exit_conf_mode(port);
198
199 if (!request_region(gpio_ba, GPIO_IOSIZE, GPIO_NAME))
200 return -EBUSY;
201
202 it8761e_gpio_chip.base = -1;
203 it8761e_gpio_chip.ngpio = 16;
204
205 err = gpiochip_add(&it8761e_gpio_chip);
206 if (err < 0)
207 goto gpiochip_add_err;
208
209 return 0;
210
211gpiochip_add_err:
212 release_region(gpio_ba, GPIO_IOSIZE);
213 gpio_ba = 0;
214 return err;
215}
216
217static void __exit it8761e_gpio_exit(void)
218{
219 if (gpio_ba) {
220 gpiochip_remove(&it8761e_gpio_chip);
221
222 release_region(gpio_ba, GPIO_IOSIZE);
223 gpio_ba = 0;
224 }
225}
226module_init(it8761e_gpio_init);
227module_exit(it8761e_gpio_exit);
228
229MODULE_AUTHOR("Denis Turischev <denis@compulab.co.il>");
230MODULE_DESCRIPTION("GPIO interface for IT8761E Super I/O chip");
231MODULE_LICENSE("GPL");
diff --git a/drivers/gpio/langwell_gpio.c b/drivers/gpio/langwell_gpio.c
index 4baf3d7d0f8e..00c3a14127af 100644
--- a/drivers/gpio/langwell_gpio.c
+++ b/drivers/gpio/langwell_gpio.c
@@ -29,6 +29,7 @@
29#include <linux/irq.h> 29#include <linux/irq.h>
30#include <linux/io.h> 30#include <linux/io.h>
31#include <linux/gpio.h> 31#include <linux/gpio.h>
32#include <linux/slab.h>
32 33
33struct lnw_gpio_register { 34struct lnw_gpio_register {
34 u32 GPLR[2]; 35 u32 GPLR[2];
@@ -123,7 +124,7 @@ static int lnw_irq_type(unsigned irq, unsigned type)
123 void __iomem *grer = (void __iomem *)(&lnw->reg_base->GRER[reg]); 124 void __iomem *grer = (void __iomem *)(&lnw->reg_base->GRER[reg]);
124 void __iomem *gfer = (void __iomem *)(&lnw->reg_base->GFER[reg]); 125 void __iomem *gfer = (void __iomem *)(&lnw->reg_base->GFER[reg]);
125 126
126 if (gpio < 0 || gpio > lnw->chip.ngpio) 127 if (gpio >= lnw->chip.ngpio)
127 return -EINVAL; 128 return -EINVAL;
128 spin_lock_irqsave(&lnw->lock, flags); 129 spin_lock_irqsave(&lnw->lock, flags);
129 if (type & IRQ_TYPE_EDGE_RISING) 130 if (type & IRQ_TYPE_EDGE_RISING)
diff --git a/drivers/gpio/max7300.c b/drivers/gpio/max7300.c
new file mode 100644
index 000000000000..962f661c18c7
--- /dev/null
+++ b/drivers/gpio/max7300.c
@@ -0,0 +1,95 @@
1/*
2 * drivers/gpio/max7300.c
3 *
4 * Copyright (C) 2009 Wolfram Sang, Pengutronix
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * Check max730x.c for further details.
11 */
12
13#include <linux/module.h>
14#include <linux/init.h>
15#include <linux/platform_device.h>
16#include <linux/mutex.h>
17#include <linux/i2c.h>
18#include <linux/spi/max7301.h>
19#include <linux/slab.h>
20
21static int max7300_i2c_write(struct device *dev, unsigned int reg,
22 unsigned int val)
23{
24 struct i2c_client *client = to_i2c_client(dev);
25
26 return i2c_smbus_write_byte_data(client, reg, val);
27}
28
29static int max7300_i2c_read(struct device *dev, unsigned int reg)
30{
31 struct i2c_client *client = to_i2c_client(dev);
32
33 return i2c_smbus_read_byte_data(client, reg);
34}
35
36static int __devinit max7300_probe(struct i2c_client *client,
37 const struct i2c_device_id *id)
38{
39 struct max7301 *ts;
40 int ret;
41
42 if (!i2c_check_functionality(client->adapter,
43 I2C_FUNC_SMBUS_BYTE_DATA))
44 return -EIO;
45
46 ts = kzalloc(sizeof(struct max7301), GFP_KERNEL);
47 if (!ts)
48 return -ENOMEM;
49
50 ts->read = max7300_i2c_read;
51 ts->write = max7300_i2c_write;
52 ts->dev = &client->dev;
53
54 ret = __max730x_probe(ts);
55 if (ret)
56 kfree(ts);
57 return ret;
58}
59
60static int __devexit max7300_remove(struct i2c_client *client)
61{
62 return __max730x_remove(&client->dev);
63}
64
65static const struct i2c_device_id max7300_id[] = {
66 { "max7300", 0 },
67 { }
68};
69MODULE_DEVICE_TABLE(i2c, max7300_id);
70
71static struct i2c_driver max7300_driver = {
72 .driver = {
73 .name = "max7300",
74 .owner = THIS_MODULE,
75 },
76 .probe = max7300_probe,
77 .remove = __devexit_p(max7300_remove),
78 .id_table = max7300_id,
79};
80
81static int __init max7300_init(void)
82{
83 return i2c_add_driver(&max7300_driver);
84}
85subsys_initcall(max7300_init);
86
87static void __exit max7300_exit(void)
88{
89 i2c_del_driver(&max7300_driver);
90}
91module_exit(max7300_exit);
92
93MODULE_AUTHOR("Wolfram Sang");
94MODULE_LICENSE("GPL v2");
95MODULE_DESCRIPTION("MAX7300 GPIO-Expander");
diff --git a/drivers/gpio/max7301.c b/drivers/gpio/max7301.c
index 480956f1ca50..92a100ddef6b 100644
--- a/drivers/gpio/max7301.c
+++ b/drivers/gpio/max7301.c
@@ -1,98 +1,42 @@
1/** 1/*
2 * drivers/gpio/max7301.c 2 * drivers/gpio/max7301.c
3 * 3 *
4 * Copyright (C) 2006 Juergen Beisert, Pengutronix 4 * Copyright (C) 2006 Juergen Beisert, Pengutronix
5 * Copyright (C) 2008 Guennadi Liakhovetski, Pengutronix 5 * Copyright (C) 2008 Guennadi Liakhovetski, Pengutronix
6 * Copyright (C) 2009 Wolfram Sang, Pengutronix
6 * 7 *
7 * This program is free software; you can redistribute it and/or modify 8 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as 9 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
10 * 11 *
11 * The Maxim's MAX7301 device is an SPI driven GPIO expander. There are 12 * Check max730x.c for further details.
12 * 28 GPIOs. 8 of them can trigger an interrupt. See datasheet for more
13 * details
14 * Note:
15 * - DIN must be stable at the rising edge of clock.
16 * - when writing:
17 * - always clock in 16 clocks at once
18 * - at DIN: D15 first, D0 last
19 * - D0..D7 = databyte, D8..D14 = commandbyte
20 * - D15 = low -> write command
21 * - when reading
22 * - always clock in 16 clocks at once
23 * - at DIN: D15 first, D0 last
24 * - D0..D7 = dummy, D8..D14 = register address
25 * - D15 = high -> read command
26 * - raise CS and assert it again
27 * - always clock in 16 clocks at once
28 * - at DOUT: D15 first, D0 last
29 * - D0..D7 contains the data from the first cycle
30 *
31 * The driver exports a standard gpiochip interface
32 */ 13 */
33 14
15#include <linux/module.h>
34#include <linux/init.h> 16#include <linux/init.h>
35#include <linux/platform_device.h> 17#include <linux/platform_device.h>
36#include <linux/mutex.h> 18#include <linux/mutex.h>
19#include <linux/slab.h>
37#include <linux/spi/spi.h> 20#include <linux/spi/spi.h>
38#include <linux/spi/max7301.h> 21#include <linux/spi/max7301.h>
39#include <linux/gpio.h>
40
41#define DRIVER_NAME "max7301"
42
43/*
44 * Pin configurations, see MAX7301 datasheet page 6
45 */
46#define PIN_CONFIG_MASK 0x03
47#define PIN_CONFIG_IN_PULLUP 0x03
48#define PIN_CONFIG_IN_WO_PULLUP 0x02
49#define PIN_CONFIG_OUT 0x01
50
51#define PIN_NUMBER 28
52
53
54/*
55 * Some registers must be read back to modify.
56 * To save time we cache them here in memory
57 */
58struct max7301 {
59 struct mutex lock;
60 u8 port_config[8]; /* field 0 is unused */
61 u32 out_level; /* cached output levels */
62 struct gpio_chip chip;
63 struct spi_device *spi;
64};
65 22
66/** 23/* A write to the MAX7301 means one message with one transfer */
67 * max7301_write - Write a new register content 24static int max7301_spi_write(struct device *dev, unsigned int reg,
68 * @spi: The SPI device 25 unsigned int val)
69 * @reg: Register offset
70 * @val: Value to write
71 *
72 * A write to the MAX7301 means one message with one transfer
73 *
74 * Returns 0 if successful or a negative value on error
75 */
76static int max7301_write(struct spi_device *spi, unsigned int reg, unsigned int val)
77{ 26{
27 struct spi_device *spi = to_spi_device(dev);
78 u16 word = ((reg & 0x7F) << 8) | (val & 0xFF); 28 u16 word = ((reg & 0x7F) << 8) | (val & 0xFF);
29
79 return spi_write(spi, (const u8 *)&word, sizeof(word)); 30 return spi_write(spi, (const u8 *)&word, sizeof(word));
80} 31}
81 32
82/** 33/* A read from the MAX7301 means two transfers; here, one message each */
83 * max7301_read - Read back register content 34
84 * @spi: The SPI device 35static int max7301_spi_read(struct device *dev, unsigned int reg)
85 * @reg: Register offset
86 *
87 * A read from the MAX7301 means two transfers; here, one message each
88 *
89 * Returns positive 8 bit value from device if successful or a
90 * negative value on error
91 */
92static int max7301_read(struct spi_device *spi, unsigned int reg)
93{ 36{
94 int ret; 37 int ret;
95 u16 word; 38 u16 word;
39 struct spi_device *spi = to_spi_device(dev);
96 40
97 word = 0x8000 | (reg << 8); 41 word = 0x8000 | (reg << 8);
98 ret = spi_write(spi, (const u8 *)&word, sizeof(word)); 42 ret = spi_write(spi, (const u8 *)&word, sizeof(word));
@@ -108,125 +52,13 @@ static int max7301_read(struct spi_device *spi, unsigned int reg)
108 return word & 0xff; 52 return word & 0xff;
109} 53}
110 54
111static int max7301_direction_input(struct gpio_chip *chip, unsigned offset)
112{
113 struct max7301 *ts = container_of(chip, struct max7301, chip);
114 u8 *config;
115 int ret;
116
117 /* First 4 pins are unused in the controller */
118 offset += 4;
119
120 config = &ts->port_config[offset >> 2];
121
122 mutex_lock(&ts->lock);
123
124 /* Standard GPIO API doesn't support pull-ups, has to be extended.
125 * Hard-coding no pollup for now. */
126 *config = (*config & ~(3 << (offset & 3))) | (1 << (offset & 3));
127
128 ret = max7301_write(ts->spi, 0x08 + (offset >> 2), *config);
129
130 mutex_unlock(&ts->lock);
131
132 return ret;
133}
134
135static int __max7301_set(struct max7301 *ts, unsigned offset, int value)
136{
137 if (value) {
138 ts->out_level |= 1 << offset;
139 return max7301_write(ts->spi, 0x20 + offset, 0x01);
140 } else {
141 ts->out_level &= ~(1 << offset);
142 return max7301_write(ts->spi, 0x20 + offset, 0x00);
143 }
144}
145
146static int max7301_direction_output(struct gpio_chip *chip, unsigned offset,
147 int value)
148{
149 struct max7301 *ts = container_of(chip, struct max7301, chip);
150 u8 *config;
151 int ret;
152
153 /* First 4 pins are unused in the controller */
154 offset += 4;
155
156 config = &ts->port_config[offset >> 2];
157
158 mutex_lock(&ts->lock);
159
160 *config = (*config & ~(3 << (offset & 3))) | (1 << (offset & 3));
161
162 ret = __max7301_set(ts, offset, value);
163
164 if (!ret)
165 ret = max7301_write(ts->spi, 0x08 + (offset >> 2), *config);
166
167 mutex_unlock(&ts->lock);
168
169 return ret;
170}
171
172static int max7301_get(struct gpio_chip *chip, unsigned offset)
173{
174 struct max7301 *ts = container_of(chip, struct max7301, chip);
175 int config, level = -EINVAL;
176
177 /* First 4 pins are unused in the controller */
178 offset += 4;
179
180 mutex_lock(&ts->lock);
181
182 config = (ts->port_config[offset >> 2] >> ((offset & 3) * 2)) & 3;
183
184 switch (config) {
185 case 1:
186 /* Output: return cached level */
187 level = !!(ts->out_level & (1 << offset));
188 break;
189 case 2:
190 case 3:
191 /* Input: read out */
192 level = max7301_read(ts->spi, 0x20 + offset) & 0x01;
193 }
194 mutex_unlock(&ts->lock);
195
196 return level;
197}
198
199static void max7301_set(struct gpio_chip *chip, unsigned offset, int value)
200{
201 struct max7301 *ts = container_of(chip, struct max7301, chip);
202
203 /* First 4 pins are unused in the controller */
204 offset += 4;
205
206 mutex_lock(&ts->lock);
207
208 __max7301_set(ts, offset, value);
209
210 mutex_unlock(&ts->lock);
211}
212
213static int __devinit max7301_probe(struct spi_device *spi) 55static int __devinit max7301_probe(struct spi_device *spi)
214{ 56{
215 struct max7301 *ts; 57 struct max7301 *ts;
216 struct max7301_platform_data *pdata; 58 int ret;
217 int i, ret;
218
219 pdata = spi->dev.platform_data;
220 if (!pdata || !pdata->base) {
221 dev_dbg(&spi->dev, "incorrect or missing platform data\n");
222 return -EINVAL;
223 }
224 59
225 /* 60 /* bits_per_word cannot be configured in platform data */
226 * bits_per_word cannot be configured in platform data
227 */
228 spi->bits_per_word = 16; 61 spi->bits_per_word = 16;
229
230 ret = spi_setup(spi); 62 ret = spi_setup(spi);
231 if (ret < 0) 63 if (ret < 0)
232 return ret; 64 return ret;
@@ -235,90 +67,35 @@ static int __devinit max7301_probe(struct spi_device *spi)
235 if (!ts) 67 if (!ts)
236 return -ENOMEM; 68 return -ENOMEM;
237 69
238 mutex_init(&ts->lock); 70 ts->read = max7301_spi_read;
239 71 ts->write = max7301_spi_write;
240 dev_set_drvdata(&spi->dev, ts); 72 ts->dev = &spi->dev;
241 73
242 /* Power up the chip and disable IRQ output */ 74 ret = __max730x_probe(ts);
243 max7301_write(spi, 0x04, 0x01);
244
245 ts->spi = spi;
246
247 ts->chip.label = DRIVER_NAME,
248
249 ts->chip.direction_input = max7301_direction_input;
250 ts->chip.get = max7301_get;
251 ts->chip.direction_output = max7301_direction_output;
252 ts->chip.set = max7301_set;
253
254 ts->chip.base = pdata->base;
255 ts->chip.ngpio = PIN_NUMBER;
256 ts->chip.can_sleep = 1;
257 ts->chip.dev = &spi->dev;
258 ts->chip.owner = THIS_MODULE;
259
260 /*
261 * tristate all pins in hardware and cache the
262 * register values for later use.
263 */
264 for (i = 1; i < 8; i++) {
265 int j;
266 /* 0xAA means input with internal pullup disabled */
267 max7301_write(spi, 0x08 + i, 0xAA);
268 ts->port_config[i] = 0xAA;
269 for (j = 0; j < 4; j++) {
270 int offset = (i - 1) * 4 + j;
271 ret = max7301_direction_input(&ts->chip, offset);
272 if (ret)
273 goto exit_destroy;
274 }
275 }
276
277 ret = gpiochip_add(&ts->chip);
278 if (ret) 75 if (ret)
279 goto exit_destroy; 76 kfree(ts);
280
281 return ret;
282
283exit_destroy:
284 dev_set_drvdata(&spi->dev, NULL);
285 mutex_destroy(&ts->lock);
286 kfree(ts);
287 return ret; 77 return ret;
288} 78}
289 79
290static int __devexit max7301_remove(struct spi_device *spi) 80static int __devexit max7301_remove(struct spi_device *spi)
291{ 81{
292 struct max7301 *ts; 82 return __max730x_remove(&spi->dev);
293 int ret;
294
295 ts = dev_get_drvdata(&spi->dev);
296 if (ts == NULL)
297 return -ENODEV;
298
299 dev_set_drvdata(&spi->dev, NULL);
300
301 /* Power down the chip and disable IRQ output */
302 max7301_write(spi, 0x04, 0x00);
303
304 ret = gpiochip_remove(&ts->chip);
305 if (!ret) {
306 mutex_destroy(&ts->lock);
307 kfree(ts);
308 } else
309 dev_err(&spi->dev, "Failed to remove the GPIO controller: %d\n",
310 ret);
311
312 return ret;
313} 83}
314 84
85static const struct spi_device_id max7301_id[] = {
86 { "max7301", 0 },
87 { }
88};
89MODULE_DEVICE_TABLE(spi, max7301_id);
90
315static struct spi_driver max7301_driver = { 91static struct spi_driver max7301_driver = {
316 .driver = { 92 .driver = {
317 .name = DRIVER_NAME, 93 .name = "max7301",
318 .owner = THIS_MODULE, 94 .owner = THIS_MODULE,
319 }, 95 },
320 .probe = max7301_probe, 96 .probe = max7301_probe,
321 .remove = __devexit_p(max7301_remove), 97 .remove = __devexit_p(max7301_remove),
98 .id_table = max7301_id,
322}; 99};
323 100
324static int __init max7301_init(void) 101static int __init max7301_init(void)
@@ -336,7 +113,6 @@ static void __exit max7301_exit(void)
336} 113}
337module_exit(max7301_exit); 114module_exit(max7301_exit);
338 115
339MODULE_AUTHOR("Juergen Beisert"); 116MODULE_AUTHOR("Juergen Beisert, Wolfram Sang");
340MODULE_LICENSE("GPL v2"); 117MODULE_LICENSE("GPL v2");
341MODULE_DESCRIPTION("MAX7301 SPI based GPIO-Expander"); 118MODULE_DESCRIPTION("MAX7301 GPIO-Expander");
342MODULE_ALIAS("spi:" DRIVER_NAME);
diff --git a/drivers/gpio/max730x.c b/drivers/gpio/max730x.c
new file mode 100644
index 000000000000..7696a5625d58
--- /dev/null
+++ b/drivers/gpio/max730x.c
@@ -0,0 +1,249 @@
1/**
2 * drivers/gpio/max7301.c
3 *
4 * Copyright (C) 2006 Juergen Beisert, Pengutronix
5 * Copyright (C) 2008 Guennadi Liakhovetski, Pengutronix
6 * Copyright (C) 2009 Wolfram Sang, Pengutronix
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * The Maxim MAX7300/1 device is an I2C/SPI driven GPIO expander. There are
13 * 28 GPIOs. 8 of them can trigger an interrupt. See datasheet for more
14 * details
15 * Note:
16 * - DIN must be stable at the rising edge of clock.
17 * - when writing:
18 * - always clock in 16 clocks at once
19 * - at DIN: D15 first, D0 last
20 * - D0..D7 = databyte, D8..D14 = commandbyte
21 * - D15 = low -> write command
22 * - when reading
23 * - always clock in 16 clocks at once
24 * - at DIN: D15 first, D0 last
25 * - D0..D7 = dummy, D8..D14 = register address
26 * - D15 = high -> read command
27 * - raise CS and assert it again
28 * - always clock in 16 clocks at once
29 * - at DOUT: D15 first, D0 last
30 * - D0..D7 contains the data from the first cycle
31 *
32 * The driver exports a standard gpiochip interface
33 */
34
35#include <linux/module.h>
36#include <linux/init.h>
37#include <linux/platform_device.h>
38#include <linux/mutex.h>
39#include <linux/spi/max7301.h>
40#include <linux/gpio.h>
41#include <linux/slab.h>
42
43/*
44 * Pin configurations, see MAX7301 datasheet page 6
45 */
46#define PIN_CONFIG_MASK 0x03
47#define PIN_CONFIG_IN_PULLUP 0x03
48#define PIN_CONFIG_IN_WO_PULLUP 0x02
49#define PIN_CONFIG_OUT 0x01
50
51#define PIN_NUMBER 28
52
53static int max7301_direction_input(struct gpio_chip *chip, unsigned offset)
54{
55 struct max7301 *ts = container_of(chip, struct max7301, chip);
56 u8 *config;
57 u8 offset_bits;
58 int ret;
59
60 /* First 4 pins are unused in the controller */
61 offset += 4;
62 offset_bits = (offset & 3) << 1;
63
64 config = &ts->port_config[offset >> 2];
65
66 mutex_lock(&ts->lock);
67
68 /* Standard GPIO API doesn't support pull-ups, has to be extended.
69 * Hard-coding no pollup for now. */
70 *config = (*config & ~(PIN_CONFIG_MASK << offset_bits))
71 | (PIN_CONFIG_IN_WO_PULLUP << offset_bits);
72
73 ret = ts->write(ts->dev, 0x08 + (offset >> 2), *config);
74
75 mutex_unlock(&ts->lock);
76
77 return ret;
78}
79
80static int __max7301_set(struct max7301 *ts, unsigned offset, int value)
81{
82 if (value) {
83 ts->out_level |= 1 << offset;
84 return ts->write(ts->dev, 0x20 + offset, 0x01);
85 } else {
86 ts->out_level &= ~(1 << offset);
87 return ts->write(ts->dev, 0x20 + offset, 0x00);
88 }
89}
90
91static int max7301_direction_output(struct gpio_chip *chip, unsigned offset,
92 int value)
93{
94 struct max7301 *ts = container_of(chip, struct max7301, chip);
95 u8 *config;
96 u8 offset_bits;
97 int ret;
98
99 /* First 4 pins are unused in the controller */
100 offset += 4;
101 offset_bits = (offset & 3) << 1;
102
103 config = &ts->port_config[offset >> 2];
104
105 mutex_lock(&ts->lock);
106
107 *config = (*config & ~(PIN_CONFIG_MASK << offset_bits))
108 | (PIN_CONFIG_OUT << offset_bits);
109
110 ret = __max7301_set(ts, offset, value);
111
112 if (!ret)
113 ret = ts->write(ts->dev, 0x08 + (offset >> 2), *config);
114
115 mutex_unlock(&ts->lock);
116
117 return ret;
118}
119
120static int max7301_get(struct gpio_chip *chip, unsigned offset)
121{
122 struct max7301 *ts = container_of(chip, struct max7301, chip);
123 int config, level = -EINVAL;
124
125 /* First 4 pins are unused in the controller */
126 offset += 4;
127
128 mutex_lock(&ts->lock);
129
130 config = (ts->port_config[offset >> 2] >> ((offset & 3) << 1))
131 & PIN_CONFIG_MASK;
132
133 switch (config) {
134 case PIN_CONFIG_OUT:
135 /* Output: return cached level */
136 level = !!(ts->out_level & (1 << offset));
137 break;
138 case PIN_CONFIG_IN_WO_PULLUP:
139 case PIN_CONFIG_IN_PULLUP:
140 /* Input: read out */
141 level = ts->read(ts->dev, 0x20 + offset) & 0x01;
142 }
143 mutex_unlock(&ts->lock);
144
145 return level;
146}
147
148static void max7301_set(struct gpio_chip *chip, unsigned offset, int value)
149{
150 struct max7301 *ts = container_of(chip, struct max7301, chip);
151
152 /* First 4 pins are unused in the controller */
153 offset += 4;
154
155 mutex_lock(&ts->lock);
156
157 __max7301_set(ts, offset, value);
158
159 mutex_unlock(&ts->lock);
160}
161
162int __devinit __max730x_probe(struct max7301 *ts)
163{
164 struct device *dev = ts->dev;
165 struct max7301_platform_data *pdata;
166 int i, ret;
167
168 pdata = dev->platform_data;
169 if (!pdata || !pdata->base) {
170 dev_err(dev, "incorrect or missing platform data\n");
171 return -EINVAL;
172 }
173
174 mutex_init(&ts->lock);
175 dev_set_drvdata(dev, ts);
176
177 /* Power up the chip and disable IRQ output */
178 ts->write(dev, 0x04, 0x01);
179
180 ts->chip.label = dev->driver->name;
181
182 ts->chip.direction_input = max7301_direction_input;
183 ts->chip.get = max7301_get;
184 ts->chip.direction_output = max7301_direction_output;
185 ts->chip.set = max7301_set;
186
187 ts->chip.base = pdata->base;
188 ts->chip.ngpio = PIN_NUMBER;
189 ts->chip.can_sleep = 1;
190 ts->chip.dev = dev;
191 ts->chip.owner = THIS_MODULE;
192
193 /*
194 * tristate all pins in hardware and cache the
195 * register values for later use.
196 */
197 for (i = 1; i < 8; i++) {
198 int j;
199 /* 0xAA means input with internal pullup disabled */
200 ts->write(dev, 0x08 + i, 0xAA);
201 ts->port_config[i] = 0xAA;
202 for (j = 0; j < 4; j++) {
203 int offset = (i - 1) * 4 + j;
204 ret = max7301_direction_input(&ts->chip, offset);
205 if (ret)
206 goto exit_destroy;
207 }
208 }
209
210 ret = gpiochip_add(&ts->chip);
211 if (ret)
212 goto exit_destroy;
213
214 return ret;
215
216exit_destroy:
217 dev_set_drvdata(dev, NULL);
218 mutex_destroy(&ts->lock);
219 return ret;
220}
221EXPORT_SYMBOL_GPL(__max730x_probe);
222
223int __devexit __max730x_remove(struct device *dev)
224{
225 struct max7301 *ts = dev_get_drvdata(dev);
226 int ret;
227
228 if (ts == NULL)
229 return -ENODEV;
230
231 dev_set_drvdata(dev, NULL);
232
233 /* Power down the chip and disable IRQ output */
234 ts->write(dev, 0x04, 0x00);
235
236 ret = gpiochip_remove(&ts->chip);
237 if (!ret) {
238 mutex_destroy(&ts->lock);
239 kfree(ts);
240 } else
241 dev_err(dev, "Failed to remove GPIO controller: %d\n", ret);
242
243 return ret;
244}
245EXPORT_SYMBOL_GPL(__max730x_remove);
246
247MODULE_AUTHOR("Juergen Beisert, Wolfram Sang");
248MODULE_LICENSE("GPL v2");
249MODULE_DESCRIPTION("MAX730x GPIO-Expanders, generic parts");
diff --git a/drivers/gpio/mc33880.c b/drivers/gpio/mc33880.c
index e7d01bd8fdb3..935479da6705 100644
--- a/drivers/gpio/mc33880.c
+++ b/drivers/gpio/mc33880.c
@@ -25,6 +25,7 @@
25#include <linux/spi/spi.h> 25#include <linux/spi/spi.h>
26#include <linux/spi/mc33880.h> 26#include <linux/spi/mc33880.h>
27#include <linux/gpio.h> 27#include <linux/gpio.h>
28#include <linux/slab.h>
28 29
29#define DRIVER_NAME "mc33880" 30#define DRIVER_NAME "mc33880"
30 31
diff --git a/drivers/gpio/mcp23s08.c b/drivers/gpio/mcp23s08.c
index cd651ec8d034..69f6f1955a31 100644
--- a/drivers/gpio/mcp23s08.c
+++ b/drivers/gpio/mcp23s08.c
@@ -9,6 +9,7 @@
9#include <linux/gpio.h> 9#include <linux/gpio.h>
10#include <linux/spi/spi.h> 10#include <linux/spi/spi.h>
11#include <linux/spi/mcp23s08.h> 11#include <linux/spi/mcp23s08.h>
12#include <linux/slab.h>
12 13
13 14
14/* Registers are all 8 bits wide. 15/* Registers are all 8 bits wide.
diff --git a/drivers/gpio/pca953x.c b/drivers/gpio/pca953x.c
index 6a2fb3fbb3d9..b827c976dc62 100644
--- a/drivers/gpio/pca953x.c
+++ b/drivers/gpio/pca953x.c
@@ -14,8 +14,11 @@
14#include <linux/module.h> 14#include <linux/module.h>
15#include <linux/init.h> 15#include <linux/init.h>
16#include <linux/gpio.h> 16#include <linux/gpio.h>
17#include <linux/interrupt.h>
18#include <linux/irq.h>
17#include <linux/i2c.h> 19#include <linux/i2c.h>
18#include <linux/i2c/pca953x.h> 20#include <linux/i2c/pca953x.h>
21#include <linux/slab.h>
19#ifdef CONFIG_OF_GPIO 22#ifdef CONFIG_OF_GPIO
20#include <linux/of_platform.h> 23#include <linux/of_platform.h>
21#include <linux/of_gpio.h> 24#include <linux/of_gpio.h>
@@ -26,23 +29,28 @@
26#define PCA953X_INVERT 2 29#define PCA953X_INVERT 2
27#define PCA953X_DIRECTION 3 30#define PCA953X_DIRECTION 3
28 31
32#define PCA953X_GPIOS 0x00FF
33#define PCA953X_INT 0x0100
34
29static const struct i2c_device_id pca953x_id[] = { 35static const struct i2c_device_id pca953x_id[] = {
30 { "pca9534", 8, }, 36 { "pca9534", 8 | PCA953X_INT, },
31 { "pca9535", 16, }, 37 { "pca9535", 16 | PCA953X_INT, },
32 { "pca9536", 4, }, 38 { "pca9536", 4, },
33 { "pca9537", 4, }, 39 { "pca9537", 4 | PCA953X_INT, },
34 { "pca9538", 8, }, 40 { "pca9538", 8 | PCA953X_INT, },
35 { "pca9539", 16, }, 41 { "pca9539", 16 | PCA953X_INT, },
36 { "pca9554", 8, }, 42 { "pca9554", 8 | PCA953X_INT, },
37 { "pca9555", 16, }, 43 { "pca9555", 16 | PCA953X_INT, },
38 { "pca9556", 8, }, 44 { "pca9556", 8, },
39 { "pca9557", 8, }, 45 { "pca9557", 8, },
40 46
41 { "max7310", 8, }, 47 { "max7310", 8, },
42 { "max7315", 8, }, 48 { "max7312", 16 | PCA953X_INT, },
43 { "pca6107", 8, }, 49 { "max7313", 16 | PCA953X_INT, },
44 { "tca6408", 8, }, 50 { "max7315", 8 | PCA953X_INT, },
45 { "tca6416", 16, }, 51 { "pca6107", 8 | PCA953X_INT, },
52 { "tca6408", 8 | PCA953X_INT, },
53 { "tca6416", 16 | PCA953X_INT, },
46 /* NYET: { "tca6424", 24, }, */ 54 /* NYET: { "tca6424", 24, }, */
47 { } 55 { }
48}; 56};
@@ -53,6 +61,15 @@ struct pca953x_chip {
53 uint16_t reg_output; 61 uint16_t reg_output;
54 uint16_t reg_direction; 62 uint16_t reg_direction;
55 63
64#ifdef CONFIG_GPIO_PCA953X_IRQ
65 struct mutex irq_lock;
66 uint16_t irq_mask;
67 uint16_t irq_stat;
68 uint16_t irq_trig_raise;
69 uint16_t irq_trig_fall;
70 int irq_base;
71#endif
72
56 struct i2c_client *client; 73 struct i2c_client *client;
57 struct pca953x_platform_data *dyn_pdata; 74 struct pca953x_platform_data *dyn_pdata;
58 struct gpio_chip gpio_chip; 75 struct gpio_chip gpio_chip;
@@ -202,6 +219,222 @@ static void pca953x_setup_gpio(struct pca953x_chip *chip, int gpios)
202 gc->names = chip->names; 219 gc->names = chip->names;
203} 220}
204 221
222#ifdef CONFIG_GPIO_PCA953X_IRQ
223static int pca953x_gpio_to_irq(struct gpio_chip *gc, unsigned off)
224{
225 struct pca953x_chip *chip;
226
227 chip = container_of(gc, struct pca953x_chip, gpio_chip);
228 return chip->irq_base + off;
229}
230
231static void pca953x_irq_mask(unsigned int irq)
232{
233 struct pca953x_chip *chip = get_irq_chip_data(irq);
234
235 chip->irq_mask &= ~(1 << (irq - chip->irq_base));
236}
237
238static void pca953x_irq_unmask(unsigned int irq)
239{
240 struct pca953x_chip *chip = get_irq_chip_data(irq);
241
242 chip->irq_mask |= 1 << (irq - chip->irq_base);
243}
244
245static void pca953x_irq_bus_lock(unsigned int irq)
246{
247 struct pca953x_chip *chip = get_irq_chip_data(irq);
248
249 mutex_lock(&chip->irq_lock);
250}
251
252static void pca953x_irq_bus_sync_unlock(unsigned int irq)
253{
254 struct pca953x_chip *chip = get_irq_chip_data(irq);
255 uint16_t new_irqs;
256 uint16_t level;
257
258 /* Look for any newly setup interrupt */
259 new_irqs = chip->irq_trig_fall | chip->irq_trig_raise;
260 new_irqs &= ~chip->reg_direction;
261
262 while (new_irqs) {
263 level = __ffs(new_irqs);
264 pca953x_gpio_direction_input(&chip->gpio_chip, level);
265 new_irqs &= ~(1 << level);
266 }
267
268 mutex_unlock(&chip->irq_lock);
269}
270
271static int pca953x_irq_set_type(unsigned int irq, unsigned int type)
272{
273 struct pca953x_chip *chip = get_irq_chip_data(irq);
274 uint16_t level = irq - chip->irq_base;
275 uint16_t mask = 1 << level;
276
277 if (!(type & IRQ_TYPE_EDGE_BOTH)) {
278 dev_err(&chip->client->dev, "irq %d: unsupported type %d\n",
279 irq, type);
280 return -EINVAL;
281 }
282
283 if (type & IRQ_TYPE_EDGE_FALLING)
284 chip->irq_trig_fall |= mask;
285 else
286 chip->irq_trig_fall &= ~mask;
287
288 if (type & IRQ_TYPE_EDGE_RISING)
289 chip->irq_trig_raise |= mask;
290 else
291 chip->irq_trig_raise &= ~mask;
292
293 return 0;
294}
295
296static struct irq_chip pca953x_irq_chip = {
297 .name = "pca953x",
298 .mask = pca953x_irq_mask,
299 .unmask = pca953x_irq_unmask,
300 .bus_lock = pca953x_irq_bus_lock,
301 .bus_sync_unlock = pca953x_irq_bus_sync_unlock,
302 .set_type = pca953x_irq_set_type,
303};
304
305static uint16_t pca953x_irq_pending(struct pca953x_chip *chip)
306{
307 uint16_t cur_stat;
308 uint16_t old_stat;
309 uint16_t pending;
310 uint16_t trigger;
311 int ret;
312
313 ret = pca953x_read_reg(chip, PCA953X_INPUT, &cur_stat);
314 if (ret)
315 return 0;
316
317 /* Remove output pins from the equation */
318 cur_stat &= chip->reg_direction;
319
320 old_stat = chip->irq_stat;
321 trigger = (cur_stat ^ old_stat) & chip->irq_mask;
322
323 if (!trigger)
324 return 0;
325
326 chip->irq_stat = cur_stat;
327
328 pending = (old_stat & chip->irq_trig_fall) |
329 (cur_stat & chip->irq_trig_raise);
330 pending &= trigger;
331
332 return pending;
333}
334
335static irqreturn_t pca953x_irq_handler(int irq, void *devid)
336{
337 struct pca953x_chip *chip = devid;
338 uint16_t pending;
339 uint16_t level;
340
341 pending = pca953x_irq_pending(chip);
342
343 if (!pending)
344 return IRQ_HANDLED;
345
346 do {
347 level = __ffs(pending);
348 handle_nested_irq(level + chip->irq_base);
349
350 pending &= ~(1 << level);
351 } while (pending);
352
353 return IRQ_HANDLED;
354}
355
356static int pca953x_irq_setup(struct pca953x_chip *chip,
357 const struct i2c_device_id *id)
358{
359 struct i2c_client *client = chip->client;
360 struct pca953x_platform_data *pdata = client->dev.platform_data;
361 int ret;
362
363 if (pdata->irq_base && (id->driver_data & PCA953X_INT)) {
364 int lvl;
365
366 ret = pca953x_read_reg(chip, PCA953X_INPUT,
367 &chip->irq_stat);
368 if (ret)
369 goto out_failed;
370
371 /*
372 * There is no way to know which GPIO line generated the
373 * interrupt. We have to rely on the previous read for
374 * this purpose.
375 */
376 chip->irq_stat &= chip->reg_direction;
377 chip->irq_base = pdata->irq_base;
378 mutex_init(&chip->irq_lock);
379
380 for (lvl = 0; lvl < chip->gpio_chip.ngpio; lvl++) {
381 int irq = lvl + chip->irq_base;
382
383 set_irq_chip_data(irq, chip);
384 set_irq_chip_and_handler(irq, &pca953x_irq_chip,
385 handle_edge_irq);
386 set_irq_nested_thread(irq, 1);
387#ifdef CONFIG_ARM
388 set_irq_flags(irq, IRQF_VALID);
389#else
390 set_irq_noprobe(irq);
391#endif
392 }
393
394 ret = request_threaded_irq(client->irq,
395 NULL,
396 pca953x_irq_handler,
397 IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
398 dev_name(&client->dev), chip);
399 if (ret) {
400 dev_err(&client->dev, "failed to request irq %d\n",
401 client->irq);
402 goto out_failed;
403 }
404
405 chip->gpio_chip.to_irq = pca953x_gpio_to_irq;
406 }
407
408 return 0;
409
410out_failed:
411 chip->irq_base = 0;
412 return ret;
413}
414
415static void pca953x_irq_teardown(struct pca953x_chip *chip)
416{
417 if (chip->irq_base)
418 free_irq(chip->client->irq, chip);
419}
420#else /* CONFIG_GPIO_PCA953X_IRQ */
421static int pca953x_irq_setup(struct pca953x_chip *chip,
422 const struct i2c_device_id *id)
423{
424 struct i2c_client *client = chip->client;
425 struct pca953x_platform_data *pdata = client->dev.platform_data;
426
427 if (pdata->irq_base && (id->driver_data & PCA953X_INT))
428 dev_warn(&client->dev, "interrupt support not compiled in\n");
429
430 return 0;
431}
432
433static void pca953x_irq_teardown(struct pca953x_chip *chip)
434{
435}
436#endif
437
205/* 438/*
206 * Handlers for alternative sources of platform_data 439 * Handlers for alternative sources of platform_data
207 */ 440 */
@@ -286,7 +519,7 @@ static int __devinit pca953x_probe(struct i2c_client *client,
286 /* initialize cached registers from their original values. 519 /* initialize cached registers from their original values.
287 * we can't share this chip with another i2c master. 520 * we can't share this chip with another i2c master.
288 */ 521 */
289 pca953x_setup_gpio(chip, id->driver_data); 522 pca953x_setup_gpio(chip, id->driver_data & PCA953X_GPIOS);
290 523
291 ret = pca953x_read_reg(chip, PCA953X_OUTPUT, &chip->reg_output); 524 ret = pca953x_read_reg(chip, PCA953X_OUTPUT, &chip->reg_output);
292 if (ret) 525 if (ret)
@@ -301,6 +534,9 @@ static int __devinit pca953x_probe(struct i2c_client *client,
301 if (ret) 534 if (ret)
302 goto out_failed; 535 goto out_failed;
303 536
537 ret = pca953x_irq_setup(chip, id);
538 if (ret)
539 goto out_failed;
304 540
305 ret = gpiochip_add(&chip->gpio_chip); 541 ret = gpiochip_add(&chip->gpio_chip);
306 if (ret) 542 if (ret)
@@ -317,6 +553,7 @@ static int __devinit pca953x_probe(struct i2c_client *client,
317 return 0; 553 return 0;
318 554
319out_failed: 555out_failed:
556 pca953x_irq_teardown(chip);
320 kfree(chip->dyn_pdata); 557 kfree(chip->dyn_pdata);
321 kfree(chip); 558 kfree(chip);
322 return ret; 559 return ret;
@@ -345,6 +582,7 @@ static int pca953x_remove(struct i2c_client *client)
345 return ret; 582 return ret;
346 } 583 }
347 584
585 pca953x_irq_teardown(chip);
348 kfree(chip->dyn_pdata); 586 kfree(chip->dyn_pdata);
349 kfree(chip); 587 kfree(chip);
350 return 0; 588 return 0;
diff --git a/drivers/gpio/pl061.c b/drivers/gpio/pl061.c
index 4ee4c8367a3f..105701a1f05b 100644
--- a/drivers/gpio/pl061.c
+++ b/drivers/gpio/pl061.c
@@ -24,6 +24,7 @@
24#include <linux/device.h> 24#include <linux/device.h>
25#include <linux/amba/bus.h> 25#include <linux/amba/bus.h>
26#include <linux/amba/pl061.h> 26#include <linux/amba/pl061.h>
27#include <linux/slab.h>
27 28
28#define GPIODIR 0x400 29#define GPIODIR 0x400
29#define GPIOIS 0x404 30#define GPIOIS 0x404
@@ -90,6 +91,12 @@ static int pl061_direction_output(struct gpio_chip *gc, unsigned offset,
90 gpiodir = readb(chip->base + GPIODIR); 91 gpiodir = readb(chip->base + GPIODIR);
91 gpiodir |= 1 << offset; 92 gpiodir |= 1 << offset;
92 writeb(gpiodir, chip->base + GPIODIR); 93 writeb(gpiodir, chip->base + GPIODIR);
94
95 /*
96 * gpio value is set again, because pl061 doesn't allow to set value of
97 * a gpio pin before configuring it in OUT mode.
98 */
99 writeb(!!value << offset, chip->base + (1 << (offset + 2)));
93 spin_unlock_irqrestore(&chip->lock, flags); 100 spin_unlock_irqrestore(&chip->lock, flags);
94 101
95 return 0; 102 return 0;
@@ -182,7 +189,7 @@ static int pl061_irq_type(unsigned irq, unsigned trigger)
182 gpioibe &= ~(1 << offset); 189 gpioibe &= ~(1 << offset);
183 if (trigger & IRQ_TYPE_EDGE_RISING) 190 if (trigger & IRQ_TYPE_EDGE_RISING)
184 gpioiev |= 1 << offset; 191 gpioiev |= 1 << offset;
185 else 192 else if (trigger & IRQ_TYPE_EDGE_FALLING)
186 gpioiev &= ~(1 << offset); 193 gpioiev &= ~(1 << offset);
187 } 194 }
188 writeb(gpioibe, chip->base + GPIOIBE); 195 writeb(gpioibe, chip->base + GPIOIBE);
@@ -203,7 +210,7 @@ static struct irq_chip pl061_irqchip = {
203 210
204static void pl061_irq_handler(unsigned irq, struct irq_desc *desc) 211static void pl061_irq_handler(unsigned irq, struct irq_desc *desc)
205{ 212{
206 struct list_head *chip_list = get_irq_chip_data(irq); 213 struct list_head *chip_list = get_irq_data(irq);
207 struct list_head *ptr; 214 struct list_head *ptr;
208 struct pl061_gpio *chip; 215 struct pl061_gpio *chip;
209 216
@@ -219,7 +226,7 @@ static void pl061_irq_handler(unsigned irq, struct irq_desc *desc)
219 if (pending == 0) 226 if (pending == 0)
220 continue; 227 continue;
221 228
222 for_each_bit(offset, &pending, PL061_GPIO_NR) 229 for_each_set_bit(offset, &pending, PL061_GPIO_NR)
223 generic_handle_irq(pl061_to_irq(&chip->gc, offset)); 230 generic_handle_irq(pl061_to_irq(&chip->gc, offset));
224 } 231 }
225 desc->chip->unmask(irq); 232 desc->chip->unmask(irq);
@@ -296,9 +303,9 @@ static int __init pl061_probe(struct amba_device *dev, struct amba_id *id)
296 goto iounmap; 303 goto iounmap;
297 } 304 }
298 INIT_LIST_HEAD(chip_list); 305 INIT_LIST_HEAD(chip_list);
299 set_irq_chip_data(irq, chip_list); 306 set_irq_data(irq, chip_list);
300 } else 307 } else
301 chip_list = get_irq_chip_data(irq); 308 chip_list = get_irq_data(irq);
302 list_add(&chip->list, chip_list); 309 list_add(&chip->list, chip_list);
303 310
304 for (i = 0; i < PL061_GPIO_NR; i++) { 311 for (i = 0; i < PL061_GPIO_NR; i++) {
diff --git a/drivers/gpio/sch_gpio.c b/drivers/gpio/sch_gpio.c
new file mode 100644
index 000000000000..583521352c16
--- /dev/null
+++ b/drivers/gpio/sch_gpio.c
@@ -0,0 +1,295 @@
1/*
2 * sch_gpio.c - GPIO interface for Intel Poulsbo SCH
3 *
4 * Copyright (c) 2010 CompuLab Ltd
5 * Author: Denis Turischev <denis@compulab.co.il>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License 2 as published
9 * by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; see the file COPYING. If not, write to
18 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
19 */
20
21#include <linux/init.h>
22#include <linux/kernel.h>
23#include <linux/module.h>
24#include <linux/io.h>
25#include <linux/errno.h>
26#include <linux/acpi.h>
27#include <linux/platform_device.h>
28
29#include <linux/gpio.h>
30
31static DEFINE_SPINLOCK(gpio_lock);
32
33#define CGEN (0x00)
34#define CGIO (0x04)
35#define CGLV (0x08)
36
37#define RGEN (0x20)
38#define RGIO (0x24)
39#define RGLV (0x28)
40
41static unsigned short gpio_ba;
42
43static int sch_gpio_core_direction_in(struct gpio_chip *gc, unsigned gpio_num)
44{
45 u8 curr_dirs;
46 unsigned short offset, bit;
47
48 spin_lock(&gpio_lock);
49
50 offset = CGIO + gpio_num / 8;
51 bit = gpio_num % 8;
52
53 curr_dirs = inb(gpio_ba + offset);
54
55 if (!(curr_dirs & (1 << bit)))
56 outb(curr_dirs | (1 << bit), gpio_ba + offset);
57
58 spin_unlock(&gpio_lock);
59 return 0;
60}
61
62static int sch_gpio_core_get(struct gpio_chip *gc, unsigned gpio_num)
63{
64 int res;
65 unsigned short offset, bit;
66
67 offset = CGLV + gpio_num / 8;
68 bit = gpio_num % 8;
69
70 res = !!(inb(gpio_ba + offset) & (1 << bit));
71 return res;
72}
73
74static void sch_gpio_core_set(struct gpio_chip *gc, unsigned gpio_num, int val)
75{
76 u8 curr_vals;
77 unsigned short offset, bit;
78
79 spin_lock(&gpio_lock);
80
81 offset = CGLV + gpio_num / 8;
82 bit = gpio_num % 8;
83
84 curr_vals = inb(gpio_ba + offset);
85
86 if (val)
87 outb(curr_vals | (1 << bit), gpio_ba + offset);
88 else
89 outb((curr_vals & ~(1 << bit)), gpio_ba + offset);
90 spin_unlock(&gpio_lock);
91}
92
93static int sch_gpio_core_direction_out(struct gpio_chip *gc,
94 unsigned gpio_num, int val)
95{
96 u8 curr_dirs;
97 unsigned short offset, bit;
98
99 sch_gpio_core_set(gc, gpio_num, val);
100
101 spin_lock(&gpio_lock);
102
103 offset = CGIO + gpio_num / 8;
104 bit = gpio_num % 8;
105
106 curr_dirs = inb(gpio_ba + offset);
107 if (curr_dirs & (1 << bit))
108 outb(curr_dirs & ~(1 << bit), gpio_ba + offset);
109
110 spin_unlock(&gpio_lock);
111 return 0;
112}
113
114static struct gpio_chip sch_gpio_core = {
115 .label = "sch_gpio_core",
116 .owner = THIS_MODULE,
117 .direction_input = sch_gpio_core_direction_in,
118 .get = sch_gpio_core_get,
119 .direction_output = sch_gpio_core_direction_out,
120 .set = sch_gpio_core_set,
121};
122
123static int sch_gpio_resume_direction_in(struct gpio_chip *gc,
124 unsigned gpio_num)
125{
126 u8 curr_dirs;
127
128 spin_lock(&gpio_lock);
129
130 curr_dirs = inb(gpio_ba + RGIO);
131
132 if (!(curr_dirs & (1 << gpio_num)))
133 outb(curr_dirs | (1 << gpio_num) , gpio_ba + RGIO);
134
135 spin_unlock(&gpio_lock);
136 return 0;
137}
138
139static int sch_gpio_resume_get(struct gpio_chip *gc, unsigned gpio_num)
140{
141 return !!(inb(gpio_ba + RGLV) & (1 << gpio_num));
142}
143
144static void sch_gpio_resume_set(struct gpio_chip *gc,
145 unsigned gpio_num, int val)
146{
147 u8 curr_vals;
148
149 spin_lock(&gpio_lock);
150
151 curr_vals = inb(gpio_ba + RGLV);
152
153 if (val)
154 outb(curr_vals | (1 << gpio_num), gpio_ba + RGLV);
155 else
156 outb((curr_vals & ~(1 << gpio_num)), gpio_ba + RGLV);
157
158 spin_unlock(&gpio_lock);
159}
160
161static int sch_gpio_resume_direction_out(struct gpio_chip *gc,
162 unsigned gpio_num, int val)
163{
164 u8 curr_dirs;
165
166 sch_gpio_resume_set(gc, gpio_num, val);
167
168 spin_lock(&gpio_lock);
169
170 curr_dirs = inb(gpio_ba + RGIO);
171 if (curr_dirs & (1 << gpio_num))
172 outb(curr_dirs & ~(1 << gpio_num), gpio_ba + RGIO);
173
174 spin_unlock(&gpio_lock);
175 return 0;
176}
177
178static struct gpio_chip sch_gpio_resume = {
179 .label = "sch_gpio_resume",
180 .owner = THIS_MODULE,
181 .direction_input = sch_gpio_resume_direction_in,
182 .get = sch_gpio_resume_get,
183 .direction_output = sch_gpio_resume_direction_out,
184 .set = sch_gpio_resume_set,
185};
186
187static int __devinit sch_gpio_probe(struct platform_device *pdev)
188{
189 struct resource *res;
190 int err;
191
192 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
193 if (!res)
194 return -EBUSY;
195
196 if (!request_region(res->start, resource_size(res), pdev->name))
197 return -EBUSY;
198
199 gpio_ba = res->start;
200
201 sch_gpio_core.base = 0;
202 sch_gpio_core.ngpio = 10;
203 sch_gpio_core.dev = &pdev->dev;
204
205 sch_gpio_resume.base = 10;
206 sch_gpio_resume.ngpio = 4;
207 sch_gpio_resume.dev = &pdev->dev;
208
209 err = gpiochip_add(&sch_gpio_core);
210 if (err < 0)
211 goto err_sch_gpio_core;
212
213 err = gpiochip_add(&sch_gpio_resume);
214 if (err < 0)
215 goto err_sch_gpio_resume;
216
217 /*
218 * GPIO[6:0] enabled by default
219 * GPIO7 is configured by the CMC as SLPIOVR
220 * Enable GPIO[9:8] core powered gpios explicitly
221 */
222 outb(0x3, gpio_ba + CGEN + 1);
223 /*
224 * SUS_GPIO[2:0] enabled by default
225 * Enable SUS_GPIO3 resume powered gpio explicitly
226 */
227 outb(0x8, gpio_ba + RGEN);
228
229 return 0;
230
231err_sch_gpio_resume:
232 err = gpiochip_remove(&sch_gpio_core);
233 if (err)
234 dev_err(&pdev->dev, "%s failed, %d\n",
235 "gpiochip_remove()", err);
236
237err_sch_gpio_core:
238 release_region(res->start, resource_size(res));
239 gpio_ba = 0;
240
241 return err;
242}
243
244static int __devexit sch_gpio_remove(struct platform_device *pdev)
245{
246 struct resource *res;
247 if (gpio_ba) {
248 int err;
249
250 err = gpiochip_remove(&sch_gpio_core);
251 if (err)
252 dev_err(&pdev->dev, "%s failed, %d\n",
253 "gpiochip_remove()", err);
254 err = gpiochip_remove(&sch_gpio_resume);
255 if (err)
256 dev_err(&pdev->dev, "%s failed, %d\n",
257 "gpiochip_remove()", err);
258
259 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
260
261 release_region(res->start, resource_size(res));
262 gpio_ba = 0;
263
264 return err;
265 }
266
267 return 0;
268}
269
270static struct platform_driver sch_gpio_driver = {
271 .driver = {
272 .name = "sch_gpio",
273 .owner = THIS_MODULE,
274 },
275 .probe = sch_gpio_probe,
276 .remove = __devexit_p(sch_gpio_remove),
277};
278
279static int __init sch_gpio_init(void)
280{
281 return platform_driver_register(&sch_gpio_driver);
282}
283
284static void __exit sch_gpio_exit(void)
285{
286 platform_driver_unregister(&sch_gpio_driver);
287}
288
289module_init(sch_gpio_init);
290module_exit(sch_gpio_exit);
291
292MODULE_AUTHOR("Denis Turischev <denis@compulab.co.il>");
293MODULE_DESCRIPTION("GPIO interface for Intel Poulsbo SCH");
294MODULE_LICENSE("GPL");
295MODULE_ALIAS("platform:sch_gpio");
diff --git a/drivers/gpio/timbgpio.c b/drivers/gpio/timbgpio.c
new file mode 100644
index 000000000000..ddd053108a13
--- /dev/null
+++ b/drivers/gpio/timbgpio.c
@@ -0,0 +1,362 @@
1/*
2 * timbgpio.c timberdale FPGA GPIO driver
3 * Copyright (c) 2009 Intel Corporation
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17 */
18
19/* Supports:
20 * Timberdale FPGA GPIO
21 */
22
23#include <linux/module.h>
24#include <linux/gpio.h>
25#include <linux/platform_device.h>
26#include <linux/irq.h>
27#include <linux/io.h>
28#include <linux/timb_gpio.h>
29#include <linux/interrupt.h>
30#include <linux/slab.h>
31
32#define DRIVER_NAME "timb-gpio"
33
34#define TGPIOVAL 0x00
35#define TGPIODIR 0x04
36#define TGPIO_IER 0x08
37#define TGPIO_ISR 0x0c
38#define TGPIO_IPR 0x10
39#define TGPIO_ICR 0x14
40#define TGPIO_FLR 0x18
41#define TGPIO_LVR 0x1c
42#define TGPIO_VER 0x20
43#define TGPIO_BFLR 0x24
44
45struct timbgpio {
46 void __iomem *membase;
47 spinlock_t lock; /* mutual exclusion */
48 struct gpio_chip gpio;
49 int irq_base;
50};
51
52static int timbgpio_update_bit(struct gpio_chip *gpio, unsigned index,
53 unsigned offset, bool enabled)
54{
55 struct timbgpio *tgpio = container_of(gpio, struct timbgpio, gpio);
56 u32 reg;
57
58 spin_lock(&tgpio->lock);
59 reg = ioread32(tgpio->membase + offset);
60
61 if (enabled)
62 reg |= (1 << index);
63 else
64 reg &= ~(1 << index);
65
66 iowrite32(reg, tgpio->membase + offset);
67 spin_unlock(&tgpio->lock);
68
69 return 0;
70}
71
72static int timbgpio_gpio_direction_input(struct gpio_chip *gpio, unsigned nr)
73{
74 return timbgpio_update_bit(gpio, nr, TGPIODIR, true);
75}
76
77static int timbgpio_gpio_get(struct gpio_chip *gpio, unsigned nr)
78{
79 struct timbgpio *tgpio = container_of(gpio, struct timbgpio, gpio);
80 u32 value;
81
82 value = ioread32(tgpio->membase + TGPIOVAL);
83 return (value & (1 << nr)) ? 1 : 0;
84}
85
86static int timbgpio_gpio_direction_output(struct gpio_chip *gpio,
87 unsigned nr, int val)
88{
89 return timbgpio_update_bit(gpio, nr, TGPIODIR, false);
90}
91
92static void timbgpio_gpio_set(struct gpio_chip *gpio,
93 unsigned nr, int val)
94{
95 timbgpio_update_bit(gpio, nr, TGPIOVAL, val != 0);
96}
97
98static int timbgpio_to_irq(struct gpio_chip *gpio, unsigned offset)
99{
100 struct timbgpio *tgpio = container_of(gpio, struct timbgpio, gpio);
101
102 if (tgpio->irq_base <= 0)
103 return -EINVAL;
104
105 return tgpio->irq_base + offset;
106}
107
108/*
109 * GPIO IRQ
110 */
111static void timbgpio_irq_disable(unsigned irq)
112{
113 struct timbgpio *tgpio = get_irq_chip_data(irq);
114 int offset = irq - tgpio->irq_base;
115
116 timbgpio_update_bit(&tgpio->gpio, offset, TGPIO_IER, 0);
117}
118
119static void timbgpio_irq_enable(unsigned irq)
120{
121 struct timbgpio *tgpio = get_irq_chip_data(irq);
122 int offset = irq - tgpio->irq_base;
123
124 timbgpio_update_bit(&tgpio->gpio, offset, TGPIO_IER, 1);
125}
126
127static int timbgpio_irq_type(unsigned irq, unsigned trigger)
128{
129 struct timbgpio *tgpio = get_irq_chip_data(irq);
130 int offset = irq - tgpio->irq_base;
131 unsigned long flags;
132 u32 lvr, flr, bflr = 0;
133 u32 ver;
134 int ret = 0;
135
136 if (offset < 0 || offset > tgpio->gpio.ngpio)
137 return -EINVAL;
138
139 ver = ioread32(tgpio->membase + TGPIO_VER);
140
141 spin_lock_irqsave(&tgpio->lock, flags);
142
143 lvr = ioread32(tgpio->membase + TGPIO_LVR);
144 flr = ioread32(tgpio->membase + TGPIO_FLR);
145 if (ver > 2)
146 bflr = ioread32(tgpio->membase + TGPIO_BFLR);
147
148 if (trigger & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) {
149 bflr &= ~(1 << offset);
150 flr &= ~(1 << offset);
151 if (trigger & IRQ_TYPE_LEVEL_HIGH)
152 lvr |= 1 << offset;
153 else
154 lvr &= ~(1 << offset);
155 }
156
157 if ((trigger & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH) {
158 if (ver < 3) {
159 ret = -EINVAL;
160 goto out;
161 }
162 else {
163 flr |= 1 << offset;
164 bflr |= 1 << offset;
165 }
166 } else {
167 bflr &= ~(1 << offset);
168 flr |= 1 << offset;
169 if (trigger & IRQ_TYPE_EDGE_FALLING)
170 lvr &= ~(1 << offset);
171 else
172 lvr |= 1 << offset;
173 }
174
175 iowrite32(lvr, tgpio->membase + TGPIO_LVR);
176 iowrite32(flr, tgpio->membase + TGPIO_FLR);
177 if (ver > 2)
178 iowrite32(bflr, tgpio->membase + TGPIO_BFLR);
179
180 iowrite32(1 << offset, tgpio->membase + TGPIO_ICR);
181
182out:
183 spin_unlock_irqrestore(&tgpio->lock, flags);
184 return ret;
185}
186
187static void timbgpio_irq(unsigned int irq, struct irq_desc *desc)
188{
189 struct timbgpio *tgpio = get_irq_data(irq);
190 unsigned long ipr;
191 int offset;
192
193 desc->chip->ack(irq);
194 ipr = ioread32(tgpio->membase + TGPIO_IPR);
195 iowrite32(ipr, tgpio->membase + TGPIO_ICR);
196
197 for_each_set_bit(offset, &ipr, tgpio->gpio.ngpio)
198 generic_handle_irq(timbgpio_to_irq(&tgpio->gpio, offset));
199}
200
201static struct irq_chip timbgpio_irqchip = {
202 .name = "GPIO",
203 .enable = timbgpio_irq_enable,
204 .disable = timbgpio_irq_disable,
205 .set_type = timbgpio_irq_type,
206};
207
208static int __devinit timbgpio_probe(struct platform_device *pdev)
209{
210 int err, i;
211 struct gpio_chip *gc;
212 struct timbgpio *tgpio;
213 struct resource *iomem;
214 struct timbgpio_platform_data *pdata = pdev->dev.platform_data;
215 int irq = platform_get_irq(pdev, 0);
216
217 if (!pdata || pdata->nr_pins > 32) {
218 err = -EINVAL;
219 goto err_mem;
220 }
221
222 iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
223 if (!iomem) {
224 err = -EINVAL;
225 goto err_mem;
226 }
227
228 tgpio = kzalloc(sizeof(*tgpio), GFP_KERNEL);
229 if (!tgpio) {
230 err = -EINVAL;
231 goto err_mem;
232 }
233 tgpio->irq_base = pdata->irq_base;
234
235 spin_lock_init(&tgpio->lock);
236
237 if (!request_mem_region(iomem->start, resource_size(iomem),
238 DRIVER_NAME)) {
239 err = -EBUSY;
240 goto err_request;
241 }
242
243 tgpio->membase = ioremap(iomem->start, resource_size(iomem));
244 if (!tgpio->membase) {
245 err = -ENOMEM;
246 goto err_ioremap;
247 }
248
249 gc = &tgpio->gpio;
250
251 gc->label = dev_name(&pdev->dev);
252 gc->owner = THIS_MODULE;
253 gc->dev = &pdev->dev;
254 gc->direction_input = timbgpio_gpio_direction_input;
255 gc->get = timbgpio_gpio_get;
256 gc->direction_output = timbgpio_gpio_direction_output;
257 gc->set = timbgpio_gpio_set;
258 gc->to_irq = (irq >= 0 && tgpio->irq_base > 0) ? timbgpio_to_irq : NULL;
259 gc->dbg_show = NULL;
260 gc->base = pdata->gpio_base;
261 gc->ngpio = pdata->nr_pins;
262 gc->can_sleep = 0;
263
264 err = gpiochip_add(gc);
265 if (err)
266 goto err_chipadd;
267
268 platform_set_drvdata(pdev, tgpio);
269
270 /* make sure to disable interrupts */
271 iowrite32(0x0, tgpio->membase + TGPIO_IER);
272
273 if (irq < 0 || tgpio->irq_base <= 0)
274 return 0;
275
276 for (i = 0; i < pdata->nr_pins; i++) {
277 set_irq_chip_and_handler_name(tgpio->irq_base + i,
278 &timbgpio_irqchip, handle_simple_irq, "mux");
279 set_irq_chip_data(tgpio->irq_base + i, tgpio);
280#ifdef CONFIG_ARM
281 set_irq_flags(tgpio->irq_base + i, IRQF_VALID | IRQF_PROBE);
282#endif
283 }
284
285 set_irq_data(irq, tgpio);
286 set_irq_chained_handler(irq, timbgpio_irq);
287
288 return 0;
289
290err_chipadd:
291 iounmap(tgpio->membase);
292err_ioremap:
293 release_mem_region(iomem->start, resource_size(iomem));
294err_request:
295 kfree(tgpio);
296err_mem:
297 printk(KERN_ERR DRIVER_NAME": Failed to register GPIOs: %d\n", err);
298
299 return err;
300}
301
302static int __devexit timbgpio_remove(struct platform_device *pdev)
303{
304 int err;
305 struct timbgpio_platform_data *pdata = pdev->dev.platform_data;
306 struct timbgpio *tgpio = platform_get_drvdata(pdev);
307 struct resource *iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
308 int irq = platform_get_irq(pdev, 0);
309
310 if (irq >= 0 && tgpio->irq_base > 0) {
311 int i;
312 for (i = 0; i < pdata->nr_pins; i++) {
313 set_irq_chip(tgpio->irq_base + i, NULL);
314 set_irq_chip_data(tgpio->irq_base + i, NULL);
315 }
316
317 set_irq_handler(irq, NULL);
318 set_irq_data(irq, NULL);
319 }
320
321 err = gpiochip_remove(&tgpio->gpio);
322 if (err)
323 printk(KERN_ERR DRIVER_NAME": failed to remove gpio_chip\n");
324
325 iounmap(tgpio->membase);
326 release_mem_region(iomem->start, resource_size(iomem));
327 kfree(tgpio);
328
329 platform_set_drvdata(pdev, NULL);
330
331 return 0;
332}
333
334static struct platform_driver timbgpio_platform_driver = {
335 .driver = {
336 .name = DRIVER_NAME,
337 .owner = THIS_MODULE,
338 },
339 .probe = timbgpio_probe,
340 .remove = timbgpio_remove,
341};
342
343/*--------------------------------------------------------------------------*/
344
345static int __init timbgpio_init(void)
346{
347 return platform_driver_register(&timbgpio_platform_driver);
348}
349
350static void __exit timbgpio_exit(void)
351{
352 platform_driver_unregister(&timbgpio_platform_driver);
353}
354
355module_init(timbgpio_init);
356module_exit(timbgpio_exit);
357
358MODULE_DESCRIPTION("Timberdale GPIO driver");
359MODULE_LICENSE("GPL v2");
360MODULE_AUTHOR("Mocean Laboratories");
361MODULE_ALIAS("platform:"DRIVER_NAME);
362
diff --git a/drivers/gpio/twl4030-gpio.c b/drivers/gpio/twl4030-gpio.c
index 49384a7c5492..57635ac35a73 100644
--- a/drivers/gpio/twl4030-gpio.c
+++ b/drivers/gpio/twl4030-gpio.c
@@ -32,9 +32,8 @@
32#include <linux/irq.h> 32#include <linux/irq.h>
33#include <linux/gpio.h> 33#include <linux/gpio.h>
34#include <linux/platform_device.h> 34#include <linux/platform_device.h>
35#include <linux/slab.h>
36 35
37#include <linux/i2c/twl4030.h> 36#include <linux/i2c/twl.h>
38 37
39 38
40/* 39/*
@@ -80,7 +79,7 @@ static unsigned int gpio_usage_count;
80 */ 79 */
81static inline int gpio_twl4030_write(u8 address, u8 data) 80static inline int gpio_twl4030_write(u8 address, u8 data)
82{ 81{
83 return twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, data, address); 82 return twl_i2c_write_u8(TWL4030_MODULE_GPIO, data, address);
84} 83}
85 84
86/*----------------------------------------------------------------------*/ 85/*----------------------------------------------------------------------*/
@@ -117,7 +116,7 @@ static inline int gpio_twl4030_read(u8 address)
117 u8 data; 116 u8 data;
118 int ret = 0; 117 int ret = 0;
119 118
120 ret = twl4030_i2c_read_u8(TWL4030_MODULE_GPIO, &data, address); 119 ret = twl_i2c_read_u8(TWL4030_MODULE_GPIO, &data, address);
121 return (ret < 0) ? ret : data; 120 return (ret < 0) ? ret : data;
122} 121}
123 122
@@ -142,7 +141,7 @@ static void twl4030_led_set_value(int led, int value)
142 cached_leden &= ~mask; 141 cached_leden &= ~mask;
143 else 142 else
144 cached_leden |= mask; 143 cached_leden |= mask;
145 status = twl4030_i2c_write_u8(TWL4030_MODULE_LED, cached_leden, 144 status = twl_i2c_write_u8(TWL4030_MODULE_LED, cached_leden,
146 TWL4030_LED_LEDEN); 145 TWL4030_LED_LEDEN);
147 mutex_unlock(&gpio_lock); 146 mutex_unlock(&gpio_lock);
148} 147}
@@ -223,23 +222,23 @@ static int twl_request(struct gpio_chip *chip, unsigned offset)
223 } 222 }
224 223
225 /* initialize PWM to always-drive */ 224 /* initialize PWM to always-drive */
226 status = twl4030_i2c_write_u8(module, 0x7f, 225 status = twl_i2c_write_u8(module, 0x7f,
227 TWL4030_PWMx_PWMxOFF); 226 TWL4030_PWMx_PWMxOFF);
228 if (status < 0) 227 if (status < 0)
229 goto done; 228 goto done;
230 status = twl4030_i2c_write_u8(module, 0x7f, 229 status = twl_i2c_write_u8(module, 0x7f,
231 TWL4030_PWMx_PWMxON); 230 TWL4030_PWMx_PWMxON);
232 if (status < 0) 231 if (status < 0)
233 goto done; 232 goto done;
234 233
235 /* init LED to not-driven (high) */ 234 /* init LED to not-driven (high) */
236 module = TWL4030_MODULE_LED; 235 module = TWL4030_MODULE_LED;
237 status = twl4030_i2c_read_u8(module, &cached_leden, 236 status = twl_i2c_read_u8(module, &cached_leden,
238 TWL4030_LED_LEDEN); 237 TWL4030_LED_LEDEN);
239 if (status < 0) 238 if (status < 0)
240 goto done; 239 goto done;
241 cached_leden &= ~ledclr_mask; 240 cached_leden &= ~ledclr_mask;
242 status = twl4030_i2c_write_u8(module, cached_leden, 241 status = twl_i2c_write_u8(module, cached_leden,
243 TWL4030_LED_LEDEN); 242 TWL4030_LED_LEDEN);
244 if (status < 0) 243 if (status < 0)
245 goto done; 244 goto done;
@@ -370,7 +369,7 @@ static int __devinit gpio_twl4030_pulls(u32 ups, u32 downs)
370 message[i] = bit_mask; 369 message[i] = bit_mask;
371 } 370 }
372 371
373 return twl4030_i2c_write(TWL4030_MODULE_GPIO, message, 372 return twl_i2c_write(TWL4030_MODULE_GPIO, message,
374 REG_GPIOPUPDCTR1, 5); 373 REG_GPIOPUPDCTR1, 5);
375} 374}
376 375
@@ -387,7 +386,7 @@ static int __devinit gpio_twl4030_debounce(u32 debounce, u8 mmc_cd)
387 debounce >>= 8; 386 debounce >>= 8;
388 message[3] = (debounce & 0x03); 387 message[3] = (debounce & 0x03);
389 388
390 return twl4030_i2c_write(TWL4030_MODULE_GPIO, message, 389 return twl_i2c_write(TWL4030_MODULE_GPIO, message,
391 REG_GPIO_DEBEN1, 3); 390 REG_GPIO_DEBEN1, 3);
392} 391}
393 392
diff --git a/drivers/gpio/wm831x-gpio.c b/drivers/gpio/wm831x-gpio.c
index f9c09a54ec7f..1fa449a1a4cb 100644
--- a/drivers/gpio/wm831x-gpio.c
+++ b/drivers/gpio/wm831x-gpio.c
@@ -13,6 +13,7 @@
13 */ 13 */
14 14
15#include <linux/kernel.h> 15#include <linux/kernel.h>
16#include <linux/slab.h>
16#include <linux/module.h> 17#include <linux/module.h>
17#include <linux/gpio.h> 18#include <linux/gpio.h>
18#include <linux/mfd/core.h> 19#include <linux/mfd/core.h>
@@ -22,8 +23,7 @@
22#include <linux/mfd/wm831x/core.h> 23#include <linux/mfd/wm831x/core.h>
23#include <linux/mfd/wm831x/pdata.h> 24#include <linux/mfd/wm831x/pdata.h>
24#include <linux/mfd/wm831x/gpio.h> 25#include <linux/mfd/wm831x/gpio.h>
25 26#include <linux/mfd/wm831x/irq.h>
26#define WM831X_GPIO_MAX 16
27 27
28struct wm831x_gpio { 28struct wm831x_gpio {
29 struct wm831x *wm831x; 29 struct wm831x *wm831x;
@@ -39,10 +39,14 @@ static int wm831x_gpio_direction_in(struct gpio_chip *chip, unsigned offset)
39{ 39{
40 struct wm831x_gpio *wm831x_gpio = to_wm831x_gpio(chip); 40 struct wm831x_gpio *wm831x_gpio = to_wm831x_gpio(chip);
41 struct wm831x *wm831x = wm831x_gpio->wm831x; 41 struct wm831x *wm831x = wm831x_gpio->wm831x;
42 int val = WM831X_GPN_DIR;
43
44 if (wm831x->has_gpio_ena)
45 val |= WM831X_GPN_TRI;
42 46
43 return wm831x_set_bits(wm831x, WM831X_GPIO1_CONTROL + offset, 47 return wm831x_set_bits(wm831x, WM831X_GPIO1_CONTROL + offset,
44 WM831X_GPN_DIR | WM831X_GPN_TRI, 48 WM831X_GPN_DIR | WM831X_GPN_TRI |
45 WM831X_GPN_DIR); 49 WM831X_GPN_FN_MASK, val);
46} 50}
47 51
48static int wm831x_gpio_get(struct gpio_chip *chip, unsigned offset) 52static int wm831x_gpio_get(struct gpio_chip *chip, unsigned offset)
@@ -61,23 +65,47 @@ static int wm831x_gpio_get(struct gpio_chip *chip, unsigned offset)
61 return 0; 65 return 0;
62} 66}
63 67
68static void wm831x_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
69{
70 struct wm831x_gpio *wm831x_gpio = to_wm831x_gpio(chip);
71 struct wm831x *wm831x = wm831x_gpio->wm831x;
72
73 wm831x_set_bits(wm831x, WM831X_GPIO_LEVEL, 1 << offset,
74 value << offset);
75}
76
64static int wm831x_gpio_direction_out(struct gpio_chip *chip, 77static int wm831x_gpio_direction_out(struct gpio_chip *chip,
65 unsigned offset, int value) 78 unsigned offset, int value)
66{ 79{
67 struct wm831x_gpio *wm831x_gpio = to_wm831x_gpio(chip); 80 struct wm831x_gpio *wm831x_gpio = to_wm831x_gpio(chip);
68 struct wm831x *wm831x = wm831x_gpio->wm831x; 81 struct wm831x *wm831x = wm831x_gpio->wm831x;
82 int val = 0;
83 int ret;
69 84
70 return wm831x_set_bits(wm831x, WM831X_GPIO1_CONTROL + offset, 85 if (wm831x->has_gpio_ena)
71 WM831X_GPN_DIR | WM831X_GPN_TRI, 0); 86 val |= WM831X_GPN_TRI;
87
88 ret = wm831x_set_bits(wm831x, WM831X_GPIO1_CONTROL + offset,
89 WM831X_GPN_DIR | WM831X_GPN_TRI |
90 WM831X_GPN_FN_MASK, val);
91 if (ret < 0)
92 return ret;
93
94 /* Can only set GPIO state once it's in output mode */
95 wm831x_gpio_set(chip, offset, value);
96
97 return 0;
72} 98}
73 99
74static void wm831x_gpio_set(struct gpio_chip *chip, unsigned offset, int value) 100static int wm831x_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
75{ 101{
76 struct wm831x_gpio *wm831x_gpio = to_wm831x_gpio(chip); 102 struct wm831x_gpio *wm831x_gpio = to_wm831x_gpio(chip);
77 struct wm831x *wm831x = wm831x_gpio->wm831x; 103 struct wm831x *wm831x = wm831x_gpio->wm831x;
78 104
79 wm831x_set_bits(wm831x, WM831X_GPIO_LEVEL, 1 << offset, 105 if (!wm831x->irq_base)
80 value << offset); 106 return -EINVAL;
107
108 return wm831x->irq_base + WM831X_IRQ_GPIO_1 + offset;
81} 109}
82 110
83#ifdef CONFIG_DEBUG_FS 111#ifdef CONFIG_DEBUG_FS
@@ -85,7 +113,7 @@ static void wm831x_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
85{ 113{
86 struct wm831x_gpio *wm831x_gpio = to_wm831x_gpio(chip); 114 struct wm831x_gpio *wm831x_gpio = to_wm831x_gpio(chip);
87 struct wm831x *wm831x = wm831x_gpio->wm831x; 115 struct wm831x *wm831x = wm831x_gpio->wm831x;
88 int i; 116 int i, tristated;
89 117
90 for (i = 0; i < chip->ngpio; i++) { 118 for (i = 0; i < chip->ngpio; i++) {
91 int gpio = i + chip->base; 119 int gpio = i + chip->base;
@@ -152,15 +180,19 @@ static void wm831x_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
152 break; 180 break;
153 } 181 }
154 182
183 tristated = reg & WM831X_GPN_TRI;
184 if (wm831x->has_gpio_ena)
185 tristated = !tristated;
186
155 seq_printf(s, " %s %s %s %s%s\n" 187 seq_printf(s, " %s %s %s %s%s\n"
156 " %s%s (0x%4x)\n", 188 " %s%s (0x%4x)\n",
157 reg & WM831X_GPN_DIR ? "in" : "out", 189 reg & WM831X_GPN_DIR ? "in" : "out",
158 wm831x_gpio_get(chip, i) ? "high" : "low", 190 wm831x_gpio_get(chip, i) ? "high" : "low",
159 pull, 191 pull,
160 powerdomain, 192 powerdomain,
161 reg & WM831X_GPN_POL ? " inverted" : "", 193 reg & WM831X_GPN_POL ? "" : " inverted",
162 reg & WM831X_GPN_OD ? "open-drain" : "CMOS", 194 reg & WM831X_GPN_OD ? "open-drain" : "CMOS",
163 reg & WM831X_GPN_TRI ? " tristated" : "", 195 tristated ? " tristated" : "",
164 reg); 196 reg);
165 } 197 }
166} 198}
@@ -175,6 +207,7 @@ static struct gpio_chip template_chip = {
175 .get = wm831x_gpio_get, 207 .get = wm831x_gpio_get,
176 .direction_output = wm831x_gpio_direction_out, 208 .direction_output = wm831x_gpio_direction_out,
177 .set = wm831x_gpio_set, 209 .set = wm831x_gpio_set,
210 .to_irq = wm831x_gpio_to_irq,
178 .dbg_show = wm831x_gpio_dbg_show, 211 .dbg_show = wm831x_gpio_dbg_show,
179 .can_sleep = 1, 212 .can_sleep = 1,
180}; 213};
@@ -192,7 +225,7 @@ static int __devinit wm831x_gpio_probe(struct platform_device *pdev)
192 225
193 wm831x_gpio->wm831x = wm831x; 226 wm831x_gpio->wm831x = wm831x;
194 wm831x_gpio->gpio_chip = template_chip; 227 wm831x_gpio->gpio_chip = template_chip;
195 wm831x_gpio->gpio_chip.ngpio = WM831X_GPIO_MAX; 228 wm831x_gpio->gpio_chip.ngpio = wm831x->num_gpio;
196 wm831x_gpio->gpio_chip.dev = &pdev->dev; 229 wm831x_gpio->gpio_chip.dev = &pdev->dev;
197 if (pdata && pdata->gpio_base) 230 if (pdata && pdata->gpio_base)
198 wm831x_gpio->gpio_chip.base = pdata->gpio_base; 231 wm831x_gpio->gpio_chip.base = pdata->gpio_base;
diff --git a/drivers/gpio/wm8350-gpiolib.c b/drivers/gpio/wm8350-gpiolib.c
new file mode 100644
index 000000000000..359999290f55
--- /dev/null
+++ b/drivers/gpio/wm8350-gpiolib.c
@@ -0,0 +1,182 @@
1/*
2 * wm835x-gpiolib.c -- gpiolib support for Wolfson WM835x PMICs
3 *
4 * Copyright 2009 Wolfson Microelectronics PLC.
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 */
14
15#include <linux/kernel.h>
16#include <linux/slab.h>
17#include <linux/module.h>
18#include <linux/gpio.h>
19#include <linux/mfd/core.h>
20#include <linux/platform_device.h>
21#include <linux/seq_file.h>
22
23#include <linux/mfd/wm8350/core.h>
24#include <linux/mfd/wm8350/gpio.h>
25
26struct wm8350_gpio_data {
27 struct wm8350 *wm8350;
28 struct gpio_chip gpio_chip;
29};
30
31static inline struct wm8350_gpio_data *to_wm8350_gpio(struct gpio_chip *chip)
32{
33 return container_of(chip, struct wm8350_gpio_data, gpio_chip);
34}
35
36static int wm8350_gpio_direction_in(struct gpio_chip *chip, unsigned offset)
37{
38 struct wm8350_gpio_data *wm8350_gpio = to_wm8350_gpio(chip);
39 struct wm8350 *wm8350 = wm8350_gpio->wm8350;
40
41 return wm8350_set_bits(wm8350, WM8350_GPIO_CONFIGURATION_I_O,
42 1 << offset);
43}
44
45static int wm8350_gpio_get(struct gpio_chip *chip, unsigned offset)
46{
47 struct wm8350_gpio_data *wm8350_gpio = to_wm8350_gpio(chip);
48 struct wm8350 *wm8350 = wm8350_gpio->wm8350;
49 int ret;
50
51 ret = wm8350_reg_read(wm8350, WM8350_GPIO_LEVEL);
52 if (ret < 0)
53 return ret;
54
55 if (ret & (1 << offset))
56 return 1;
57 else
58 return 0;
59}
60
61static void wm8350_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
62{
63 struct wm8350_gpio_data *wm8350_gpio = to_wm8350_gpio(chip);
64 struct wm8350 *wm8350 = wm8350_gpio->wm8350;
65
66 if (value)
67 wm8350_set_bits(wm8350, WM8350_GPIO_LEVEL, 1 << offset);
68 else
69 wm8350_clear_bits(wm8350, WM8350_GPIO_LEVEL, 1 << offset);
70}
71
72static int wm8350_gpio_direction_out(struct gpio_chip *chip,
73 unsigned offset, int value)
74{
75 struct wm8350_gpio_data *wm8350_gpio = to_wm8350_gpio(chip);
76 struct wm8350 *wm8350 = wm8350_gpio->wm8350;
77 int ret;
78
79 ret = wm8350_clear_bits(wm8350, WM8350_GPIO_CONFIGURATION_I_O,
80 1 << offset);
81 if (ret < 0)
82 return ret;
83
84 /* Don't have an atomic direction/value setup */
85 wm8350_gpio_set(chip, offset, value);
86
87 return 0;
88}
89
90static int wm8350_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
91{
92 struct wm8350_gpio_data *wm8350_gpio = to_wm8350_gpio(chip);
93 struct wm8350 *wm8350 = wm8350_gpio->wm8350;
94
95 if (!wm8350->irq_base)
96 return -EINVAL;
97
98 return wm8350->irq_base + WM8350_IRQ_GPIO(offset);
99}
100
101static struct gpio_chip template_chip = {
102 .label = "wm8350",
103 .owner = THIS_MODULE,
104 .direction_input = wm8350_gpio_direction_in,
105 .get = wm8350_gpio_get,
106 .direction_output = wm8350_gpio_direction_out,
107 .set = wm8350_gpio_set,
108 .to_irq = wm8350_gpio_to_irq,
109 .can_sleep = 1,
110};
111
112static int __devinit wm8350_gpio_probe(struct platform_device *pdev)
113{
114 struct wm8350 *wm8350 = dev_get_drvdata(pdev->dev.parent);
115 struct wm8350_platform_data *pdata = wm8350->dev->platform_data;
116 struct wm8350_gpio_data *wm8350_gpio;
117 int ret;
118
119 wm8350_gpio = kzalloc(sizeof(*wm8350_gpio), GFP_KERNEL);
120 if (wm8350_gpio == NULL)
121 return -ENOMEM;
122
123 wm8350_gpio->wm8350 = wm8350;
124 wm8350_gpio->gpio_chip = template_chip;
125 wm8350_gpio->gpio_chip.ngpio = 13;
126 wm8350_gpio->gpio_chip.dev = &pdev->dev;
127 if (pdata && pdata->gpio_base)
128 wm8350_gpio->gpio_chip.base = pdata->gpio_base;
129 else
130 wm8350_gpio->gpio_chip.base = -1;
131
132 ret = gpiochip_add(&wm8350_gpio->gpio_chip);
133 if (ret < 0) {
134 dev_err(&pdev->dev, "Could not register gpiochip, %d\n",
135 ret);
136 goto err;
137 }
138
139 platform_set_drvdata(pdev, wm8350_gpio);
140
141 return ret;
142
143err:
144 kfree(wm8350_gpio);
145 return ret;
146}
147
148static int __devexit wm8350_gpio_remove(struct platform_device *pdev)
149{
150 struct wm8350_gpio_data *wm8350_gpio = platform_get_drvdata(pdev);
151 int ret;
152
153 ret = gpiochip_remove(&wm8350_gpio->gpio_chip);
154 if (ret == 0)
155 kfree(wm8350_gpio);
156
157 return ret;
158}
159
160static struct platform_driver wm8350_gpio_driver = {
161 .driver.name = "wm8350-gpio",
162 .driver.owner = THIS_MODULE,
163 .probe = wm8350_gpio_probe,
164 .remove = __devexit_p(wm8350_gpio_remove),
165};
166
167static int __init wm8350_gpio_init(void)
168{
169 return platform_driver_register(&wm8350_gpio_driver);
170}
171subsys_initcall(wm8350_gpio_init);
172
173static void __exit wm8350_gpio_exit(void)
174{
175 platform_driver_unregister(&wm8350_gpio_driver);
176}
177module_exit(wm8350_gpio_exit);
178
179MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
180MODULE_DESCRIPTION("GPIO interface for WM8350 PMICs");
181MODULE_LICENSE("GPL");
182MODULE_ALIAS("platform:wm8350-gpio");
diff --git a/drivers/gpio/wm8994-gpio.c b/drivers/gpio/wm8994-gpio.c
new file mode 100644
index 000000000000..7607cc61e1dd
--- /dev/null
+++ b/drivers/gpio/wm8994-gpio.c
@@ -0,0 +1,205 @@
1/*
2 * wm8994-gpio.c -- gpiolib support for Wolfson WM8994
3 *
4 * Copyright 2009 Wolfson Microelectronics PLC.
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 */
14
15#include <linux/kernel.h>
16#include <linux/slab.h>
17#include <linux/module.h>
18#include <linux/gpio.h>
19#include <linux/mfd/core.h>
20#include <linux/platform_device.h>
21#include <linux/seq_file.h>
22
23#include <linux/mfd/wm8994/core.h>
24#include <linux/mfd/wm8994/pdata.h>
25#include <linux/mfd/wm8994/gpio.h>
26#include <linux/mfd/wm8994/registers.h>
27
28struct wm8994_gpio {
29 struct wm8994 *wm8994;
30 struct gpio_chip gpio_chip;
31};
32
33static inline struct wm8994_gpio *to_wm8994_gpio(struct gpio_chip *chip)
34{
35 return container_of(chip, struct wm8994_gpio, gpio_chip);
36}
37
38static int wm8994_gpio_direction_in(struct gpio_chip *chip, unsigned offset)
39{
40 struct wm8994_gpio *wm8994_gpio = to_wm8994_gpio(chip);
41 struct wm8994 *wm8994 = wm8994_gpio->wm8994;
42
43 return wm8994_set_bits(wm8994, WM8994_GPIO_1 + offset,
44 WM8994_GPN_DIR, WM8994_GPN_DIR);
45}
46
47static int wm8994_gpio_get(struct gpio_chip *chip, unsigned offset)
48{
49 struct wm8994_gpio *wm8994_gpio = to_wm8994_gpio(chip);
50 struct wm8994 *wm8994 = wm8994_gpio->wm8994;
51 int ret;
52
53 ret = wm8994_reg_read(wm8994, WM8994_GPIO_1 + offset);
54 if (ret < 0)
55 return ret;
56
57 if (ret & WM8994_GPN_LVL)
58 return 1;
59 else
60 return 0;
61}
62
63static int wm8994_gpio_direction_out(struct gpio_chip *chip,
64 unsigned offset, int value)
65{
66 struct wm8994_gpio *wm8994_gpio = to_wm8994_gpio(chip);
67 struct wm8994 *wm8994 = wm8994_gpio->wm8994;
68
69 return wm8994_set_bits(wm8994, WM8994_GPIO_1 + offset,
70 WM8994_GPN_DIR, 0);
71}
72
73static void wm8994_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
74{
75 struct wm8994_gpio *wm8994_gpio = to_wm8994_gpio(chip);
76 struct wm8994 *wm8994 = wm8994_gpio->wm8994;
77
78 if (value)
79 value = WM8994_GPN_LVL;
80
81 wm8994_set_bits(wm8994, WM8994_GPIO_1 + offset, WM8994_GPN_LVL, value);
82}
83
84#ifdef CONFIG_DEBUG_FS
85static void wm8994_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
86{
87 struct wm8994_gpio *wm8994_gpio = to_wm8994_gpio(chip);
88 struct wm8994 *wm8994 = wm8994_gpio->wm8994;
89 int i;
90
91 for (i = 0; i < chip->ngpio; i++) {
92 int gpio = i + chip->base;
93 int reg;
94 const char *label;
95
96 /* We report the GPIO even if it's not requested since
97 * we're also reporting things like alternate
98 * functions which apply even when the GPIO is not in
99 * use as a GPIO.
100 */
101 label = gpiochip_is_requested(chip, i);
102 if (!label)
103 label = "Unrequested";
104
105 seq_printf(s, " gpio-%-3d (%-20.20s) ", gpio, label);
106
107 reg = wm8994_reg_read(wm8994, WM8994_GPIO_1 + i);
108 if (reg < 0) {
109 dev_err(wm8994->dev,
110 "GPIO control %d read failed: %d\n",
111 gpio, reg);
112 seq_printf(s, "\n");
113 continue;
114 }
115
116 /* No decode yet; note that GPIO2 is special */
117 seq_printf(s, "(%x)\n", reg);
118 }
119}
120#else
121#define wm8994_gpio_dbg_show NULL
122#endif
123
124static struct gpio_chip template_chip = {
125 .label = "wm8994",
126 .owner = THIS_MODULE,
127 .direction_input = wm8994_gpio_direction_in,
128 .get = wm8994_gpio_get,
129 .direction_output = wm8994_gpio_direction_out,
130 .set = wm8994_gpio_set,
131 .dbg_show = wm8994_gpio_dbg_show,
132 .can_sleep = 1,
133};
134
135static int __devinit wm8994_gpio_probe(struct platform_device *pdev)
136{
137 struct wm8994 *wm8994 = dev_get_drvdata(pdev->dev.parent);
138 struct wm8994_pdata *pdata = wm8994->dev->platform_data;
139 struct wm8994_gpio *wm8994_gpio;
140 int ret;
141
142 wm8994_gpio = kzalloc(sizeof(*wm8994_gpio), GFP_KERNEL);
143 if (wm8994_gpio == NULL)
144 return -ENOMEM;
145
146 wm8994_gpio->wm8994 = wm8994;
147 wm8994_gpio->gpio_chip = template_chip;
148 wm8994_gpio->gpio_chip.ngpio = WM8994_GPIO_MAX;
149 wm8994_gpio->gpio_chip.dev = &pdev->dev;
150 if (pdata && pdata->gpio_base)
151 wm8994_gpio->gpio_chip.base = pdata->gpio_base;
152 else
153 wm8994_gpio->gpio_chip.base = -1;
154
155 ret = gpiochip_add(&wm8994_gpio->gpio_chip);
156 if (ret < 0) {
157 dev_err(&pdev->dev, "Could not register gpiochip, %d\n",
158 ret);
159 goto err;
160 }
161
162 platform_set_drvdata(pdev, wm8994_gpio);
163
164 return ret;
165
166err:
167 kfree(wm8994_gpio);
168 return ret;
169}
170
171static int __devexit wm8994_gpio_remove(struct platform_device *pdev)
172{
173 struct wm8994_gpio *wm8994_gpio = platform_get_drvdata(pdev);
174 int ret;
175
176 ret = gpiochip_remove(&wm8994_gpio->gpio_chip);
177 if (ret == 0)
178 kfree(wm8994_gpio);
179
180 return ret;
181}
182
183static struct platform_driver wm8994_gpio_driver = {
184 .driver.name = "wm8994-gpio",
185 .driver.owner = THIS_MODULE,
186 .probe = wm8994_gpio_probe,
187 .remove = __devexit_p(wm8994_gpio_remove),
188};
189
190static int __init wm8994_gpio_init(void)
191{
192 return platform_driver_register(&wm8994_gpio_driver);
193}
194subsys_initcall(wm8994_gpio_init);
195
196static void __exit wm8994_gpio_exit(void)
197{
198 platform_driver_unregister(&wm8994_gpio_driver);
199}
200module_exit(wm8994_gpio_exit);
201
202MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
203MODULE_DESCRIPTION("GPIO interface for WM8994");
204MODULE_LICENSE("GPL");
205MODULE_ALIAS("platform:wm8994-gpio");
diff --git a/drivers/gpio/xilinx_gpio.c b/drivers/gpio/xilinx_gpio.c
index 3c1177abebd3..b8fa65b5bfca 100644
--- a/drivers/gpio/xilinx_gpio.c
+++ b/drivers/gpio/xilinx_gpio.c
@@ -19,6 +19,7 @@
19#include <linux/of_gpio.h> 19#include <linux/of_gpio.h>
20#include <linux/io.h> 20#include <linux/io.h>
21#include <linux/gpio.h> 21#include <linux/gpio.h>
22#include <linux/slab.h>
22 23
23/* Register Offset Definitions */ 24/* Register Offset Definitions */
24#define XGPIO_DATA_OFFSET (0x0) /* Data register */ 25#define XGPIO_DATA_OFFSET (0x0) /* Data register */
generated by cgit v1.2.2 (git 2.25.0) at 2025-07-29 10:21:16 -0400