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-rw-r--r--drivers/gpio/Kconfig57
-rw-r--r--drivers/gpio/Makefile6
-rw-r--r--drivers/gpio/cs5535-gpio.c4
-rw-r--r--drivers/gpio/gpiolib.c58
-rw-r--r--drivers/gpio/it8761e_gpio.c231
-rw-r--r--drivers/gpio/max7300.c94
-rw-r--r--drivers/gpio/max7301.c293
-rw-r--r--drivers/gpio/max730x.c244
-rw-r--r--drivers/gpio/pca953x.c249
-rw-r--r--drivers/gpio/pl061.c2
-rw-r--r--drivers/gpio/sch_gpio.c295
-rw-r--r--drivers/gpio/timbgpio.c35
-rw-r--r--drivers/gpio/wm831x-gpio.c45
-rw-r--r--drivers/gpio/wm8350-gpiolib.c181
-rw-r--r--drivers/gpio/wm8994-gpio.c204
15 files changed, 1702 insertions, 296 deletions
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index 1f1d88ae68d6..fee678f74a19 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -65,8 +65,17 @@ config GPIO_SYSFS
65 65
66# put expanders in the right section, in alphabetical order 66# put expanders in the right section, in alphabetical order
67 67
68config GPIO_MAX730X
69 tristate
70
68comment "Memory mapped GPIO expanders:" 71comment "Memory mapped GPIO expanders:"
69 72
73config GPIO_IT8761E
74 tristate "IT8761E GPIO support"
75 depends on GPIOLIB
76 help
77 Say yes here to support GPIO functionality of IT8761E super I/O chip.
78
70config GPIO_PL061 79config GPIO_PL061
71 bool "PrimeCell PL061 GPIO support" 80 bool "PrimeCell PL061 GPIO support"
72 depends on ARM_AMBA 81 depends on ARM_AMBA
@@ -85,8 +94,32 @@ config GPIO_VR41XX
85 help 94 help
86 Say yes here to support the NEC VR4100 series General-purpose I/O Uint 95 Say yes here to support the NEC VR4100 series General-purpose I/O Uint
87 96
97config GPIO_SCH
98 tristate "Intel SCH GPIO"
99 depends on GPIOLIB && PCI
100 select MFD_CORE
101 select LPC_SCH
102 help
103 Say yes here to support GPIO interface on Intel Poulsbo SCH.
104 The Intel SCH contains a total of 14 GPIO pins. Ten GPIOs are
105 powered by the core power rail and are turned off during sleep
106 modes (S3 and higher). The remaining four GPIOs are powered by
107 the Intel SCH suspend power supply. These GPIOs remain
108 active during S3. The suspend powered GPIOs can be used to wake the
109 system from the Suspend-to-RAM state.
110
111 This driver can also be built as a module. If so, the module
112 will be called sch-gpio.
113
88comment "I2C GPIO expanders:" 114comment "I2C GPIO expanders:"
89 115
116config GPIO_MAX7300
117 tristate "Maxim MAX7300 GPIO expander"
118 depends on I2C
119 select GPIO_MAX730X
120 help
121 GPIO driver for Maxim MAX7301 I2C-based GPIO expander.
122
90config GPIO_MAX732X 123config GPIO_MAX732X
91 tristate "MAX7319, MAX7320-7327 I2C Port Expanders" 124 tristate "MAX7319, MAX7320-7327 I2C Port Expanders"
92 depends on I2C 125 depends on I2C
@@ -124,6 +157,13 @@ config GPIO_PCA953X
124 This driver can also be built as a module. If so, the module 157 This driver can also be built as a module. If so, the module
125 will be called pca953x. 158 will be called pca953x.
126 159
160config GPIO_PCA953X_IRQ
161 bool "Interrupt controller support for PCA953x"
162 depends on GPIO_PCA953X=y
163 help
164 Say yes here to enable the pca953x to be used as an interrupt
165 controller. It requires the driver to be built in the kernel.
166
127config GPIO_PCF857X 167config GPIO_PCF857X
128 tristate "PCF857x, PCA{85,96}7x, and MAX732[89] I2C GPIO expanders" 168 tristate "PCF857x, PCA{85,96}7x, and MAX732[89] I2C GPIO expanders"
129 depends on I2C 169 depends on I2C
@@ -162,6 +202,20 @@ config GPIO_WM831X
162 Say yes here to access the GPIO signals of WM831x power management 202 Say yes here to access the GPIO signals of WM831x power management
163 chips from Wolfson Microelectronics. 203 chips from Wolfson Microelectronics.
164 204
205config GPIO_WM8350
206 tristate "WM8350 GPIOs"
207 depends on MFD_WM8350
208 help
209 Say yes here to access the GPIO signals of WM8350 power management
210 chips from Wolfson Microelectronics.
211
212config GPIO_WM8994
213 tristate "WM8994 GPIOs"
214 depends on MFD_WM8994
215 help
216 Say yes here to access the GPIO signals of WM8994 audio hub
217 CODECs from Wolfson Microelectronics.
218
165config GPIO_ADP5520 219config GPIO_ADP5520
166 tristate "GPIO Support for ADP5520 PMIC" 220 tristate "GPIO Support for ADP5520 PMIC"
167 depends on PMIC_ADP5520 221 depends on PMIC_ADP5520
@@ -226,8 +280,9 @@ comment "SPI GPIO expanders:"
226config GPIO_MAX7301 280config GPIO_MAX7301
227 tristate "Maxim MAX7301 GPIO expander" 281 tristate "Maxim MAX7301 GPIO expander"
228 depends on SPI_MASTER 282 depends on SPI_MASTER
283 select GPIO_MAX730X
229 help 284 help
230 gpio driver for Maxim MAX7301 SPI GPIO expander. 285 GPIO driver for Maxim MAX7301 SPI-based GPIO expander.
231 286
232config GPIO_MCP23S08 287config GPIO_MCP23S08
233 tristate "Microchip MCP23S08 I/O expander" 288 tristate "Microchip MCP23S08 I/O expander"
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 48687238edb1..10f3f8d958b1 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -7,6 +7,8 @@ obj-$(CONFIG_GPIOLIB) += gpiolib.o
7obj-$(CONFIG_GPIO_ADP5520) += adp5520-gpio.o 7obj-$(CONFIG_GPIO_ADP5520) += adp5520-gpio.o
8obj-$(CONFIG_GPIO_ADP5588) += adp5588-gpio.o 8obj-$(CONFIG_GPIO_ADP5588) += adp5588-gpio.o
9obj-$(CONFIG_GPIO_LANGWELL) += langwell_gpio.o 9obj-$(CONFIG_GPIO_LANGWELL) += langwell_gpio.o
10obj-$(CONFIG_GPIO_MAX730X) += max730x.o
11obj-$(CONFIG_GPIO_MAX7300) += max7300.o
10obj-$(CONFIG_GPIO_MAX7301) += max7301.o 12obj-$(CONFIG_GPIO_MAX7301) += max7301.o
11obj-$(CONFIG_GPIO_MAX732X) += max732x.o 13obj-$(CONFIG_GPIO_MAX732X) += max732x.o
12obj-$(CONFIG_GPIO_MC33880) += mc33880.o 14obj-$(CONFIG_GPIO_MC33880) += mc33880.o
@@ -20,5 +22,9 @@ obj-$(CONFIG_GPIO_UCB1400) += ucb1400_gpio.o
20obj-$(CONFIG_GPIO_XILINX) += xilinx_gpio.o 22obj-$(CONFIG_GPIO_XILINX) += xilinx_gpio.o
21obj-$(CONFIG_GPIO_CS5535) += cs5535-gpio.o 23obj-$(CONFIG_GPIO_CS5535) += cs5535-gpio.o
22obj-$(CONFIG_GPIO_BT8XX) += bt8xxgpio.o 24obj-$(CONFIG_GPIO_BT8XX) += bt8xxgpio.o
25obj-$(CONFIG_GPIO_IT8761E) += it8761e_gpio.o
23obj-$(CONFIG_GPIO_VR41XX) += vr41xx_giu.o 26obj-$(CONFIG_GPIO_VR41XX) += vr41xx_giu.o
24obj-$(CONFIG_GPIO_WM831X) += wm831x-gpio.o 27obj-$(CONFIG_GPIO_WM831X) += wm831x-gpio.o
28obj-$(CONFIG_GPIO_WM8350) += wm8350-gpiolib.o
29obj-$(CONFIG_GPIO_WM8994) += wm8994-gpio.o
30obj-$(CONFIG_GPIO_SCH) += sch_gpio.o \ No newline at end of file
diff --git a/drivers/gpio/cs5535-gpio.c b/drivers/gpio/cs5535-gpio.c
index 0fdbe94f24a3..0c3c498f2260 100644
--- a/drivers/gpio/cs5535-gpio.c
+++ b/drivers/gpio/cs5535-gpio.c
@@ -154,7 +154,7 @@ static int chip_gpio_request(struct gpio_chip *c, unsigned offset)
154 154
155static int chip_gpio_get(struct gpio_chip *chip, unsigned offset) 155static int chip_gpio_get(struct gpio_chip *chip, unsigned offset)
156{ 156{
157 return cs5535_gpio_isset(offset, GPIO_OUTPUT_VAL); 157 return cs5535_gpio_isset(offset, GPIO_READ_BACK);
158} 158}
159 159
160static void chip_gpio_set(struct gpio_chip *chip, unsigned offset, int val) 160static void chip_gpio_set(struct gpio_chip *chip, unsigned offset, int val)
@@ -172,6 +172,7 @@ static int chip_direction_input(struct gpio_chip *c, unsigned offset)
172 172
173 spin_lock_irqsave(&chip->lock, flags); 173 spin_lock_irqsave(&chip->lock, flags);
174 __cs5535_gpio_set(chip, offset, GPIO_INPUT_ENABLE); 174 __cs5535_gpio_set(chip, offset, GPIO_INPUT_ENABLE);
175 __cs5535_gpio_clear(chip, offset, GPIO_OUTPUT_ENABLE);
175 spin_unlock_irqrestore(&chip->lock, flags); 176 spin_unlock_irqrestore(&chip->lock, flags);
176 177
177 return 0; 178 return 0;
@@ -184,6 +185,7 @@ static int chip_direction_output(struct gpio_chip *c, unsigned offset, int val)
184 185
185 spin_lock_irqsave(&chip->lock, flags); 186 spin_lock_irqsave(&chip->lock, flags);
186 187
188 __cs5535_gpio_set(chip, offset, GPIO_INPUT_ENABLE);
187 __cs5535_gpio_set(chip, offset, GPIO_OUTPUT_ENABLE); 189 __cs5535_gpio_set(chip, offset, GPIO_OUTPUT_ENABLE);
188 if (val) 190 if (val)
189 __cs5535_gpio_set(chip, offset, GPIO_OUTPUT_VAL); 191 __cs5535_gpio_set(chip, offset, GPIO_OUTPUT_VAL);
diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c
index 350842ad3632..9006fdb26fea 100644
--- a/drivers/gpio/gpiolib.c
+++ b/drivers/gpio/gpiolib.c
@@ -1237,6 +1237,64 @@ void gpio_free(unsigned gpio)
1237} 1237}
1238EXPORT_SYMBOL_GPL(gpio_free); 1238EXPORT_SYMBOL_GPL(gpio_free);
1239 1239
1240/**
1241 * gpio_request_one - request a single GPIO with initial configuration
1242 * @gpio: the GPIO number
1243 * @flags: GPIO configuration as specified by GPIOF_*
1244 * @label: a literal description string of this GPIO
1245 */
1246int gpio_request_one(unsigned gpio, unsigned long flags, const char *label)
1247{
1248 int err;
1249
1250 err = gpio_request(gpio, label);
1251 if (err)
1252 return err;
1253
1254 if (flags & GPIOF_DIR_IN)
1255 err = gpio_direction_input(gpio);
1256 else
1257 err = gpio_direction_output(gpio,
1258 (flags & GPIOF_INIT_HIGH) ? 1 : 0);
1259
1260 return err;
1261}
1262EXPORT_SYMBOL_GPL(gpio_request_one);
1263
1264/**
1265 * gpio_request_array - request multiple GPIOs in a single call
1266 * @array: array of the 'struct gpio'
1267 * @num: how many GPIOs in the array
1268 */
1269int gpio_request_array(struct gpio *array, size_t num)
1270{
1271 int i, err;
1272
1273 for (i = 0; i < num; i++, array++) {
1274 err = gpio_request_one(array->gpio, array->flags, array->label);
1275 if (err)
1276 goto err_free;
1277 }
1278 return 0;
1279
1280err_free:
1281 while (i--)
1282 gpio_free((--array)->gpio);
1283 return err;
1284}
1285EXPORT_SYMBOL_GPL(gpio_request_array);
1286
1287/**
1288 * gpio_free_array - release multiple GPIOs in a single call
1289 * @array: array of the 'struct gpio'
1290 * @num: how many GPIOs in the array
1291 */
1292void gpio_free_array(struct gpio *array, size_t num)
1293{
1294 while (num--)
1295 gpio_free((array++)->gpio);
1296}
1297EXPORT_SYMBOL_GPL(gpio_free_array);
1240 1298
1241/** 1299/**
1242 * gpiochip_is_requested - return string iff signal was requested 1300 * gpiochip_is_requested - return string iff signal was requested
diff --git a/drivers/gpio/it8761e_gpio.c b/drivers/gpio/it8761e_gpio.c
new file mode 100644
index 000000000000..753219cf993a
--- /dev/null
+++ b/drivers/gpio/it8761e_gpio.c
@@ -0,0 +1,231 @@
1/*
2 * it8761_gpio.c - GPIO interface for IT8761E Super I/O chip
3 *
4 * Author: Denis Turischev <denis@compulab.co.il>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License 2 as published
8 * by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; see the file COPYING. If not, write to
17 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
18 */
19
20#include <linux/init.h>
21#include <linux/kernel.h>
22#include <linux/module.h>
23#include <linux/io.h>
24#include <linux/errno.h>
25#include <linux/ioport.h>
26
27#include <linux/gpio.h>
28
29#define SIO_CHIP_ID 0x8761
30#define CHIP_ID_HIGH_BYTE 0x20
31#define CHIP_ID_LOW_BYTE 0x21
32
33static u8 ports[2] = { 0x2e, 0x4e };
34static u8 port;
35
36static DEFINE_SPINLOCK(sio_lock);
37
38#define GPIO_NAME "it8761-gpio"
39#define GPIO_BA_HIGH_BYTE 0x60
40#define GPIO_BA_LOW_BYTE 0x61
41#define GPIO_IOSIZE 4
42#define GPIO1X_IO 0xf0
43#define GPIO2X_IO 0xf1
44
45static u16 gpio_ba;
46
47static u8 read_reg(u8 addr, u8 port)
48{
49 outb(addr, port);
50 return inb(port + 1);
51}
52
53static void write_reg(u8 data, u8 addr, u8 port)
54{
55 outb(addr, port);
56 outb(data, port + 1);
57}
58
59static void enter_conf_mode(u8 port)
60{
61 outb(0x87, port);
62 outb(0x61, port);
63 outb(0x55, port);
64 outb((port == 0x2e) ? 0x55 : 0xaa, port);
65}
66
67static void exit_conf_mode(u8 port)
68{
69 outb(0x2, port);
70 outb(0x2, port + 1);
71}
72
73static void enter_gpio_mode(u8 port)
74{
75 write_reg(0x2, 0x7, port);
76}
77
78static int it8761e_gpio_get(struct gpio_chip *gc, unsigned gpio_num)
79{
80 u16 reg;
81 u8 bit;
82
83 bit = gpio_num % 7;
84 reg = (gpio_num >= 7) ? gpio_ba + 1 : gpio_ba;
85
86 return !!(inb(reg) & (1 << bit));
87}
88
89static int it8761e_gpio_direction_in(struct gpio_chip *gc, unsigned gpio_num)
90{
91 u8 curr_dirs;
92 u8 io_reg, bit;
93
94 bit = gpio_num % 7;
95 io_reg = (gpio_num >= 7) ? GPIO2X_IO : GPIO1X_IO;
96
97 spin_lock(&sio_lock);
98
99 enter_conf_mode(port);
100 enter_gpio_mode(port);
101
102 curr_dirs = read_reg(io_reg, port);
103
104 if (curr_dirs & (1 << bit))
105 write_reg(curr_dirs & ~(1 << bit), io_reg, port);
106
107 exit_conf_mode(port);
108
109 spin_unlock(&sio_lock);
110 return 0;
111}
112
113static void it8761e_gpio_set(struct gpio_chip *gc,
114 unsigned gpio_num, int val)
115{
116 u8 curr_vals, bit;
117 u16 reg;
118
119 bit = gpio_num % 7;
120 reg = (gpio_num >= 7) ? gpio_ba + 1 : gpio_ba;
121
122 spin_lock(&sio_lock);
123
124 curr_vals = inb(reg);
125 if (val)
126 outb(curr_vals | (1 << bit) , reg);
127 else
128 outb(curr_vals & ~(1 << bit), reg);
129
130 spin_unlock(&sio_lock);
131}
132
133static int it8761e_gpio_direction_out(struct gpio_chip *gc,
134 unsigned gpio_num, int val)
135{
136 u8 curr_dirs, io_reg, bit;
137
138 bit = gpio_num % 7;
139 io_reg = (gpio_num >= 7) ? GPIO2X_IO : GPIO1X_IO;
140
141 it8761e_gpio_set(gc, gpio_num, val);
142
143 spin_lock(&sio_lock);
144
145 enter_conf_mode(port);
146 enter_gpio_mode(port);
147
148 curr_dirs = read_reg(io_reg, port);
149
150 if (!(curr_dirs & (1 << bit)))
151 write_reg(curr_dirs | (1 << bit), io_reg, port);
152
153 exit_conf_mode(port);
154
155 spin_unlock(&sio_lock);
156 return 0;
157}
158
159static struct gpio_chip it8761e_gpio_chip = {
160 .label = GPIO_NAME,
161 .owner = THIS_MODULE,
162 .get = it8761e_gpio_get,
163 .direction_input = it8761e_gpio_direction_in,
164 .set = it8761e_gpio_set,
165 .direction_output = it8761e_gpio_direction_out,
166};
167
168static int __init it8761e_gpio_init(void)
169{
170 int i, id, err;
171
172 /* chip and port detection */
173 for (i = 0; i < ARRAY_SIZE(ports); i++) {
174 spin_lock(&sio_lock);
175 enter_conf_mode(ports[i]);
176
177 id = (read_reg(CHIP_ID_HIGH_BYTE, ports[i]) << 8) +
178 read_reg(CHIP_ID_LOW_BYTE, ports[i]);
179
180 exit_conf_mode(ports[i]);
181 spin_unlock(&sio_lock);
182
183 if (id == SIO_CHIP_ID) {
184 port = ports[i];
185 break;
186 }
187 }
188
189 if (!port)
190 return -ENODEV;
191
192 /* fetch GPIO base address */
193 enter_conf_mode(port);
194 enter_gpio_mode(port);
195 gpio_ba = (read_reg(GPIO_BA_HIGH_BYTE, port) << 8) +
196 read_reg(GPIO_BA_LOW_BYTE, port);
197 exit_conf_mode(port);
198
199 if (!request_region(gpio_ba, GPIO_IOSIZE, GPIO_NAME))
200 return -EBUSY;
201
202 it8761e_gpio_chip.base = -1;
203 it8761e_gpio_chip.ngpio = 14;
204
205 err = gpiochip_add(&it8761e_gpio_chip);
206 if (err < 0)
207 goto gpiochip_add_err;
208
209 return 0;
210
211gpiochip_add_err:
212 release_region(gpio_ba, GPIO_IOSIZE);
213 gpio_ba = 0;
214 return err;
215}
216
217static void __exit it8761e_gpio_exit(void)
218{
219 if (gpio_ba) {
220 gpiochip_remove(&it8761e_gpio_chip);
221
222 release_region(gpio_ba, GPIO_IOSIZE);
223 gpio_ba = 0;
224 }
225}
226module_init(it8761e_gpio_init);
227module_exit(it8761e_gpio_exit);
228
229MODULE_AUTHOR("Denis Turischev <denis@compulab.co.il>");
230MODULE_DESCRIPTION("GPIO interface for IT8761E Super I/O chip");
231MODULE_LICENSE("GPL");
diff --git a/drivers/gpio/max7300.c b/drivers/gpio/max7300.c
new file mode 100644
index 000000000000..9d74eef1157a
--- /dev/null
+++ b/drivers/gpio/max7300.c
@@ -0,0 +1,94 @@
1/*
2 * drivers/gpio/max7300.c
3 *
4 * Copyright (C) 2009 Wolfram Sang, Pengutronix
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * Check max730x.c for further details.
11 */
12
13#include <linux/module.h>
14#include <linux/init.h>
15#include <linux/platform_device.h>
16#include <linux/mutex.h>
17#include <linux/i2c.h>
18#include <linux/spi/max7301.h>
19
20static int max7300_i2c_write(struct device *dev, unsigned int reg,
21 unsigned int val)
22{
23 struct i2c_client *client = to_i2c_client(dev);
24
25 return i2c_smbus_write_byte_data(client, reg, val);
26}
27
28static int max7300_i2c_read(struct device *dev, unsigned int reg)
29{
30 struct i2c_client *client = to_i2c_client(dev);
31
32 return i2c_smbus_read_byte_data(client, reg);
33}
34
35static int __devinit max7300_probe(struct i2c_client *client,
36 const struct i2c_device_id *id)
37{
38 struct max7301 *ts;
39 int ret;
40
41 if (!i2c_check_functionality(client->adapter,
42 I2C_FUNC_SMBUS_BYTE_DATA))
43 return -EIO;
44
45 ts = kzalloc(sizeof(struct max7301), GFP_KERNEL);
46 if (!ts)
47 return -ENOMEM;
48
49 ts->read = max7300_i2c_read;
50 ts->write = max7300_i2c_write;
51 ts->dev = &client->dev;
52
53 ret = __max730x_probe(ts);
54 if (ret)
55 kfree(ts);
56 return ret;
57}
58
59static int __devexit max7300_remove(struct i2c_client *client)
60{
61 return __max730x_remove(&client->dev);
62}
63
64static const struct i2c_device_id max7300_id[] = {
65 { "max7300", 0 },
66 { }
67};
68MODULE_DEVICE_TABLE(i2c, max7300_id);
69
70static struct i2c_driver max7300_driver = {
71 .driver = {
72 .name = "max7300",
73 .owner = THIS_MODULE,
74 },
75 .probe = max7300_probe,
76 .remove = __devexit_p(max7300_remove),
77 .id_table = max7300_id,
78};
79
80static int __init max7300_init(void)
81{
82 return i2c_add_driver(&max7300_driver);
83}
84subsys_initcall(max7300_init);
85
86static void __exit max7300_exit(void)
87{
88 i2c_del_driver(&max7300_driver);
89}
90module_exit(max7300_exit);
91
92MODULE_AUTHOR("Wolfram Sang");
93MODULE_LICENSE("GPL v2");
94MODULE_DESCRIPTION("MAX7300 GPIO-Expander");
diff --git a/drivers/gpio/max7301.c b/drivers/gpio/max7301.c
index 480956f1ca50..965d9b1ea13e 100644
--- a/drivers/gpio/max7301.c
+++ b/drivers/gpio/max7301.c
@@ -1,98 +1,41 @@
1/** 1/*
2 * drivers/gpio/max7301.c 2 * drivers/gpio/max7301.c
3 * 3 *
4 * Copyright (C) 2006 Juergen Beisert, Pengutronix 4 * Copyright (C) 2006 Juergen Beisert, Pengutronix
5 * Copyright (C) 2008 Guennadi Liakhovetski, Pengutronix 5 * Copyright (C) 2008 Guennadi Liakhovetski, Pengutronix
6 * Copyright (C) 2009 Wolfram Sang, Pengutronix
6 * 7 *
7 * This program is free software; you can redistribute it and/or modify 8 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as 9 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
10 * 11 *
11 * The Maxim's MAX7301 device is an SPI driven GPIO expander. There are 12 * Check max730x.c for further details.
12 * 28 GPIOs. 8 of them can trigger an interrupt. See datasheet for more
13 * details
14 * Note:
15 * - DIN must be stable at the rising edge of clock.
16 * - when writing:
17 * - always clock in 16 clocks at once
18 * - at DIN: D15 first, D0 last
19 * - D0..D7 = databyte, D8..D14 = commandbyte
20 * - D15 = low -> write command
21 * - when reading
22 * - always clock in 16 clocks at once
23 * - at DIN: D15 first, D0 last
24 * - D0..D7 = dummy, D8..D14 = register address
25 * - D15 = high -> read command
26 * - raise CS and assert it again
27 * - always clock in 16 clocks at once
28 * - at DOUT: D15 first, D0 last
29 * - D0..D7 contains the data from the first cycle
30 *
31 * The driver exports a standard gpiochip interface
32 */ 13 */
33 14
15#include <linux/module.h>
34#include <linux/init.h> 16#include <linux/init.h>
35#include <linux/platform_device.h> 17#include <linux/platform_device.h>
36#include <linux/mutex.h> 18#include <linux/mutex.h>
37#include <linux/spi/spi.h> 19#include <linux/spi/spi.h>
38#include <linux/spi/max7301.h> 20#include <linux/spi/max7301.h>
39#include <linux/gpio.h>
40
41#define DRIVER_NAME "max7301"
42
43/*
44 * Pin configurations, see MAX7301 datasheet page 6
45 */
46#define PIN_CONFIG_MASK 0x03
47#define PIN_CONFIG_IN_PULLUP 0x03
48#define PIN_CONFIG_IN_WO_PULLUP 0x02
49#define PIN_CONFIG_OUT 0x01
50
51#define PIN_NUMBER 28
52
53
54/*
55 * Some registers must be read back to modify.
56 * To save time we cache them here in memory
57 */
58struct max7301 {
59 struct mutex lock;
60 u8 port_config[8]; /* field 0 is unused */
61 u32 out_level; /* cached output levels */
62 struct gpio_chip chip;
63 struct spi_device *spi;
64};
65 21
66/** 22/* A write to the MAX7301 means one message with one transfer */
67 * max7301_write - Write a new register content 23static int max7301_spi_write(struct device *dev, unsigned int reg,
68 * @spi: The SPI device 24 unsigned int val)
69 * @reg: Register offset
70 * @val: Value to write
71 *
72 * A write to the MAX7301 means one message with one transfer
73 *
74 * Returns 0 if successful or a negative value on error
75 */
76static int max7301_write(struct spi_device *spi, unsigned int reg, unsigned int val)
77{ 25{
26 struct spi_device *spi = to_spi_device(dev);
78 u16 word = ((reg & 0x7F) << 8) | (val & 0xFF); 27 u16 word = ((reg & 0x7F) << 8) | (val & 0xFF);
28
79 return spi_write(spi, (const u8 *)&word, sizeof(word)); 29 return spi_write(spi, (const u8 *)&word, sizeof(word));
80} 30}
81 31
82/** 32/* A read from the MAX7301 means two transfers; here, one message each */
83 * max7301_read - Read back register content 33
84 * @spi: The SPI device 34static int max7301_spi_read(struct device *dev, unsigned int reg)
85 * @reg: Register offset
86 *
87 * A read from the MAX7301 means two transfers; here, one message each
88 *
89 * Returns positive 8 bit value from device if successful or a
90 * negative value on error
91 */
92static int max7301_read(struct spi_device *spi, unsigned int reg)
93{ 35{
94 int ret; 36 int ret;
95 u16 word; 37 u16 word;
38 struct spi_device *spi = to_spi_device(dev);
96 39
97 word = 0x8000 | (reg << 8); 40 word = 0x8000 | (reg << 8);
98 ret = spi_write(spi, (const u8 *)&word, sizeof(word)); 41 ret = spi_write(spi, (const u8 *)&word, sizeof(word));
@@ -108,125 +51,13 @@ static int max7301_read(struct spi_device *spi, unsigned int reg)
108 return word & 0xff; 51 return word & 0xff;
109} 52}
110 53
111static int max7301_direction_input(struct gpio_chip *chip, unsigned offset)
112{
113 struct max7301 *ts = container_of(chip, struct max7301, chip);
114 u8 *config;
115 int ret;
116
117 /* First 4 pins are unused in the controller */
118 offset += 4;
119
120 config = &ts->port_config[offset >> 2];
121
122 mutex_lock(&ts->lock);
123
124 /* Standard GPIO API doesn't support pull-ups, has to be extended.
125 * Hard-coding no pollup for now. */
126 *config = (*config & ~(3 << (offset & 3))) | (1 << (offset & 3));
127
128 ret = max7301_write(ts->spi, 0x08 + (offset >> 2), *config);
129
130 mutex_unlock(&ts->lock);
131
132 return ret;
133}
134
135static int __max7301_set(struct max7301 *ts, unsigned offset, int value)
136{
137 if (value) {
138 ts->out_level |= 1 << offset;
139 return max7301_write(ts->spi, 0x20 + offset, 0x01);
140 } else {
141 ts->out_level &= ~(1 << offset);
142 return max7301_write(ts->spi, 0x20 + offset, 0x00);
143 }
144}
145
146static int max7301_direction_output(struct gpio_chip *chip, unsigned offset,
147 int value)
148{
149 struct max7301 *ts = container_of(chip, struct max7301, chip);
150 u8 *config;
151 int ret;
152
153 /* First 4 pins are unused in the controller */
154 offset += 4;
155
156 config = &ts->port_config[offset >> 2];
157
158 mutex_lock(&ts->lock);
159
160 *config = (*config & ~(3 << (offset & 3))) | (1 << (offset & 3));
161
162 ret = __max7301_set(ts, offset, value);
163
164 if (!ret)
165 ret = max7301_write(ts->spi, 0x08 + (offset >> 2), *config);
166
167 mutex_unlock(&ts->lock);
168
169 return ret;
170}
171
172static int max7301_get(struct gpio_chip *chip, unsigned offset)
173{
174 struct max7301 *ts = container_of(chip, struct max7301, chip);
175 int config, level = -EINVAL;
176
177 /* First 4 pins are unused in the controller */
178 offset += 4;
179
180 mutex_lock(&ts->lock);
181
182 config = (ts->port_config[offset >> 2] >> ((offset & 3) * 2)) & 3;
183
184 switch (config) {
185 case 1:
186 /* Output: return cached level */
187 level = !!(ts->out_level & (1 << offset));
188 break;
189 case 2:
190 case 3:
191 /* Input: read out */
192 level = max7301_read(ts->spi, 0x20 + offset) & 0x01;
193 }
194 mutex_unlock(&ts->lock);
195
196 return level;
197}
198
199static void max7301_set(struct gpio_chip *chip, unsigned offset, int value)
200{
201 struct max7301 *ts = container_of(chip, struct max7301, chip);
202
203 /* First 4 pins are unused in the controller */
204 offset += 4;
205
206 mutex_lock(&ts->lock);
207
208 __max7301_set(ts, offset, value);
209
210 mutex_unlock(&ts->lock);
211}
212
213static int __devinit max7301_probe(struct spi_device *spi) 54static int __devinit max7301_probe(struct spi_device *spi)
214{ 55{
215 struct max7301 *ts; 56 struct max7301 *ts;
216 struct max7301_platform_data *pdata; 57 int ret;
217 int i, ret;
218
219 pdata = spi->dev.platform_data;
220 if (!pdata || !pdata->base) {
221 dev_dbg(&spi->dev, "incorrect or missing platform data\n");
222 return -EINVAL;
223 }
224 58
225 /* 59 /* bits_per_word cannot be configured in platform data */
226 * bits_per_word cannot be configured in platform data
227 */
228 spi->bits_per_word = 16; 60 spi->bits_per_word = 16;
229
230 ret = spi_setup(spi); 61 ret = spi_setup(spi);
231 if (ret < 0) 62 if (ret < 0)
232 return ret; 63 return ret;
@@ -235,90 +66,35 @@ static int __devinit max7301_probe(struct spi_device *spi)
235 if (!ts) 66 if (!ts)
236 return -ENOMEM; 67 return -ENOMEM;
237 68
238 mutex_init(&ts->lock); 69 ts->read = max7301_spi_read;
239 70 ts->write = max7301_spi_write;
240 dev_set_drvdata(&spi->dev, ts); 71 ts->dev = &spi->dev;
241 72
242 /* Power up the chip and disable IRQ output */ 73 ret = __max730x_probe(ts);
243 max7301_write(spi, 0x04, 0x01);
244
245 ts->spi = spi;
246
247 ts->chip.label = DRIVER_NAME,
248
249 ts->chip.direction_input = max7301_direction_input;
250 ts->chip.get = max7301_get;
251 ts->chip.direction_output = max7301_direction_output;
252 ts->chip.set = max7301_set;
253
254 ts->chip.base = pdata->base;
255 ts->chip.ngpio = PIN_NUMBER;
256 ts->chip.can_sleep = 1;
257 ts->chip.dev = &spi->dev;
258 ts->chip.owner = THIS_MODULE;
259
260 /*
261 * tristate all pins in hardware and cache the
262 * register values for later use.
263 */
264 for (i = 1; i < 8; i++) {
265 int j;
266 /* 0xAA means input with internal pullup disabled */
267 max7301_write(spi, 0x08 + i, 0xAA);
268 ts->port_config[i] = 0xAA;
269 for (j = 0; j < 4; j++) {
270 int offset = (i - 1) * 4 + j;
271 ret = max7301_direction_input(&ts->chip, offset);
272 if (ret)
273 goto exit_destroy;
274 }
275 }
276
277 ret = gpiochip_add(&ts->chip);
278 if (ret) 74 if (ret)
279 goto exit_destroy; 75 kfree(ts);
280
281 return ret;
282
283exit_destroy:
284 dev_set_drvdata(&spi->dev, NULL);
285 mutex_destroy(&ts->lock);
286 kfree(ts);
287 return ret; 76 return ret;
288} 77}
289 78
290static int __devexit max7301_remove(struct spi_device *spi) 79static int __devexit max7301_remove(struct spi_device *spi)
291{ 80{
292 struct max7301 *ts; 81 return __max730x_remove(&spi->dev);
293 int ret;
294
295 ts = dev_get_drvdata(&spi->dev);
296 if (ts == NULL)
297 return -ENODEV;
298
299 dev_set_drvdata(&spi->dev, NULL);
300
301 /* Power down the chip and disable IRQ output */
302 max7301_write(spi, 0x04, 0x00);
303
304 ret = gpiochip_remove(&ts->chip);
305 if (!ret) {
306 mutex_destroy(&ts->lock);
307 kfree(ts);
308 } else
309 dev_err(&spi->dev, "Failed to remove the GPIO controller: %d\n",
310 ret);
311
312 return ret;
313} 82}
314 83
84static const struct spi_device_id max7301_id[] = {
85 { "max7301", 0 },
86 { }
87};
88MODULE_DEVICE_TABLE(spi, max7301_id);
89
315static struct spi_driver max7301_driver = { 90static struct spi_driver max7301_driver = {
316 .driver = { 91 .driver = {
317 .name = DRIVER_NAME, 92 .name = "max7301",
318 .owner = THIS_MODULE, 93 .owner = THIS_MODULE,
319 }, 94 },
320 .probe = max7301_probe, 95 .probe = max7301_probe,
321 .remove = __devexit_p(max7301_remove), 96 .remove = __devexit_p(max7301_remove),
97 .id_table = max7301_id,
322}; 98};
323 99
324static int __init max7301_init(void) 100static int __init max7301_init(void)
@@ -336,7 +112,6 @@ static void __exit max7301_exit(void)
336} 112}
337module_exit(max7301_exit); 113module_exit(max7301_exit);
338 114
339MODULE_AUTHOR("Juergen Beisert"); 115MODULE_AUTHOR("Juergen Beisert, Wolfram Sang");
340MODULE_LICENSE("GPL v2"); 116MODULE_LICENSE("GPL v2");
341MODULE_DESCRIPTION("MAX7301 SPI based GPIO-Expander"); 117MODULE_DESCRIPTION("MAX7301 GPIO-Expander");
342MODULE_ALIAS("spi:" DRIVER_NAME);
diff --git a/drivers/gpio/max730x.c b/drivers/gpio/max730x.c
new file mode 100644
index 000000000000..c9bced55f82b
--- /dev/null
+++ b/drivers/gpio/max730x.c
@@ -0,0 +1,244 @@
1/**
2 * drivers/gpio/max7301.c
3 *
4 * Copyright (C) 2006 Juergen Beisert, Pengutronix
5 * Copyright (C) 2008 Guennadi Liakhovetski, Pengutronix
6 * Copyright (C) 2009 Wolfram Sang, Pengutronix
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * The Maxim MAX7300/1 device is an I2C/SPI driven GPIO expander. There are
13 * 28 GPIOs. 8 of them can trigger an interrupt. See datasheet for more
14 * details
15 * Note:
16 * - DIN must be stable at the rising edge of clock.
17 * - when writing:
18 * - always clock in 16 clocks at once
19 * - at DIN: D15 first, D0 last
20 * - D0..D7 = databyte, D8..D14 = commandbyte
21 * - D15 = low -> write command
22 * - when reading
23 * - always clock in 16 clocks at once
24 * - at DIN: D15 first, D0 last
25 * - D0..D7 = dummy, D8..D14 = register address
26 * - D15 = high -> read command
27 * - raise CS and assert it again
28 * - always clock in 16 clocks at once
29 * - at DOUT: D15 first, D0 last
30 * - D0..D7 contains the data from the first cycle
31 *
32 * The driver exports a standard gpiochip interface
33 */
34
35#include <linux/module.h>
36#include <linux/init.h>
37#include <linux/platform_device.h>
38#include <linux/mutex.h>
39#include <linux/spi/max7301.h>
40#include <linux/gpio.h>
41
42/*
43 * Pin configurations, see MAX7301 datasheet page 6
44 */
45#define PIN_CONFIG_MASK 0x03
46#define PIN_CONFIG_IN_PULLUP 0x03
47#define PIN_CONFIG_IN_WO_PULLUP 0x02
48#define PIN_CONFIG_OUT 0x01
49
50#define PIN_NUMBER 28
51
52static int max7301_direction_input(struct gpio_chip *chip, unsigned offset)
53{
54 struct max7301 *ts = container_of(chip, struct max7301, chip);
55 u8 *config;
56 u8 offset_bits;
57 int ret;
58
59 /* First 4 pins are unused in the controller */
60 offset += 4;
61 offset_bits = (offset & 3) << 1;
62
63 config = &ts->port_config[offset >> 2];
64
65 mutex_lock(&ts->lock);
66
67 /* Standard GPIO API doesn't support pull-ups, has to be extended.
68 * Hard-coding no pollup for now. */
69 *config = (*config & ~(PIN_CONFIG_MASK << offset_bits))
70 | (PIN_CONFIG_IN_WO_PULLUP << offset_bits);
71
72 ret = ts->write(ts->dev, 0x08 + (offset >> 2), *config);
73
74 mutex_unlock(&ts->lock);
75
76 return ret;
77}
78
79static int __max7301_set(struct max7301 *ts, unsigned offset, int value)
80{
81 if (value) {
82 ts->out_level |= 1 << offset;
83 return ts->write(ts->dev, 0x20 + offset, 0x01);
84 } else {
85 ts->out_level &= ~(1 << offset);
86 return ts->write(ts->dev, 0x20 + offset, 0x00);
87 }
88}
89
90static int max7301_direction_output(struct gpio_chip *chip, unsigned offset,
91 int value)
92{
93 struct max7301 *ts = container_of(chip, struct max7301, chip);
94 u8 *config;
95 u8 offset_bits;
96 int ret;
97
98 /* First 4 pins are unused in the controller */
99 offset += 4;
100 offset_bits = (offset & 3) << 1;
101
102 config = &ts->port_config[offset >> 2];
103
104 mutex_lock(&ts->lock);
105
106 *config = (*config & ~(PIN_CONFIG_MASK << offset_bits))
107 | (PIN_CONFIG_OUT << offset_bits);
108
109 ret = __max7301_set(ts, offset, value);
110
111 if (!ret)
112 ret = ts->write(ts->dev, 0x08 + (offset >> 2), *config);
113
114 mutex_unlock(&ts->lock);
115
116 return ret;
117}
118
119static int max7301_get(struct gpio_chip *chip, unsigned offset)
120{
121 struct max7301 *ts = container_of(chip, struct max7301, chip);
122 int config, level = -EINVAL;
123
124 /* First 4 pins are unused in the controller */
125 offset += 4;
126
127 mutex_lock(&ts->lock);
128
129 config = (ts->port_config[offset >> 2] >> ((offset & 3) << 1))
130 & PIN_CONFIG_MASK;
131
132 switch (config) {
133 case PIN_CONFIG_OUT:
134 /* Output: return cached level */
135 level = !!(ts->out_level & (1 << offset));
136 break;
137 case PIN_CONFIG_IN_WO_PULLUP:
138 case PIN_CONFIG_IN_PULLUP:
139 /* Input: read out */
140 level = ts->read(ts->dev, 0x20 + offset) & 0x01;
141 }
142 mutex_unlock(&ts->lock);
143
144 return level;
145}
146
147static void max7301_set(struct gpio_chip *chip, unsigned offset, int value)
148{
149 struct max7301 *ts = container_of(chip, struct max7301, chip);
150
151 /* First 4 pins are unused in the controller */
152 offset += 4;
153
154 mutex_lock(&ts->lock);
155
156 __max7301_set(ts, offset, value);
157
158 mutex_unlock(&ts->lock);
159}
160
161int __devinit __max730x_probe(struct max7301 *ts)
162{
163 struct device *dev = ts->dev;
164 struct max7301_platform_data *pdata;
165 int i, ret;
166
167 pdata = dev->platform_data;
168 if (!pdata || !pdata->base) {
169 dev_err(dev, "incorrect or missing platform data\n");
170 return -EINVAL;
171 }
172
173 mutex_init(&ts->lock);
174 dev_set_drvdata(dev, ts);
175
176 /* Power up the chip and disable IRQ output */
177 ts->write(dev, 0x04, 0x01);
178
179 ts->chip.label = dev->driver->name;
180
181 ts->chip.direction_input = max7301_direction_input;
182 ts->chip.get = max7301_get;
183 ts->chip.direction_output = max7301_direction_output;
184 ts->chip.set = max7301_set;
185
186 ts->chip.base = pdata->base;
187 ts->chip.ngpio = PIN_NUMBER;
188 ts->chip.can_sleep = 1;
189 ts->chip.dev = dev;
190 ts->chip.owner = THIS_MODULE;
191
192 /*
193 * tristate all pins in hardware and cache the
194 * register values for later use.
195 */
196 for (i = 1; i < 8; i++) {
197 int j;
198 /* 0xAA means input with internal pullup disabled */
199 ts->write(dev, 0x08 + i, 0xAA);
200 ts->port_config[i] = 0xAA;
201 for (j = 0; j < 4; j++) {
202 int offset = (i - 1) * 4 + j;
203 ret = max7301_direction_input(&ts->chip, offset);
204 if (ret)
205 goto exit_destroy;
206 }
207 }
208
209 ret = gpiochip_add(&ts->chip);
210 if (ret)
211 goto exit_destroy;
212
213 return ret;
214
215exit_destroy:
216 dev_set_drvdata(dev, NULL);
217 mutex_destroy(&ts->lock);
218 return ret;
219}
220EXPORT_SYMBOL_GPL(__max730x_probe);
221
222int __devexit __max730x_remove(struct device *dev)
223{
224 struct max7301 *ts = dev_get_drvdata(dev);
225 int ret;
226
227 if (ts == NULL)
228 return -ENODEV;
229
230 dev_set_drvdata(dev, NULL);
231
232 /* Power down the chip and disable IRQ output */
233 ts->write(dev, 0x04, 0x00);
234
235 ret = gpiochip_remove(&ts->chip);
236 if (!ret) {
237 mutex_destroy(&ts->lock);
238 kfree(ts);
239 } else
240 dev_err(dev, "Failed to remove GPIO controller: %d\n", ret);
241
242 return ret;
243}
244EXPORT_SYMBOL_GPL(__max730x_remove);
diff --git a/drivers/gpio/pca953x.c b/drivers/gpio/pca953x.c
index 6a2fb3fbb3d9..ab5daab14bc2 100644
--- a/drivers/gpio/pca953x.c
+++ b/drivers/gpio/pca953x.c
@@ -14,6 +14,8 @@
14#include <linux/module.h> 14#include <linux/module.h>
15#include <linux/init.h> 15#include <linux/init.h>
16#include <linux/gpio.h> 16#include <linux/gpio.h>
17#include <linux/interrupt.h>
18#include <linux/irq.h>
17#include <linux/i2c.h> 19#include <linux/i2c.h>
18#include <linux/i2c/pca953x.h> 20#include <linux/i2c/pca953x.h>
19#ifdef CONFIG_OF_GPIO 21#ifdef CONFIG_OF_GPIO
@@ -26,23 +28,28 @@
26#define PCA953X_INVERT 2 28#define PCA953X_INVERT 2
27#define PCA953X_DIRECTION 3 29#define PCA953X_DIRECTION 3
28 30
31#define PCA953X_GPIOS 0x00FF
32#define PCA953X_INT 0x0100
33
29static const struct i2c_device_id pca953x_id[] = { 34static const struct i2c_device_id pca953x_id[] = {
30 { "pca9534", 8, }, 35 { "pca9534", 8 | PCA953X_INT, },
31 { "pca9535", 16, }, 36 { "pca9535", 16 | PCA953X_INT, },
32 { "pca9536", 4, }, 37 { "pca9536", 4, },
33 { "pca9537", 4, }, 38 { "pca9537", 4 | PCA953X_INT, },
34 { "pca9538", 8, }, 39 { "pca9538", 8 | PCA953X_INT, },
35 { "pca9539", 16, }, 40 { "pca9539", 16 | PCA953X_INT, },
36 { "pca9554", 8, }, 41 { "pca9554", 8 | PCA953X_INT, },
37 { "pca9555", 16, }, 42 { "pca9555", 16 | PCA953X_INT, },
38 { "pca9556", 8, }, 43 { "pca9556", 8, },
39 { "pca9557", 8, }, 44 { "pca9557", 8, },
40 45
41 { "max7310", 8, }, 46 { "max7310", 8, },
42 { "max7315", 8, }, 47 { "max7312", 16 | PCA953X_INT, },
43 { "pca6107", 8, }, 48 { "max7313", 16 | PCA953X_INT, },
44 { "tca6408", 8, }, 49 { "max7315", 8 | PCA953X_INT, },
45 { "tca6416", 16, }, 50 { "pca6107", 8 | PCA953X_INT, },
51 { "tca6408", 8 | PCA953X_INT, },
52 { "tca6416", 16 | PCA953X_INT, },
46 /* NYET: { "tca6424", 24, }, */ 53 /* NYET: { "tca6424", 24, }, */
47 { } 54 { }
48}; 55};
@@ -53,6 +60,15 @@ struct pca953x_chip {
53 uint16_t reg_output; 60 uint16_t reg_output;
54 uint16_t reg_direction; 61 uint16_t reg_direction;
55 62
63#ifdef CONFIG_GPIO_PCA953X_IRQ
64 struct mutex irq_lock;
65 uint16_t irq_mask;
66 uint16_t irq_stat;
67 uint16_t irq_trig_raise;
68 uint16_t irq_trig_fall;
69 int irq_base;
70#endif
71
56 struct i2c_client *client; 72 struct i2c_client *client;
57 struct pca953x_platform_data *dyn_pdata; 73 struct pca953x_platform_data *dyn_pdata;
58 struct gpio_chip gpio_chip; 74 struct gpio_chip gpio_chip;
@@ -202,6 +218,210 @@ static void pca953x_setup_gpio(struct pca953x_chip *chip, int gpios)
202 gc->names = chip->names; 218 gc->names = chip->names;
203} 219}
204 220
221#ifdef CONFIG_GPIO_PCA953X_IRQ
222static int pca953x_gpio_to_irq(struct gpio_chip *gc, unsigned off)
223{
224 struct pca953x_chip *chip;
225
226 chip = container_of(gc, struct pca953x_chip, gpio_chip);
227 return chip->irq_base + off;
228}
229
230static void pca953x_irq_mask(unsigned int irq)
231{
232 struct pca953x_chip *chip = get_irq_chip_data(irq);
233
234 chip->irq_mask &= ~(1 << (irq - chip->irq_base));
235}
236
237static void pca953x_irq_unmask(unsigned int irq)
238{
239 struct pca953x_chip *chip = get_irq_chip_data(irq);
240
241 chip->irq_mask |= 1 << (irq - chip->irq_base);
242}
243
244static void pca953x_irq_bus_lock(unsigned int irq)
245{
246 struct pca953x_chip *chip = get_irq_chip_data(irq);
247
248 mutex_lock(&chip->irq_lock);
249}
250
251static void pca953x_irq_bus_sync_unlock(unsigned int irq)
252{
253 struct pca953x_chip *chip = get_irq_chip_data(irq);
254
255 mutex_unlock(&chip->irq_lock);
256}
257
258static int pca953x_irq_set_type(unsigned int irq, unsigned int type)
259{
260 struct pca953x_chip *chip = get_irq_chip_data(irq);
261 uint16_t level = irq - chip->irq_base;
262 uint16_t mask = 1 << level;
263
264 if (!(type & IRQ_TYPE_EDGE_BOTH)) {
265 dev_err(&chip->client->dev, "irq %d: unsupported type %d\n",
266 irq, type);
267 return -EINVAL;
268 }
269
270 if (type & IRQ_TYPE_EDGE_FALLING)
271 chip->irq_trig_fall |= mask;
272 else
273 chip->irq_trig_fall &= ~mask;
274
275 if (type & IRQ_TYPE_EDGE_RISING)
276 chip->irq_trig_raise |= mask;
277 else
278 chip->irq_trig_raise &= ~mask;
279
280 return pca953x_gpio_direction_input(&chip->gpio_chip, level);
281}
282
283static struct irq_chip pca953x_irq_chip = {
284 .name = "pca953x",
285 .mask = pca953x_irq_mask,
286 .unmask = pca953x_irq_unmask,
287 .bus_lock = pca953x_irq_bus_lock,
288 .bus_sync_unlock = pca953x_irq_bus_sync_unlock,
289 .set_type = pca953x_irq_set_type,
290};
291
292static uint16_t pca953x_irq_pending(struct pca953x_chip *chip)
293{
294 uint16_t cur_stat;
295 uint16_t old_stat;
296 uint16_t pending;
297 uint16_t trigger;
298 int ret;
299
300 ret = pca953x_read_reg(chip, PCA953X_INPUT, &cur_stat);
301 if (ret)
302 return 0;
303
304 /* Remove output pins from the equation */
305 cur_stat &= chip->reg_direction;
306
307 old_stat = chip->irq_stat;
308 trigger = (cur_stat ^ old_stat) & chip->irq_mask;
309
310 if (!trigger)
311 return 0;
312
313 chip->irq_stat = cur_stat;
314
315 pending = (old_stat & chip->irq_trig_fall) |
316 (cur_stat & chip->irq_trig_raise);
317 pending &= trigger;
318
319 return pending;
320}
321
322static irqreturn_t pca953x_irq_handler(int irq, void *devid)
323{
324 struct pca953x_chip *chip = devid;
325 uint16_t pending;
326 uint16_t level;
327
328 pending = pca953x_irq_pending(chip);
329
330 if (!pending)
331 return IRQ_HANDLED;
332
333 do {
334 level = __ffs(pending);
335 handle_nested_irq(level + chip->irq_base);
336
337 pending &= ~(1 << level);
338 } while (pending);
339
340 return IRQ_HANDLED;
341}
342
343static int pca953x_irq_setup(struct pca953x_chip *chip,
344 const struct i2c_device_id *id)
345{
346 struct i2c_client *client = chip->client;
347 struct pca953x_platform_data *pdata = client->dev.platform_data;
348 int ret;
349
350 if (pdata->irq_base && (id->driver_data & PCA953X_INT)) {
351 int lvl;
352
353 ret = pca953x_read_reg(chip, PCA953X_INPUT,
354 &chip->irq_stat);
355 if (ret)
356 goto out_failed;
357
358 /*
359 * There is no way to know which GPIO line generated the
360 * interrupt. We have to rely on the previous read for
361 * this purpose.
362 */
363 chip->irq_stat &= chip->reg_direction;
364 chip->irq_base = pdata->irq_base;
365 mutex_init(&chip->irq_lock);
366
367 for (lvl = 0; lvl < chip->gpio_chip.ngpio; lvl++) {
368 int irq = lvl + chip->irq_base;
369
370 set_irq_chip_data(irq, chip);
371 set_irq_chip_and_handler(irq, &pca953x_irq_chip,
372 handle_edge_irq);
373 set_irq_nested_thread(irq, 1);
374#ifdef CONFIG_ARM
375 set_irq_flags(irq, IRQF_VALID);
376#else
377 set_irq_noprobe(irq);
378#endif
379 }
380
381 ret = request_threaded_irq(client->irq,
382 NULL,
383 pca953x_irq_handler,
384 IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
385 dev_name(&client->dev), chip);
386 if (ret) {
387 dev_err(&client->dev, "failed to request irq %d\n",
388 client->irq);
389 goto out_failed;
390 }
391
392 chip->gpio_chip.to_irq = pca953x_gpio_to_irq;
393 }
394
395 return 0;
396
397out_failed:
398 chip->irq_base = 0;
399 return ret;
400}
401
402static void pca953x_irq_teardown(struct pca953x_chip *chip)
403{
404 if (chip->irq_base)
405 free_irq(chip->client->irq, chip);
406}
407#else /* CONFIG_GPIO_PCA953X_IRQ */
408static int pca953x_irq_setup(struct pca953x_chip *chip,
409 const struct i2c_device_id *id)
410{
411 struct i2c_client *client = chip->client;
412 struct pca953x_platform_data *pdata = client->dev.platform_data;
413
414 if (pdata->irq_base && (id->driver_data & PCA953X_INT))
415 dev_warn(&client->dev, "interrupt support not compiled in\n");
416
417 return 0;
418}
419
420static void pca953x_irq_teardown(struct pca953x_chip *chip)
421{
422}
423#endif
424
205/* 425/*
206 * Handlers for alternative sources of platform_data 426 * Handlers for alternative sources of platform_data
207 */ 427 */
@@ -286,7 +506,7 @@ static int __devinit pca953x_probe(struct i2c_client *client,
286 /* initialize cached registers from their original values. 506 /* initialize cached registers from their original values.
287 * we can't share this chip with another i2c master. 507 * we can't share this chip with another i2c master.
288 */ 508 */
289 pca953x_setup_gpio(chip, id->driver_data); 509 pca953x_setup_gpio(chip, id->driver_data & PCA953X_GPIOS);
290 510
291 ret = pca953x_read_reg(chip, PCA953X_OUTPUT, &chip->reg_output); 511 ret = pca953x_read_reg(chip, PCA953X_OUTPUT, &chip->reg_output);
292 if (ret) 512 if (ret)
@@ -301,6 +521,9 @@ static int __devinit pca953x_probe(struct i2c_client *client,
301 if (ret) 521 if (ret)
302 goto out_failed; 522 goto out_failed;
303 523
524 ret = pca953x_irq_setup(chip, id);
525 if (ret)
526 goto out_failed;
304 527
305 ret = gpiochip_add(&chip->gpio_chip); 528 ret = gpiochip_add(&chip->gpio_chip);
306 if (ret) 529 if (ret)
@@ -317,6 +540,7 @@ static int __devinit pca953x_probe(struct i2c_client *client,
317 return 0; 540 return 0;
318 541
319out_failed: 542out_failed:
543 pca953x_irq_teardown(chip);
320 kfree(chip->dyn_pdata); 544 kfree(chip->dyn_pdata);
321 kfree(chip); 545 kfree(chip);
322 return ret; 546 return ret;
@@ -345,6 +569,7 @@ static int pca953x_remove(struct i2c_client *client)
345 return ret; 569 return ret;
346 } 570 }
347 571
572 pca953x_irq_teardown(chip);
348 kfree(chip->dyn_pdata); 573 kfree(chip->dyn_pdata);
349 kfree(chip); 574 kfree(chip);
350 return 0; 575 return 0;
diff --git a/drivers/gpio/pl061.c b/drivers/gpio/pl061.c
index 4ee4c8367a3f..3ad1eeb49609 100644
--- a/drivers/gpio/pl061.c
+++ b/drivers/gpio/pl061.c
@@ -219,7 +219,7 @@ static void pl061_irq_handler(unsigned irq, struct irq_desc *desc)
219 if (pending == 0) 219 if (pending == 0)
220 continue; 220 continue;
221 221
222 for_each_bit(offset, &pending, PL061_GPIO_NR) 222 for_each_set_bit(offset, &pending, PL061_GPIO_NR)
223 generic_handle_irq(pl061_to_irq(&chip->gc, offset)); 223 generic_handle_irq(pl061_to_irq(&chip->gc, offset));
224 } 224 }
225 desc->chip->unmask(irq); 225 desc->chip->unmask(irq);
diff --git a/drivers/gpio/sch_gpio.c b/drivers/gpio/sch_gpio.c
new file mode 100644
index 000000000000..583521352c16
--- /dev/null
+++ b/drivers/gpio/sch_gpio.c
@@ -0,0 +1,295 @@
1/*
2 * sch_gpio.c - GPIO interface for Intel Poulsbo SCH
3 *
4 * Copyright (c) 2010 CompuLab Ltd
5 * Author: Denis Turischev <denis@compulab.co.il>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License 2 as published
9 * by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; see the file COPYING. If not, write to
18 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
19 */
20
21#include <linux/init.h>
22#include <linux/kernel.h>
23#include <linux/module.h>
24#include <linux/io.h>
25#include <linux/errno.h>
26#include <linux/acpi.h>
27#include <linux/platform_device.h>
28
29#include <linux/gpio.h>
30
31static DEFINE_SPINLOCK(gpio_lock);
32
33#define CGEN (0x00)
34#define CGIO (0x04)
35#define CGLV (0x08)
36
37#define RGEN (0x20)
38#define RGIO (0x24)
39#define RGLV (0x28)
40
41static unsigned short gpio_ba;
42
43static int sch_gpio_core_direction_in(struct gpio_chip *gc, unsigned gpio_num)
44{
45 u8 curr_dirs;
46 unsigned short offset, bit;
47
48 spin_lock(&gpio_lock);
49
50 offset = CGIO + gpio_num / 8;
51 bit = gpio_num % 8;
52
53 curr_dirs = inb(gpio_ba + offset);
54
55 if (!(curr_dirs & (1 << bit)))
56 outb(curr_dirs | (1 << bit), gpio_ba + offset);
57
58 spin_unlock(&gpio_lock);
59 return 0;
60}
61
62static int sch_gpio_core_get(struct gpio_chip *gc, unsigned gpio_num)
63{
64 int res;
65 unsigned short offset, bit;
66
67 offset = CGLV + gpio_num / 8;
68 bit = gpio_num % 8;
69
70 res = !!(inb(gpio_ba + offset) & (1 << bit));
71 return res;
72}
73
74static void sch_gpio_core_set(struct gpio_chip *gc, unsigned gpio_num, int val)
75{
76 u8 curr_vals;
77 unsigned short offset, bit;
78
79 spin_lock(&gpio_lock);
80
81 offset = CGLV + gpio_num / 8;
82 bit = gpio_num % 8;
83
84 curr_vals = inb(gpio_ba + offset);
85
86 if (val)
87 outb(curr_vals | (1 << bit), gpio_ba + offset);
88 else
89 outb((curr_vals & ~(1 << bit)), gpio_ba + offset);
90 spin_unlock(&gpio_lock);
91}
92
93static int sch_gpio_core_direction_out(struct gpio_chip *gc,
94 unsigned gpio_num, int val)
95{
96 u8 curr_dirs;
97 unsigned short offset, bit;
98
99 sch_gpio_core_set(gc, gpio_num, val);
100
101 spin_lock(&gpio_lock);
102
103 offset = CGIO + gpio_num / 8;
104 bit = gpio_num % 8;
105
106 curr_dirs = inb(gpio_ba + offset);
107 if (curr_dirs & (1 << bit))
108 outb(curr_dirs & ~(1 << bit), gpio_ba + offset);
109
110 spin_unlock(&gpio_lock);
111 return 0;
112}
113
114static struct gpio_chip sch_gpio_core = {
115 .label = "sch_gpio_core",
116 .owner = THIS_MODULE,
117 .direction_input = sch_gpio_core_direction_in,
118 .get = sch_gpio_core_get,
119 .direction_output = sch_gpio_core_direction_out,
120 .set = sch_gpio_core_set,
121};
122
123static int sch_gpio_resume_direction_in(struct gpio_chip *gc,
124 unsigned gpio_num)
125{
126 u8 curr_dirs;
127
128 spin_lock(&gpio_lock);
129
130 curr_dirs = inb(gpio_ba + RGIO);
131
132 if (!(curr_dirs & (1 << gpio_num)))
133 outb(curr_dirs | (1 << gpio_num) , gpio_ba + RGIO);
134
135 spin_unlock(&gpio_lock);
136 return 0;
137}
138
139static int sch_gpio_resume_get(struct gpio_chip *gc, unsigned gpio_num)
140{
141 return !!(inb(gpio_ba + RGLV) & (1 << gpio_num));
142}
143
144static void sch_gpio_resume_set(struct gpio_chip *gc,
145 unsigned gpio_num, int val)
146{
147 u8 curr_vals;
148
149 spin_lock(&gpio_lock);
150
151 curr_vals = inb(gpio_ba + RGLV);
152
153 if (val)
154 outb(curr_vals | (1 << gpio_num), gpio_ba + RGLV);
155 else
156 outb((curr_vals & ~(1 << gpio_num)), gpio_ba + RGLV);
157
158 spin_unlock(&gpio_lock);
159}
160
161static int sch_gpio_resume_direction_out(struct gpio_chip *gc,
162 unsigned gpio_num, int val)
163{
164 u8 curr_dirs;
165
166 sch_gpio_resume_set(gc, gpio_num, val);
167
168 spin_lock(&gpio_lock);
169
170 curr_dirs = inb(gpio_ba + RGIO);
171 if (curr_dirs & (1 << gpio_num))
172 outb(curr_dirs & ~(1 << gpio_num), gpio_ba + RGIO);
173
174 spin_unlock(&gpio_lock);
175 return 0;
176}
177
178static struct gpio_chip sch_gpio_resume = {
179 .label = "sch_gpio_resume",
180 .owner = THIS_MODULE,
181 .direction_input = sch_gpio_resume_direction_in,
182 .get = sch_gpio_resume_get,
183 .direction_output = sch_gpio_resume_direction_out,
184 .set = sch_gpio_resume_set,
185};
186
187static int __devinit sch_gpio_probe(struct platform_device *pdev)
188{
189 struct resource *res;
190 int err;
191
192 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
193 if (!res)
194 return -EBUSY;
195
196 if (!request_region(res->start, resource_size(res), pdev->name))
197 return -EBUSY;
198
199 gpio_ba = res->start;
200
201 sch_gpio_core.base = 0;
202 sch_gpio_core.ngpio = 10;
203 sch_gpio_core.dev = &pdev->dev;
204
205 sch_gpio_resume.base = 10;
206 sch_gpio_resume.ngpio = 4;
207 sch_gpio_resume.dev = &pdev->dev;
208
209 err = gpiochip_add(&sch_gpio_core);
210 if (err < 0)
211 goto err_sch_gpio_core;
212
213 err = gpiochip_add(&sch_gpio_resume);
214 if (err < 0)
215 goto err_sch_gpio_resume;
216
217 /*
218 * GPIO[6:0] enabled by default
219 * GPIO7 is configured by the CMC as SLPIOVR
220 * Enable GPIO[9:8] core powered gpios explicitly
221 */
222 outb(0x3, gpio_ba + CGEN + 1);
223 /*
224 * SUS_GPIO[2:0] enabled by default
225 * Enable SUS_GPIO3 resume powered gpio explicitly
226 */
227 outb(0x8, gpio_ba + RGEN);
228
229 return 0;
230
231err_sch_gpio_resume:
232 err = gpiochip_remove(&sch_gpio_core);
233 if (err)
234 dev_err(&pdev->dev, "%s failed, %d\n",
235 "gpiochip_remove()", err);
236
237err_sch_gpio_core:
238 release_region(res->start, resource_size(res));
239 gpio_ba = 0;
240
241 return err;
242}
243
244static int __devexit sch_gpio_remove(struct platform_device *pdev)
245{
246 struct resource *res;
247 if (gpio_ba) {
248 int err;
249
250 err = gpiochip_remove(&sch_gpio_core);
251 if (err)
252 dev_err(&pdev->dev, "%s failed, %d\n",
253 "gpiochip_remove()", err);
254 err = gpiochip_remove(&sch_gpio_resume);
255 if (err)
256 dev_err(&pdev->dev, "%s failed, %d\n",
257 "gpiochip_remove()", err);
258
259 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
260
261 release_region(res->start, resource_size(res));
262 gpio_ba = 0;
263
264 return err;
265 }
266
267 return 0;
268}
269
270static struct platform_driver sch_gpio_driver = {
271 .driver = {
272 .name = "sch_gpio",
273 .owner = THIS_MODULE,
274 },
275 .probe = sch_gpio_probe,
276 .remove = __devexit_p(sch_gpio_remove),
277};
278
279static int __init sch_gpio_init(void)
280{
281 return platform_driver_register(&sch_gpio_driver);
282}
283
284static void __exit sch_gpio_exit(void)
285{
286 platform_driver_unregister(&sch_gpio_driver);
287}
288
289module_init(sch_gpio_init);
290module_exit(sch_gpio_exit);
291
292MODULE_AUTHOR("Denis Turischev <denis@compulab.co.il>");
293MODULE_DESCRIPTION("GPIO interface for Intel Poulsbo SCH");
294MODULE_LICENSE("GPL");
295MODULE_ALIAS("platform:sch_gpio");
diff --git a/drivers/gpio/timbgpio.c b/drivers/gpio/timbgpio.c
index a4d344ba8e5c..d4295fa5369e 100644
--- a/drivers/gpio/timbgpio.c
+++ b/drivers/gpio/timbgpio.c
@@ -23,6 +23,7 @@
23#include <linux/module.h> 23#include <linux/module.h>
24#include <linux/gpio.h> 24#include <linux/gpio.h>
25#include <linux/platform_device.h> 25#include <linux/platform_device.h>
26#include <linux/irq.h>
26#include <linux/io.h> 27#include <linux/io.h>
27#include <linux/timb_gpio.h> 28#include <linux/timb_gpio.h>
28#include <linux/interrupt.h> 29#include <linux/interrupt.h>
@@ -37,6 +38,8 @@
37#define TGPIO_ICR 0x14 38#define TGPIO_ICR 0x14
38#define TGPIO_FLR 0x18 39#define TGPIO_FLR 0x18
39#define TGPIO_LVR 0x1c 40#define TGPIO_LVR 0x1c
41#define TGPIO_VER 0x20
42#define TGPIO_BFLR 0x24
40 43
41struct timbgpio { 44struct timbgpio {
42 void __iomem *membase; 45 void __iomem *membase;
@@ -125,17 +128,23 @@ static int timbgpio_irq_type(unsigned irq, unsigned trigger)
125 struct timbgpio *tgpio = get_irq_chip_data(irq); 128 struct timbgpio *tgpio = get_irq_chip_data(irq);
126 int offset = irq - tgpio->irq_base; 129 int offset = irq - tgpio->irq_base;
127 unsigned long flags; 130 unsigned long flags;
128 u32 lvr, flr; 131 u32 lvr, flr, bflr = 0;
132 u32 ver;
129 133
130 if (offset < 0 || offset > tgpio->gpio.ngpio) 134 if (offset < 0 || offset > tgpio->gpio.ngpio)
131 return -EINVAL; 135 return -EINVAL;
132 136
137 ver = ioread32(tgpio->membase + TGPIO_VER);
138
133 spin_lock_irqsave(&tgpio->lock, flags); 139 spin_lock_irqsave(&tgpio->lock, flags);
134 140
135 lvr = ioread32(tgpio->membase + TGPIO_LVR); 141 lvr = ioread32(tgpio->membase + TGPIO_LVR);
136 flr = ioread32(tgpio->membase + TGPIO_FLR); 142 flr = ioread32(tgpio->membase + TGPIO_FLR);
143 if (ver > 2)
144 bflr = ioread32(tgpio->membase + TGPIO_BFLR);
137 145
138 if (trigger & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) { 146 if (trigger & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) {
147 bflr &= ~(1 << offset);
139 flr &= ~(1 << offset); 148 flr &= ~(1 << offset);
140 if (trigger & IRQ_TYPE_LEVEL_HIGH) 149 if (trigger & IRQ_TYPE_LEVEL_HIGH)
141 lvr |= 1 << offset; 150 lvr |= 1 << offset;
@@ -143,21 +152,27 @@ static int timbgpio_irq_type(unsigned irq, unsigned trigger)
143 lvr &= ~(1 << offset); 152 lvr &= ~(1 << offset);
144 } 153 }
145 154
146 if ((trigger & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH) 155 if ((trigger & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH) {
147 return -EINVAL; 156 if (ver < 3)
148 else { 157 return -EINVAL;
158 else {
159 flr |= 1 << offset;
160 bflr |= 1 << offset;
161 }
162 } else {
163 bflr &= ~(1 << offset);
149 flr |= 1 << offset; 164 flr |= 1 << offset;
150 /* opposite compared to the datasheet, but it mirrors the
151 * reality
152 */
153 if (trigger & IRQ_TYPE_EDGE_FALLING) 165 if (trigger & IRQ_TYPE_EDGE_FALLING)
154 lvr |= 1 << offset;
155 else
156 lvr &= ~(1 << offset); 166 lvr &= ~(1 << offset);
167 else
168 lvr |= 1 << offset;
157 } 169 }
158 170
159 iowrite32(lvr, tgpio->membase + TGPIO_LVR); 171 iowrite32(lvr, tgpio->membase + TGPIO_LVR);
160 iowrite32(flr, tgpio->membase + TGPIO_FLR); 172 iowrite32(flr, tgpio->membase + TGPIO_FLR);
173 if (ver > 2)
174 iowrite32(bflr, tgpio->membase + TGPIO_BFLR);
175
161 iowrite32(1 << offset, tgpio->membase + TGPIO_ICR); 176 iowrite32(1 << offset, tgpio->membase + TGPIO_ICR);
162 spin_unlock_irqrestore(&tgpio->lock, flags); 177 spin_unlock_irqrestore(&tgpio->lock, flags);
163 178
@@ -174,7 +189,7 @@ static void timbgpio_irq(unsigned int irq, struct irq_desc *desc)
174 ipr = ioread32(tgpio->membase + TGPIO_IPR); 189 ipr = ioread32(tgpio->membase + TGPIO_IPR);
175 iowrite32(ipr, tgpio->membase + TGPIO_ICR); 190 iowrite32(ipr, tgpio->membase + TGPIO_ICR);
176 191
177 for_each_bit(offset, &ipr, tgpio->gpio.ngpio) 192 for_each_set_bit(offset, &ipr, tgpio->gpio.ngpio)
178 generic_handle_irq(timbgpio_to_irq(&tgpio->gpio, offset)); 193 generic_handle_irq(timbgpio_to_irq(&tgpio->gpio, offset));
179} 194}
180 195
diff --git a/drivers/gpio/wm831x-gpio.c b/drivers/gpio/wm831x-gpio.c
index b4468b616890..d09021f4a7d3 100644
--- a/drivers/gpio/wm831x-gpio.c
+++ b/drivers/gpio/wm831x-gpio.c
@@ -38,10 +38,14 @@ static int wm831x_gpio_direction_in(struct gpio_chip *chip, unsigned offset)
38{ 38{
39 struct wm831x_gpio *wm831x_gpio = to_wm831x_gpio(chip); 39 struct wm831x_gpio *wm831x_gpio = to_wm831x_gpio(chip);
40 struct wm831x *wm831x = wm831x_gpio->wm831x; 40 struct wm831x *wm831x = wm831x_gpio->wm831x;
41 int val = WM831X_GPN_DIR;
42
43 if (wm831x->has_gpio_ena)
44 val |= WM831X_GPN_TRI;
41 45
42 return wm831x_set_bits(wm831x, WM831X_GPIO1_CONTROL + offset, 46 return wm831x_set_bits(wm831x, WM831X_GPIO1_CONTROL + offset,
43 WM831X_GPN_DIR | WM831X_GPN_TRI, 47 WM831X_GPN_DIR | WM831X_GPN_TRI |
44 WM831X_GPN_DIR); 48 WM831X_GPN_FN_MASK, val);
45} 49}
46 50
47static int wm831x_gpio_get(struct gpio_chip *chip, unsigned offset) 51static int wm831x_gpio_get(struct gpio_chip *chip, unsigned offset)
@@ -60,23 +64,36 @@ static int wm831x_gpio_get(struct gpio_chip *chip, unsigned offset)
60 return 0; 64 return 0;
61} 65}
62 66
63static int wm831x_gpio_direction_out(struct gpio_chip *chip, 67static void wm831x_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
64 unsigned offset, int value)
65{ 68{
66 struct wm831x_gpio *wm831x_gpio = to_wm831x_gpio(chip); 69 struct wm831x_gpio *wm831x_gpio = to_wm831x_gpio(chip);
67 struct wm831x *wm831x = wm831x_gpio->wm831x; 70 struct wm831x *wm831x = wm831x_gpio->wm831x;
68 71
69 return wm831x_set_bits(wm831x, WM831X_GPIO1_CONTROL + offset, 72 wm831x_set_bits(wm831x, WM831X_GPIO_LEVEL, 1 << offset,
70 WM831X_GPN_DIR | WM831X_GPN_TRI, 0); 73 value << offset);
71} 74}
72 75
73static void wm831x_gpio_set(struct gpio_chip *chip, unsigned offset, int value) 76static int wm831x_gpio_direction_out(struct gpio_chip *chip,
77 unsigned offset, int value)
74{ 78{
75 struct wm831x_gpio *wm831x_gpio = to_wm831x_gpio(chip); 79 struct wm831x_gpio *wm831x_gpio = to_wm831x_gpio(chip);
76 struct wm831x *wm831x = wm831x_gpio->wm831x; 80 struct wm831x *wm831x = wm831x_gpio->wm831x;
81 int val = 0;
82 int ret;
77 83
78 wm831x_set_bits(wm831x, WM831X_GPIO_LEVEL, 1 << offset, 84 if (wm831x->has_gpio_ena)
79 value << offset); 85 val |= WM831X_GPN_TRI;
86
87 ret = wm831x_set_bits(wm831x, WM831X_GPIO1_CONTROL + offset,
88 WM831X_GPN_DIR | WM831X_GPN_TRI |
89 WM831X_GPN_FN_MASK, val);
90 if (ret < 0)
91 return ret;
92
93 /* Can only set GPIO state once it's in output mode */
94 wm831x_gpio_set(chip, offset, value);
95
96 return 0;
80} 97}
81 98
82static int wm831x_gpio_to_irq(struct gpio_chip *chip, unsigned offset) 99static int wm831x_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
@@ -95,7 +112,7 @@ static void wm831x_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
95{ 112{
96 struct wm831x_gpio *wm831x_gpio = to_wm831x_gpio(chip); 113 struct wm831x_gpio *wm831x_gpio = to_wm831x_gpio(chip);
97 struct wm831x *wm831x = wm831x_gpio->wm831x; 114 struct wm831x *wm831x = wm831x_gpio->wm831x;
98 int i; 115 int i, tristated;
99 116
100 for (i = 0; i < chip->ngpio; i++) { 117 for (i = 0; i < chip->ngpio; i++) {
101 int gpio = i + chip->base; 118 int gpio = i + chip->base;
@@ -162,15 +179,19 @@ static void wm831x_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
162 break; 179 break;
163 } 180 }
164 181
182 tristated = reg & WM831X_GPN_TRI;
183 if (wm831x->has_gpio_ena)
184 tristated = !tristated;
185
165 seq_printf(s, " %s %s %s %s%s\n" 186 seq_printf(s, " %s %s %s %s%s\n"
166 " %s%s (0x%4x)\n", 187 " %s%s (0x%4x)\n",
167 reg & WM831X_GPN_DIR ? "in" : "out", 188 reg & WM831X_GPN_DIR ? "in" : "out",
168 wm831x_gpio_get(chip, i) ? "high" : "low", 189 wm831x_gpio_get(chip, i) ? "high" : "low",
169 pull, 190 pull,
170 powerdomain, 191 powerdomain,
171 reg & WM831X_GPN_POL ? " inverted" : "", 192 reg & WM831X_GPN_POL ? "" : " inverted",
172 reg & WM831X_GPN_OD ? "open-drain" : "CMOS", 193 reg & WM831X_GPN_OD ? "open-drain" : "CMOS",
173 reg & WM831X_GPN_TRI ? " tristated" : "", 194 tristated ? " tristated" : "",
174 reg); 195 reg);
175 } 196 }
176} 197}
diff --git a/drivers/gpio/wm8350-gpiolib.c b/drivers/gpio/wm8350-gpiolib.c
new file mode 100644
index 000000000000..511840d1c7ba
--- /dev/null
+++ b/drivers/gpio/wm8350-gpiolib.c
@@ -0,0 +1,181 @@
1/*
2 * wm835x-gpiolib.c -- gpiolib support for Wolfson WM835x PMICs
3 *
4 * Copyright 2009 Wolfson Microelectronics PLC.
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 */
14
15#include <linux/kernel.h>
16#include <linux/module.h>
17#include <linux/gpio.h>
18#include <linux/mfd/core.h>
19#include <linux/platform_device.h>
20#include <linux/seq_file.h>
21
22#include <linux/mfd/wm8350/core.h>
23#include <linux/mfd/wm8350/gpio.h>
24
25struct wm8350_gpio_data {
26 struct wm8350 *wm8350;
27 struct gpio_chip gpio_chip;
28};
29
30static inline struct wm8350_gpio_data *to_wm8350_gpio(struct gpio_chip *chip)
31{
32 return container_of(chip, struct wm8350_gpio_data, gpio_chip);
33}
34
35static int wm8350_gpio_direction_in(struct gpio_chip *chip, unsigned offset)
36{
37 struct wm8350_gpio_data *wm8350_gpio = to_wm8350_gpio(chip);
38 struct wm8350 *wm8350 = wm8350_gpio->wm8350;
39
40 return wm8350_set_bits(wm8350, WM8350_GPIO_CONFIGURATION_I_O,
41 1 << offset);
42}
43
44static int wm8350_gpio_get(struct gpio_chip *chip, unsigned offset)
45{
46 struct wm8350_gpio_data *wm8350_gpio = to_wm8350_gpio(chip);
47 struct wm8350 *wm8350 = wm8350_gpio->wm8350;
48 int ret;
49
50 ret = wm8350_reg_read(wm8350, WM8350_GPIO_LEVEL);
51 if (ret < 0)
52 return ret;
53
54 if (ret & (1 << offset))
55 return 1;
56 else
57 return 0;
58}
59
60static void wm8350_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
61{
62 struct wm8350_gpio_data *wm8350_gpio = to_wm8350_gpio(chip);
63 struct wm8350 *wm8350 = wm8350_gpio->wm8350;
64
65 if (value)
66 wm8350_set_bits(wm8350, WM8350_GPIO_LEVEL, 1 << offset);
67 else
68 wm8350_clear_bits(wm8350, WM8350_GPIO_LEVEL, 1 << offset);
69}
70
71static int wm8350_gpio_direction_out(struct gpio_chip *chip,
72 unsigned offset, int value)
73{
74 struct wm8350_gpio_data *wm8350_gpio = to_wm8350_gpio(chip);
75 struct wm8350 *wm8350 = wm8350_gpio->wm8350;
76 int ret;
77
78 ret = wm8350_clear_bits(wm8350, WM8350_GPIO_CONFIGURATION_I_O,
79 1 << offset);
80 if (ret < 0)
81 return ret;
82
83 /* Don't have an atomic direction/value setup */
84 wm8350_gpio_set(chip, offset, value);
85
86 return 0;
87}
88
89static int wm8350_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
90{
91 struct wm8350_gpio_data *wm8350_gpio = to_wm8350_gpio(chip);
92 struct wm8350 *wm8350 = wm8350_gpio->wm8350;
93
94 if (!wm8350->irq_base)
95 return -EINVAL;
96
97 return wm8350->irq_base + WM8350_IRQ_GPIO(offset);
98}
99
100static struct gpio_chip template_chip = {
101 .label = "wm8350",
102 .owner = THIS_MODULE,
103 .direction_input = wm8350_gpio_direction_in,
104 .get = wm8350_gpio_get,
105 .direction_output = wm8350_gpio_direction_out,
106 .set = wm8350_gpio_set,
107 .to_irq = wm8350_gpio_to_irq,
108 .can_sleep = 1,
109};
110
111static int __devinit wm8350_gpio_probe(struct platform_device *pdev)
112{
113 struct wm8350 *wm8350 = dev_get_drvdata(pdev->dev.parent);
114 struct wm8350_platform_data *pdata = wm8350->dev->platform_data;
115 struct wm8350_gpio_data *wm8350_gpio;
116 int ret;
117
118 wm8350_gpio = kzalloc(sizeof(*wm8350_gpio), GFP_KERNEL);
119 if (wm8350_gpio == NULL)
120 return -ENOMEM;
121
122 wm8350_gpio->wm8350 = wm8350;
123 wm8350_gpio->gpio_chip = template_chip;
124 wm8350_gpio->gpio_chip.ngpio = 13;
125 wm8350_gpio->gpio_chip.dev = &pdev->dev;
126 if (pdata && pdata->gpio_base)
127 wm8350_gpio->gpio_chip.base = pdata->gpio_base;
128 else
129 wm8350_gpio->gpio_chip.base = -1;
130
131 ret = gpiochip_add(&wm8350_gpio->gpio_chip);
132 if (ret < 0) {
133 dev_err(&pdev->dev, "Could not register gpiochip, %d\n",
134 ret);
135 goto err;
136 }
137
138 platform_set_drvdata(pdev, wm8350_gpio);
139
140 return ret;
141
142err:
143 kfree(wm8350_gpio);
144 return ret;
145}
146
147static int __devexit wm8350_gpio_remove(struct platform_device *pdev)
148{
149 struct wm8350_gpio_data *wm8350_gpio = platform_get_drvdata(pdev);
150 int ret;
151
152 ret = gpiochip_remove(&wm8350_gpio->gpio_chip);
153 if (ret == 0)
154 kfree(wm8350_gpio);
155
156 return ret;
157}
158
159static struct platform_driver wm8350_gpio_driver = {
160 .driver.name = "wm8350-gpio",
161 .driver.owner = THIS_MODULE,
162 .probe = wm8350_gpio_probe,
163 .remove = __devexit_p(wm8350_gpio_remove),
164};
165
166static int __init wm8350_gpio_init(void)
167{
168 return platform_driver_register(&wm8350_gpio_driver);
169}
170subsys_initcall(wm8350_gpio_init);
171
172static void __exit wm8350_gpio_exit(void)
173{
174 platform_driver_unregister(&wm8350_gpio_driver);
175}
176module_exit(wm8350_gpio_exit);
177
178MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
179MODULE_DESCRIPTION("GPIO interface for WM8350 PMICs");
180MODULE_LICENSE("GPL");
181MODULE_ALIAS("platform:wm8350-gpio");
diff --git a/drivers/gpio/wm8994-gpio.c b/drivers/gpio/wm8994-gpio.c
new file mode 100644
index 000000000000..de28b4a470ea
--- /dev/null
+++ b/drivers/gpio/wm8994-gpio.c
@@ -0,0 +1,204 @@
1/*
2 * wm8994-gpio.c -- gpiolib support for Wolfson WM8994
3 *
4 * Copyright 2009 Wolfson Microelectronics PLC.
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 */
14
15#include <linux/kernel.h>
16#include <linux/module.h>
17#include <linux/gpio.h>
18#include <linux/mfd/core.h>
19#include <linux/platform_device.h>
20#include <linux/seq_file.h>
21
22#include <linux/mfd/wm8994/core.h>
23#include <linux/mfd/wm8994/pdata.h>
24#include <linux/mfd/wm8994/gpio.h>
25#include <linux/mfd/wm8994/registers.h>
26
27struct wm8994_gpio {
28 struct wm8994 *wm8994;
29 struct gpio_chip gpio_chip;
30};
31
32static inline struct wm8994_gpio *to_wm8994_gpio(struct gpio_chip *chip)
33{
34 return container_of(chip, struct wm8994_gpio, gpio_chip);
35}
36
37static int wm8994_gpio_direction_in(struct gpio_chip *chip, unsigned offset)
38{
39 struct wm8994_gpio *wm8994_gpio = to_wm8994_gpio(chip);
40 struct wm8994 *wm8994 = wm8994_gpio->wm8994;
41
42 return wm8994_set_bits(wm8994, WM8994_GPIO_1 + offset,
43 WM8994_GPN_DIR, WM8994_GPN_DIR);
44}
45
46static int wm8994_gpio_get(struct gpio_chip *chip, unsigned offset)
47{
48 struct wm8994_gpio *wm8994_gpio = to_wm8994_gpio(chip);
49 struct wm8994 *wm8994 = wm8994_gpio->wm8994;
50 int ret;
51
52 ret = wm8994_reg_read(wm8994, WM8994_GPIO_1 + offset);
53 if (ret < 0)
54 return ret;
55
56 if (ret & WM8994_GPN_LVL)
57 return 1;
58 else
59 return 0;
60}
61
62static int wm8994_gpio_direction_out(struct gpio_chip *chip,
63 unsigned offset, int value)
64{
65 struct wm8994_gpio *wm8994_gpio = to_wm8994_gpio(chip);
66 struct wm8994 *wm8994 = wm8994_gpio->wm8994;
67
68 return wm8994_set_bits(wm8994, WM8994_GPIO_1 + offset,
69 WM8994_GPN_DIR, 0);
70}
71
72static void wm8994_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
73{
74 struct wm8994_gpio *wm8994_gpio = to_wm8994_gpio(chip);
75 struct wm8994 *wm8994 = wm8994_gpio->wm8994;
76
77 if (value)
78 value = WM8994_GPN_LVL;
79
80 wm8994_set_bits(wm8994, WM8994_GPIO_1 + offset, WM8994_GPN_LVL, value);
81}
82
83#ifdef CONFIG_DEBUG_FS
84static void wm8994_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
85{
86 struct wm8994_gpio *wm8994_gpio = to_wm8994_gpio(chip);
87 struct wm8994 *wm8994 = wm8994_gpio->wm8994;
88 int i;
89
90 for (i = 0; i < chip->ngpio; i++) {
91 int gpio = i + chip->base;
92 int reg;
93 const char *label;
94
95 /* We report the GPIO even if it's not requested since
96 * we're also reporting things like alternate
97 * functions which apply even when the GPIO is not in
98 * use as a GPIO.
99 */
100 label = gpiochip_is_requested(chip, i);
101 if (!label)
102 label = "Unrequested";
103
104 seq_printf(s, " gpio-%-3d (%-20.20s) ", gpio, label);
105
106 reg = wm8994_reg_read(wm8994, WM8994_GPIO_1 + i);
107 if (reg < 0) {
108 dev_err(wm8994->dev,
109 "GPIO control %d read failed: %d\n",
110 gpio, reg);
111 seq_printf(s, "\n");
112 continue;
113 }
114
115 /* No decode yet; note that GPIO2 is special */
116 seq_printf(s, "(%x)\n", reg);
117 }
118}
119#else
120#define wm8994_gpio_dbg_show NULL
121#endif
122
123static struct gpio_chip template_chip = {
124 .label = "wm8994",
125 .owner = THIS_MODULE,
126 .direction_input = wm8994_gpio_direction_in,
127 .get = wm8994_gpio_get,
128 .direction_output = wm8994_gpio_direction_out,
129 .set = wm8994_gpio_set,
130 .dbg_show = wm8994_gpio_dbg_show,
131 .can_sleep = 1,
132};
133
134static int __devinit wm8994_gpio_probe(struct platform_device *pdev)
135{
136 struct wm8994 *wm8994 = dev_get_drvdata(pdev->dev.parent);
137 struct wm8994_pdata *pdata = wm8994->dev->platform_data;
138 struct wm8994_gpio *wm8994_gpio;
139 int ret;
140
141 wm8994_gpio = kzalloc(sizeof(*wm8994_gpio), GFP_KERNEL);
142 if (wm8994_gpio == NULL)
143 return -ENOMEM;
144
145 wm8994_gpio->wm8994 = wm8994;
146 wm8994_gpio->gpio_chip = template_chip;
147 wm8994_gpio->gpio_chip.ngpio = WM8994_GPIO_MAX;
148 wm8994_gpio->gpio_chip.dev = &pdev->dev;
149 if (pdata && pdata->gpio_base)
150 wm8994_gpio->gpio_chip.base = pdata->gpio_base;
151 else
152 wm8994_gpio->gpio_chip.base = -1;
153
154 ret = gpiochip_add(&wm8994_gpio->gpio_chip);
155 if (ret < 0) {
156 dev_err(&pdev->dev, "Could not register gpiochip, %d\n",
157 ret);
158 goto err;
159 }
160
161 platform_set_drvdata(pdev, wm8994_gpio);
162
163 return ret;
164
165err:
166 kfree(wm8994_gpio);
167 return ret;
168}
169
170static int __devexit wm8994_gpio_remove(struct platform_device *pdev)
171{
172 struct wm8994_gpio *wm8994_gpio = platform_get_drvdata(pdev);
173 int ret;
174
175 ret = gpiochip_remove(&wm8994_gpio->gpio_chip);
176 if (ret == 0)
177 kfree(wm8994_gpio);
178
179 return ret;
180}
181
182static struct platform_driver wm8994_gpio_driver = {
183 .driver.name = "wm8994-gpio",
184 .driver.owner = THIS_MODULE,
185 .probe = wm8994_gpio_probe,
186 .remove = __devexit_p(wm8994_gpio_remove),
187};
188
189static int __init wm8994_gpio_init(void)
190{
191 return platform_driver_register(&wm8994_gpio_driver);
192}
193subsys_initcall(wm8994_gpio_init);
194
195static void __exit wm8994_gpio_exit(void)
196{
197 platform_driver_unregister(&wm8994_gpio_driver);
198}
199module_exit(wm8994_gpio_exit);
200
201MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
202MODULE_DESCRIPTION("GPIO interface for WM8994");
203MODULE_LICENSE("GPL");
204MODULE_ALIAS("platform:wm8994-gpio");
generated by cgit v1.2.2 (git 2.25.0) at 2025-03-13 07:30:56 -0400