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path: root/drivers/gpio/gpio-pl061.c
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Diffstat (limited to 'drivers/gpio/gpio-pl061.c')
-rw-r--r--drivers/gpio/gpio-pl061.c136
1 files changed, 42 insertions, 94 deletions
diff --git a/drivers/gpio/gpio-pl061.c b/drivers/gpio/gpio-pl061.c
index 42a5d5672694..2f399ec7bd66 100644
--- a/drivers/gpio/gpio-pl061.c
+++ b/drivers/gpio/gpio-pl061.c
@@ -12,7 +12,6 @@
12#include <linux/spinlock.h> 12#include <linux/spinlock.h>
13#include <linux/errno.h> 13#include <linux/errno.h>
14#include <linux/module.h> 14#include <linux/module.h>
15#include <linux/list.h>
16#include <linux/io.h> 15#include <linux/io.h>
17#include <linux/ioport.h> 16#include <linux/ioport.h>
18#include <linux/irq.h> 17#include <linux/irq.h>
@@ -24,6 +23,7 @@
24#include <linux/amba/pl061.h> 23#include <linux/amba/pl061.h>
25#include <linux/slab.h> 24#include <linux/slab.h>
26#include <linux/pm.h> 25#include <linux/pm.h>
26#include <asm/mach/irq.h>
27 27
28#define GPIODIR 0x400 28#define GPIODIR 0x400
29#define GPIOIS 0x404 29#define GPIOIS 0x404
@@ -48,23 +48,16 @@ struct pl061_context_save_regs {
48#endif 48#endif
49 49
50struct pl061_gpio { 50struct pl061_gpio {
51 /* We use a list of pl061_gpio structs for each trigger IRQ in the main
52 * interrupts controller of the system. We need this to support systems
53 * in which more that one PL061s are connected to the same IRQ. The ISR
54 * interates through this list to find the source of the interrupt.
55 */
56 struct list_head list;
57
58 /* Each of the two spinlocks protects a different set of hardware 51 /* Each of the two spinlocks protects a different set of hardware
59 * regiters and data structurs. This decouples the code of the IRQ from 52 * regiters and data structurs. This decouples the code of the IRQ from
60 * the GPIO code. This also makes the case of a GPIO routine call from 53 * the GPIO code. This also makes the case of a GPIO routine call from
61 * the IRQ code simpler. 54 * the IRQ code simpler.
62 */ 55 */
63 spinlock_t lock; /* GPIO registers */ 56 spinlock_t lock; /* GPIO registers */
64 spinlock_t irq_lock; /* IRQ registers */
65 57
66 void __iomem *base; 58 void __iomem *base;
67 unsigned irq_base; 59 int irq_base;
60 struct irq_chip_generic *irq_gc;
68 struct gpio_chip gc; 61 struct gpio_chip gc;
69 62
70#ifdef CONFIG_PM 63#ifdef CONFIG_PM
@@ -134,46 +127,16 @@ static int pl061_to_irq(struct gpio_chip *gc, unsigned offset)
134{ 127{
135 struct pl061_gpio *chip = container_of(gc, struct pl061_gpio, gc); 128 struct pl061_gpio *chip = container_of(gc, struct pl061_gpio, gc);
136 129
137 if (chip->irq_base == NO_IRQ) 130 if (chip->irq_base <= 0)
138 return -EINVAL; 131 return -EINVAL;
139 132
140 return chip->irq_base + offset; 133 return chip->irq_base + offset;
141} 134}
142 135
143/*
144 * PL061 GPIO IRQ
145 */
146static void pl061_irq_disable(struct irq_data *d)
147{
148 struct pl061_gpio *chip = irq_data_get_irq_chip_data(d);
149 int offset = d->irq - chip->irq_base;
150 unsigned long flags;
151 u8 gpioie;
152
153 spin_lock_irqsave(&chip->irq_lock, flags);
154 gpioie = readb(chip->base + GPIOIE);
155 gpioie &= ~(1 << offset);
156 writeb(gpioie, chip->base + GPIOIE);
157 spin_unlock_irqrestore(&chip->irq_lock, flags);
158}
159
160static void pl061_irq_enable(struct irq_data *d)
161{
162 struct pl061_gpio *chip = irq_data_get_irq_chip_data(d);
163 int offset = d->irq - chip->irq_base;
164 unsigned long flags;
165 u8 gpioie;
166
167 spin_lock_irqsave(&chip->irq_lock, flags);
168 gpioie = readb(chip->base + GPIOIE);
169 gpioie |= 1 << offset;
170 writeb(gpioie, chip->base + GPIOIE);
171 spin_unlock_irqrestore(&chip->irq_lock, flags);
172}
173
174static int pl061_irq_type(struct irq_data *d, unsigned trigger) 136static int pl061_irq_type(struct irq_data *d, unsigned trigger)
175{ 137{
176 struct pl061_gpio *chip = irq_data_get_irq_chip_data(d); 138 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
139 struct pl061_gpio *chip = gc->private;
177 int offset = d->irq - chip->irq_base; 140 int offset = d->irq - chip->irq_base;
178 unsigned long flags; 141 unsigned long flags;
179 u8 gpiois, gpioibe, gpioiev; 142 u8 gpiois, gpioibe, gpioiev;
@@ -181,7 +144,7 @@ static int pl061_irq_type(struct irq_data *d, unsigned trigger)
181 if (offset < 0 || offset >= PL061_GPIO_NR) 144 if (offset < 0 || offset >= PL061_GPIO_NR)
182 return -EINVAL; 145 return -EINVAL;
183 146
184 spin_lock_irqsave(&chip->irq_lock, flags); 147 raw_spin_lock_irqsave(&gc->lock, flags);
185 148
186 gpioiev = readb(chip->base + GPIOIEV); 149 gpioiev = readb(chip->base + GPIOIEV);
187 150
@@ -210,53 +173,54 @@ static int pl061_irq_type(struct irq_data *d, unsigned trigger)
210 173
211 writeb(gpioiev, chip->base + GPIOIEV); 174 writeb(gpioiev, chip->base + GPIOIEV);
212 175
213 spin_unlock_irqrestore(&chip->irq_lock, flags); 176 raw_spin_unlock_irqrestore(&gc->lock, flags);
214 177
215 return 0; 178 return 0;
216} 179}
217 180
218static struct irq_chip pl061_irqchip = {
219 .name = "GPIO",
220 .irq_enable = pl061_irq_enable,
221 .irq_disable = pl061_irq_disable,
222 .irq_set_type = pl061_irq_type,
223};
224
225static void pl061_irq_handler(unsigned irq, struct irq_desc *desc) 181static void pl061_irq_handler(unsigned irq, struct irq_desc *desc)
226{ 182{
227 struct list_head *chip_list = irq_get_handler_data(irq); 183 unsigned long pending;
228 struct list_head *ptr; 184 int offset;
229 struct pl061_gpio *chip; 185 struct pl061_gpio *chip = irq_desc_get_handler_data(desc);
230 186 struct irq_chip *irqchip = irq_desc_get_chip(desc);
231 desc->irq_data.chip->irq_ack(&desc->irq_data);
232 list_for_each(ptr, chip_list) {
233 unsigned long pending;
234 int offset;
235
236 chip = list_entry(ptr, struct pl061_gpio, list);
237 pending = readb(chip->base + GPIOMIS);
238 writeb(pending, chip->base + GPIOIC);
239 187
240 if (pending == 0) 188 chained_irq_enter(irqchip, desc);
241 continue;
242 189
190 pending = readb(chip->base + GPIOMIS);
191 writeb(pending, chip->base + GPIOIC);
192 if (pending) {
243 for_each_set_bit(offset, &pending, PL061_GPIO_NR) 193 for_each_set_bit(offset, &pending, PL061_GPIO_NR)
244 generic_handle_irq(pl061_to_irq(&chip->gc, offset)); 194 generic_handle_irq(pl061_to_irq(&chip->gc, offset));
245 } 195 }
246 desc->irq_data.chip->irq_unmask(&desc->irq_data); 196
197 chained_irq_exit(irqchip, desc);
198}
199
200static void __init pl061_init_gc(struct pl061_gpio *chip, int irq_base)
201{
202 struct irq_chip_type *ct;
203
204 chip->irq_gc = irq_alloc_generic_chip("gpio-pl061", 1, irq_base,
205 chip->base, handle_simple_irq);
206 chip->irq_gc->private = chip;
207
208 ct = chip->irq_gc->chip_types;
209 ct->chip.irq_mask = irq_gc_mask_clr_bit;
210 ct->chip.irq_unmask = irq_gc_mask_set_bit;
211 ct->chip.irq_set_type = pl061_irq_type;
212 ct->chip.irq_set_wake = irq_gc_set_wake;
213 ct->regs.mask = GPIOIE;
214
215 irq_setup_generic_chip(chip->irq_gc, IRQ_MSK(PL061_GPIO_NR),
216 IRQ_GC_INIT_NESTED_LOCK, IRQ_NOREQUEST, 0);
247} 217}
248 218
249static int pl061_probe(struct amba_device *dev, const struct amba_id *id) 219static int pl061_probe(struct amba_device *dev, const struct amba_id *id)
250{ 220{
251 struct pl061_platform_data *pdata; 221 struct pl061_platform_data *pdata;
252 struct pl061_gpio *chip; 222 struct pl061_gpio *chip;
253 struct list_head *chip_list;
254 int ret, irq, i; 223 int ret, irq, i;
255 static DECLARE_BITMAP(init_irq, NR_IRQS);
256
257 pdata = dev->dev.platform_data;
258 if (pdata == NULL)
259 return -ENODEV;
260 224
261 chip = kzalloc(sizeof(*chip), GFP_KERNEL); 225 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
262 if (chip == NULL) 226 if (chip == NULL)
@@ -268,7 +232,7 @@ static int pl061_probe(struct amba_device *dev, const struct amba_id *id)
268 chip->irq_base = pdata->irq_base; 232 chip->irq_base = pdata->irq_base;
269 } else if (dev->dev.of_node) { 233 } else if (dev->dev.of_node) {
270 chip->gc.base = -1; 234 chip->gc.base = -1;
271 chip->irq_base = NO_IRQ; 235 chip->irq_base = 0;
272 } else { 236 } else {
273 ret = -ENODEV; 237 ret = -ENODEV;
274 goto free_mem; 238 goto free_mem;
@@ -287,8 +251,6 @@ static int pl061_probe(struct amba_device *dev, const struct amba_id *id)
287 } 251 }
288 252
289 spin_lock_init(&chip->lock); 253 spin_lock_init(&chip->lock);
290 spin_lock_init(&chip->irq_lock);
291 INIT_LIST_HEAD(&chip->list);
292 254
293 chip->gc.direction_input = pl061_direction_input; 255 chip->gc.direction_input = pl061_direction_input;
294 chip->gc.direction_output = pl061_direction_output; 256 chip->gc.direction_output = pl061_direction_output;
@@ -308,9 +270,11 @@ static int pl061_probe(struct amba_device *dev, const struct amba_id *id)
308 * irq_chip support 270 * irq_chip support
309 */ 271 */
310 272
311 if (chip->irq_base == NO_IRQ) 273 if (chip->irq_base <= 0)
312 return 0; 274 return 0;
313 275
276 pl061_init_gc(chip, chip->irq_base);
277
314 writeb(0, chip->base + GPIOIE); /* disable irqs */ 278 writeb(0, chip->base + GPIOIE); /* disable irqs */
315 irq = dev->irq[0]; 279 irq = dev->irq[0];
316 if (irq < 0) { 280 if (irq < 0) {
@@ -318,18 +282,7 @@ static int pl061_probe(struct amba_device *dev, const struct amba_id *id)
318 goto iounmap; 282 goto iounmap;
319 } 283 }
320 irq_set_chained_handler(irq, pl061_irq_handler); 284 irq_set_chained_handler(irq, pl061_irq_handler);
321 if (!test_and_set_bit(irq, init_irq)) { /* list initialized? */ 285 irq_set_handler_data(irq, chip);
322 chip_list = kmalloc(sizeof(*chip_list), GFP_KERNEL);
323 if (chip_list == NULL) {
324 clear_bit(irq, init_irq);
325 ret = -ENOMEM;
326 goto iounmap;
327 }
328 INIT_LIST_HEAD(chip_list);
329 irq_set_handler_data(irq, chip_list);
330 } else
331 chip_list = irq_get_handler_data(irq);
332 list_add(&chip->list, chip_list);
333 286
334 for (i = 0; i < PL061_GPIO_NR; i++) { 287 for (i = 0; i < PL061_GPIO_NR; i++) {
335 if (pdata) { 288 if (pdata) {
@@ -339,11 +292,6 @@ static int pl061_probe(struct amba_device *dev, const struct amba_id *id)
339 else 292 else
340 pl061_direction_input(&chip->gc, i); 293 pl061_direction_input(&chip->gc, i);
341 } 294 }
342
343 irq_set_chip_and_handler(i + chip->irq_base, &pl061_irqchip,
344 handle_simple_irq);
345 set_irq_flags(i+chip->irq_base, IRQF_VALID);
346 irq_set_chip_data(i + chip->irq_base, chip);
347 } 295 }
348 296
349 amba_set_drvdata(dev, chip); 297 amba_set_drvdata(dev, chip);