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path: root/drivers/gpio/gpio-omap.c
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Diffstat (limited to 'drivers/gpio/gpio-omap.c')
-rw-r--r--drivers/gpio/gpio-omap.c29
1 files changed, 19 insertions, 10 deletions
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index d483cc9f0c63..69e61aecab71 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -67,6 +67,7 @@ struct gpio_bank {
67 struct clk *dbck; 67 struct clk *dbck;
68 u32 mod_usage; 68 u32 mod_usage;
69 u32 dbck_enable_mask; 69 u32 dbck_enable_mask;
70 bool dbck_enabled;
70 struct device *dev; 71 struct device *dev;
71 bool is_mpuio; 72 bool is_mpuio;
72 bool dbck_flag; 73 bool dbck_flag;
@@ -158,6 +159,22 @@ static inline void _gpio_rmw(void __iomem *base, u32 reg, u32 mask, bool set)
158 __raw_writel(l, base + reg); 159 __raw_writel(l, base + reg);
159} 160}
160 161
162static inline void _gpio_dbck_enable(struct gpio_bank *bank)
163{
164 if (bank->dbck_enable_mask && !bank->dbck_enabled) {
165 clk_enable(bank->dbck);
166 bank->dbck_enabled = true;
167 }
168}
169
170static inline void _gpio_dbck_disable(struct gpio_bank *bank)
171{
172 if (bank->dbck_enable_mask && bank->dbck_enabled) {
173 clk_disable(bank->dbck);
174 bank->dbck_enabled = false;
175 }
176}
177
161/** 178/**
162 * _set_gpio_debounce - low level gpio debounce time 179 * _set_gpio_debounce - low level gpio debounce time
163 * @bank: the gpio bank we're acting upon 180 * @bank: the gpio bank we're acting upon
@@ -1178,6 +1195,7 @@ save_gpio_context:
1178 bank->get_context_loss_count(bank->dev); 1195 bank->get_context_loss_count(bank->dev);
1179 1196
1180 omap_gpio_save_context(bank); 1197 omap_gpio_save_context(bank);
1198 _gpio_dbck_disable(bank);
1181 spin_unlock_irqrestore(&bank->lock, flags); 1199 spin_unlock_irqrestore(&bank->lock, flags);
1182 1200
1183 return 0; 1201 return 0;
@@ -1192,6 +1210,7 @@ static int omap_gpio_runtime_resume(struct device *dev)
1192 unsigned long flags; 1210 unsigned long flags;
1193 1211
1194 spin_lock_irqsave(&bank->lock, flags); 1212 spin_lock_irqsave(&bank->lock, flags);
1213 _gpio_dbck_enable(bank);
1195 if (!bank->enabled_non_wakeup_gpios || !bank->workaround_enabled) { 1214 if (!bank->enabled_non_wakeup_gpios || !bank->workaround_enabled) {
1196 spin_unlock_irqrestore(&bank->lock, flags); 1215 spin_unlock_irqrestore(&bank->lock, flags);
1197 return 0; 1216 return 0;
@@ -1274,16 +1293,11 @@ void omap2_gpio_prepare_for_idle(int pwr_mode)
1274 struct gpio_bank *bank; 1293 struct gpio_bank *bank;
1275 1294
1276 list_for_each_entry(bank, &omap_gpio_list, node) { 1295 list_for_each_entry(bank, &omap_gpio_list, node) {
1277 int j;
1278
1279 if (!bank->mod_usage || !bank->loses_context) 1296 if (!bank->mod_usage || !bank->loses_context)
1280 continue; 1297 continue;
1281 1298
1282 bank->power_mode = pwr_mode; 1299 bank->power_mode = pwr_mode;
1283 1300
1284 for (j = 0; j < hweight_long(bank->dbck_enable_mask); j++)
1285 clk_disable(bank->dbck);
1286
1287 pm_runtime_put_sync_suspend(bank->dev); 1301 pm_runtime_put_sync_suspend(bank->dev);
1288 } 1302 }
1289} 1303}
@@ -1293,14 +1307,9 @@ void omap2_gpio_resume_after_idle(void)
1293 struct gpio_bank *bank; 1307 struct gpio_bank *bank;
1294 1308
1295 list_for_each_entry(bank, &omap_gpio_list, node) { 1309 list_for_each_entry(bank, &omap_gpio_list, node) {
1296 int j;
1297
1298 if (!bank->mod_usage || !bank->loses_context) 1310 if (!bank->mod_usage || !bank->loses_context)
1299 continue; 1311 continue;
1300 1312
1301 for (j = 0; j < hweight_long(bank->dbck_enable_mask); j++)
1302 clk_enable(bank->dbck);
1303
1304 pm_runtime_get_sync(bank->dev); 1313 pm_runtime_get_sync(bank->dev);
1305 } 1314 }
1306} 1315}