diff options
Diffstat (limited to 'drivers/gpio/gpio-mm-lantiq.c')
-rw-r--r-- | drivers/gpio/gpio-mm-lantiq.c | 158 |
1 files changed, 158 insertions, 0 deletions
diff --git a/drivers/gpio/gpio-mm-lantiq.c b/drivers/gpio/gpio-mm-lantiq.c new file mode 100644 index 000000000000..2983dfbd0668 --- /dev/null +++ b/drivers/gpio/gpio-mm-lantiq.c | |||
@@ -0,0 +1,158 @@ | |||
1 | /* | ||
2 | * This program is free software; you can redistribute it and/or modify it | ||
3 | * under the terms of the GNU General Public License version 2 as published | ||
4 | * by the Free Software Foundation. | ||
5 | * | ||
6 | * Copyright (C) 2012 John Crispin <blogic@openwrt.org> | ||
7 | */ | ||
8 | |||
9 | #include <linux/init.h> | ||
10 | #include <linux/module.h> | ||
11 | #include <linux/types.h> | ||
12 | #include <linux/platform_device.h> | ||
13 | #include <linux/mutex.h> | ||
14 | #include <linux/gpio.h> | ||
15 | #include <linux/of.h> | ||
16 | #include <linux/of_gpio.h> | ||
17 | #include <linux/io.h> | ||
18 | #include <linux/slab.h> | ||
19 | |||
20 | #include <lantiq_soc.h> | ||
21 | |||
22 | /* | ||
23 | * By attaching hardware latches to the EBU it is possible to create output | ||
24 | * only gpios. This driver configures a special memory address, which when | ||
25 | * written to outputs 16 bit to the latches. | ||
26 | */ | ||
27 | |||
28 | #define LTQ_EBU_BUSCON 0x1e7ff /* 16 bit access, slowest timing */ | ||
29 | #define LTQ_EBU_WP 0x80000000 /* write protect bit */ | ||
30 | |||
31 | struct ltq_mm { | ||
32 | struct of_mm_gpio_chip mmchip; | ||
33 | u16 shadow; /* shadow the latches state */ | ||
34 | }; | ||
35 | |||
36 | /** | ||
37 | * ltq_mm_apply() - write the shadow value to the ebu address. | ||
38 | * @chip: Pointer to our private data structure. | ||
39 | * | ||
40 | * Write the shadow value to the EBU to set the gpios. We need to set the | ||
41 | * global EBU lock to make sure that PCI/MTD dont break. | ||
42 | */ | ||
43 | static void ltq_mm_apply(struct ltq_mm *chip) | ||
44 | { | ||
45 | unsigned long flags; | ||
46 | |||
47 | spin_lock_irqsave(&ebu_lock, flags); | ||
48 | ltq_ebu_w32(LTQ_EBU_BUSCON, LTQ_EBU_BUSCON1); | ||
49 | __raw_writew(chip->shadow, chip->mmchip.regs); | ||
50 | ltq_ebu_w32(LTQ_EBU_BUSCON | LTQ_EBU_WP, LTQ_EBU_BUSCON1); | ||
51 | spin_unlock_irqrestore(&ebu_lock, flags); | ||
52 | } | ||
53 | |||
54 | /** | ||
55 | * ltq_mm_set() - gpio_chip->set - set gpios. | ||
56 | * @gc: Pointer to gpio_chip device structure. | ||
57 | * @gpio: GPIO signal number. | ||
58 | * @val: Value to be written to specified signal. | ||
59 | * | ||
60 | * Set the shadow value and call ltq_mm_apply. | ||
61 | */ | ||
62 | static void ltq_mm_set(struct gpio_chip *gc, unsigned offset, int value) | ||
63 | { | ||
64 | struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); | ||
65 | struct ltq_mm *chip = | ||
66 | container_of(mm_gc, struct ltq_mm, mmchip); | ||
67 | |||
68 | if (value) | ||
69 | chip->shadow |= (1 << offset); | ||
70 | else | ||
71 | chip->shadow &= ~(1 << offset); | ||
72 | ltq_mm_apply(chip); | ||
73 | } | ||
74 | |||
75 | /** | ||
76 | * ltq_mm_dir_out() - gpio_chip->dir_out - set gpio direction. | ||
77 | * @gc: Pointer to gpio_chip device structure. | ||
78 | * @gpio: GPIO signal number. | ||
79 | * @val: Value to be written to specified signal. | ||
80 | * | ||
81 | * Same as ltq_mm_set, always returns 0. | ||
82 | */ | ||
83 | static int ltq_mm_dir_out(struct gpio_chip *gc, unsigned offset, int value) | ||
84 | { | ||
85 | ltq_mm_set(gc, offset, value); | ||
86 | |||
87 | return 0; | ||
88 | } | ||
89 | |||
90 | /** | ||
91 | * ltq_mm_save_regs() - Set initial values of GPIO pins | ||
92 | * @mm_gc: pointer to memory mapped GPIO chip structure | ||
93 | */ | ||
94 | static void ltq_mm_save_regs(struct of_mm_gpio_chip *mm_gc) | ||
95 | { | ||
96 | struct ltq_mm *chip = | ||
97 | container_of(mm_gc, struct ltq_mm, mmchip); | ||
98 | |||
99 | /* tell the ebu controller which memory address we will be using */ | ||
100 | ltq_ebu_w32(CPHYSADDR(chip->mmchip.regs) | 0x1, LTQ_EBU_ADDRSEL1); | ||
101 | |||
102 | ltq_mm_apply(chip); | ||
103 | } | ||
104 | |||
105 | static int ltq_mm_probe(struct platform_device *pdev) | ||
106 | { | ||
107 | struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
108 | struct ltq_mm *chip; | ||
109 | const __be32 *shadow; | ||
110 | int ret = 0; | ||
111 | |||
112 | if (!res) { | ||
113 | dev_err(&pdev->dev, "failed to get memory resource\n"); | ||
114 | return -ENOENT; | ||
115 | } | ||
116 | |||
117 | chip = kzalloc(sizeof(*chip), GFP_KERNEL); | ||
118 | if (!chip) | ||
119 | return -ENOMEM; | ||
120 | |||
121 | chip->mmchip.gc.ngpio = 16; | ||
122 | chip->mmchip.gc.label = "gpio-mm-ltq"; | ||
123 | chip->mmchip.gc.direction_output = ltq_mm_dir_out; | ||
124 | chip->mmchip.gc.set = ltq_mm_set; | ||
125 | chip->mmchip.save_regs = ltq_mm_save_regs; | ||
126 | |||
127 | /* store the shadow value if one was passed by the devicetree */ | ||
128 | shadow = of_get_property(pdev->dev.of_node, "lantiq,shadow", NULL); | ||
129 | if (shadow) | ||
130 | chip->shadow = be32_to_cpu(*shadow); | ||
131 | |||
132 | ret = of_mm_gpiochip_add(pdev->dev.of_node, &chip->mmchip); | ||
133 | if (ret) | ||
134 | kfree(chip); | ||
135 | return ret; | ||
136 | } | ||
137 | |||
138 | static const struct of_device_id ltq_mm_match[] = { | ||
139 | { .compatible = "lantiq,gpio-mm" }, | ||
140 | {}, | ||
141 | }; | ||
142 | MODULE_DEVICE_TABLE(of, ltq_mm_match); | ||
143 | |||
144 | static struct platform_driver ltq_mm_driver = { | ||
145 | .probe = ltq_mm_probe, | ||
146 | .driver = { | ||
147 | .name = "gpio-mm-ltq", | ||
148 | .owner = THIS_MODULE, | ||
149 | .of_match_table = ltq_mm_match, | ||
150 | }, | ||
151 | }; | ||
152 | |||
153 | static int __init ltq_mm_init(void) | ||
154 | { | ||
155 | return platform_driver_register(<q_mm_driver); | ||
156 | } | ||
157 | |||
158 | subsys_initcall(ltq_mm_init); | ||