diff options
Diffstat (limited to 'drivers/gpio/gpio-ep93xx.c')
-rw-r--r-- | drivers/gpio/gpio-ep93xx.c | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/drivers/gpio/gpio-ep93xx.c b/drivers/gpio/gpio-ep93xx.c index 56b98eebe1fc..80829f3c6543 100644 --- a/drivers/gpio/gpio-ep93xx.c +++ b/drivers/gpio/gpio-ep93xx.c | |||
@@ -51,15 +51,15 @@ static void ep93xx_gpio_update_int_params(unsigned port) | |||
51 | { | 51 | { |
52 | BUG_ON(port > 2); | 52 | BUG_ON(port > 2); |
53 | 53 | ||
54 | __raw_writeb(0, EP93XX_GPIO_REG(int_en_register_offset[port])); | 54 | writeb_relaxed(0, EP93XX_GPIO_REG(int_en_register_offset[port])); |
55 | 55 | ||
56 | __raw_writeb(gpio_int_type2[port], | 56 | writeb_relaxed(gpio_int_type2[port], |
57 | EP93XX_GPIO_REG(int_type2_register_offset[port])); | 57 | EP93XX_GPIO_REG(int_type2_register_offset[port])); |
58 | 58 | ||
59 | __raw_writeb(gpio_int_type1[port], | 59 | writeb_relaxed(gpio_int_type1[port], |
60 | EP93XX_GPIO_REG(int_type1_register_offset[port])); | 60 | EP93XX_GPIO_REG(int_type1_register_offset[port])); |
61 | 61 | ||
62 | __raw_writeb(gpio_int_unmasked[port] & gpio_int_enabled[port], | 62 | writeb(gpio_int_unmasked[port] & gpio_int_enabled[port], |
63 | EP93XX_GPIO_REG(int_en_register_offset[port])); | 63 | EP93XX_GPIO_REG(int_en_register_offset[port])); |
64 | } | 64 | } |
65 | 65 | ||
@@ -74,7 +74,7 @@ static void ep93xx_gpio_int_debounce(unsigned int irq, bool enable) | |||
74 | else | 74 | else |
75 | gpio_int_debounce[port] &= ~port_mask; | 75 | gpio_int_debounce[port] &= ~port_mask; |
76 | 76 | ||
77 | __raw_writeb(gpio_int_debounce[port], | 77 | writeb(gpio_int_debounce[port], |
78 | EP93XX_GPIO_REG(int_debounce_register_offset[port])); | 78 | EP93XX_GPIO_REG(int_debounce_register_offset[port])); |
79 | } | 79 | } |
80 | 80 | ||
@@ -83,7 +83,7 @@ static void ep93xx_gpio_ab_irq_handler(unsigned int irq, struct irq_desc *desc) | |||
83 | unsigned char status; | 83 | unsigned char status; |
84 | int i; | 84 | int i; |
85 | 85 | ||
86 | status = __raw_readb(EP93XX_GPIO_A_INT_STATUS); | 86 | status = readb(EP93XX_GPIO_A_INT_STATUS); |
87 | for (i = 0; i < 8; i++) { | 87 | for (i = 0; i < 8; i++) { |
88 | if (status & (1 << i)) { | 88 | if (status & (1 << i)) { |
89 | int gpio_irq = gpio_to_irq(EP93XX_GPIO_LINE_A(0)) + i; | 89 | int gpio_irq = gpio_to_irq(EP93XX_GPIO_LINE_A(0)) + i; |
@@ -91,7 +91,7 @@ static void ep93xx_gpio_ab_irq_handler(unsigned int irq, struct irq_desc *desc) | |||
91 | } | 91 | } |
92 | } | 92 | } |
93 | 93 | ||
94 | status = __raw_readb(EP93XX_GPIO_B_INT_STATUS); | 94 | status = readb(EP93XX_GPIO_B_INT_STATUS); |
95 | for (i = 0; i < 8; i++) { | 95 | for (i = 0; i < 8; i++) { |
96 | if (status & (1 << i)) { | 96 | if (status & (1 << i)) { |
97 | int gpio_irq = gpio_to_irq(EP93XX_GPIO_LINE_B(0)) + i; | 97 | int gpio_irq = gpio_to_irq(EP93XX_GPIO_LINE_B(0)) + i; |
@@ -124,7 +124,7 @@ static void ep93xx_gpio_irq_ack(struct irq_data *d) | |||
124 | ep93xx_gpio_update_int_params(port); | 124 | ep93xx_gpio_update_int_params(port); |
125 | } | 125 | } |
126 | 126 | ||
127 | __raw_writeb(port_mask, EP93XX_GPIO_REG(eoi_register_offset[port])); | 127 | writeb(port_mask, EP93XX_GPIO_REG(eoi_register_offset[port])); |
128 | } | 128 | } |
129 | 129 | ||
130 | static void ep93xx_gpio_irq_mask_ack(struct irq_data *d) | 130 | static void ep93xx_gpio_irq_mask_ack(struct irq_data *d) |
@@ -139,7 +139,7 @@ static void ep93xx_gpio_irq_mask_ack(struct irq_data *d) | |||
139 | gpio_int_unmasked[port] &= ~port_mask; | 139 | gpio_int_unmasked[port] &= ~port_mask; |
140 | ep93xx_gpio_update_int_params(port); | 140 | ep93xx_gpio_update_int_params(port); |
141 | 141 | ||
142 | __raw_writeb(port_mask, EP93XX_GPIO_REG(eoi_register_offset[port])); | 142 | writeb(port_mask, EP93XX_GPIO_REG(eoi_register_offset[port])); |
143 | } | 143 | } |
144 | 144 | ||
145 | static void ep93xx_gpio_irq_mask(struct irq_data *d) | 145 | static void ep93xx_gpio_irq_mask(struct irq_data *d) |