1 files changed, 18 insertions, 24 deletions

diff --git a/drivers/firewire/ohci.c b/drivers/firewire/ohci.c
index 6aa8a86cb83b..8db663219560 100644
--- a/drivers/firewire/ohci.c
+++ b/drivers/firewire/ohci.c
@@ -290,7 +290,6 @@ static char ohci_driver_name[] = KBUILD_MODNAME;
 #define QUIRK_NO_MSI                    0x10
 #define QUIRK_TI_SLLZ059                0x20
 #define QUIRK_IR_WAKE                   0x40
-#define QUIRK_PHY_LCTRL_TIMEOUT         0x80
 
 /* In case of multiple matches in ohci_quirks[], only the first one is used. */
 static const struct {
@@ -303,10 +302,7 @@ static const struct {
                 QUIRK_BE_HEADERS},
 
         {PCI_VENDOR_ID_ATT, PCI_DEVICE_ID_AGERE_FW643, 6,
-                QUIRK_PHY_LCTRL_TIMEOUT | QUIRK_NO_MSI},
-
-        {PCI_VENDOR_ID_ATT, PCI_ANY_ID, PCI_ANY_ID,
-                QUIRK_PHY_LCTRL_TIMEOUT},
+                QUIRK_NO_MSI},
 
         {PCI_VENDOR_ID_CREATIVE, PCI_DEVICE_ID_CREATIVE_SB1394, PCI_ANY_ID,
                 QUIRK_RESET_PACKET},
@@ -353,7 +349,6 @@ MODULE_PARM_DESC(quirks, "Chip quirks (default = 0"
         ", disable MSI = "              __stringify(QUIRK_NO_MSI)
         ", TI SLLZ059 erratum = "       __stringify(QUIRK_TI_SLLZ059)
         ", IR wake unreliable = "       __stringify(QUIRK_IR_WAKE)
-        ", phy LCtrl timeout = "        __stringify(QUIRK_PHY_LCTRL_TIMEOUT)
         ")");
 
 #define OHCI_PARAM_DEBUG_AT_AR          1
@@ -370,6 +365,10 @@ MODULE_PARM_DESC(debug, "Verbose logging (default = 0"
         ", busReset events = "  __stringify(OHCI_PARAM_DEBUG_BUSRESETS)
         ", or a combination, or all = -1)");
 
+static bool param_remote_dma;
+module_param_named(remote_dma, param_remote_dma, bool, 0444);
+MODULE_PARM_DESC(remote_dma, "Enable unfiltered remote DMA (default = N)");
+
 static void log_irqs(struct fw_ohci *ohci, u32 evt)
 {
         if (likely(!(param_debug &
@@ -2050,10 +2049,10 @@ static void bus_reset_work(struct work_struct *work)
                           be32_to_cpu(ohci->next_header));
         }
 
-#ifdef CONFIG_FIREWIRE_OHCI_REMOTE_DMA
-        reg_write(ohci, OHCI1394_PhyReqFilterHiSet, ~0);
-        reg_write(ohci, OHCI1394_PhyReqFilterLoSet, ~0);
-#endif
+        if (param_remote_dma) {
+                reg_write(ohci, OHCI1394_PhyReqFilterHiSet, ~0);
+                reg_write(ohci, OHCI1394_PhyReqFilterLoSet, ~0);
+        }
 
         spin_unlock_irq(&ohci->lock);
 
@@ -2295,9 +2294,6 @@ static int ohci_enable(struct fw_card *card,
          * TI TSB82AA2 + TSB81BA3(A) cards signal LPS enabled early but
          * cannot actually use the phy at that time.  These need tens of
          * millisecods pause between LPS write and first phy access too.
-         *
-         * But do not wait for 50msec on Agere/LSI cards.  Their phy
-         * arbitration state machine may time out during such a long wait.
          */
 
         reg_write(ohci, OHCI1394_HCControlSet,
@@ -2305,11 +2301,8 @@ static int ohci_enable(struct fw_card *card,
                   OHCI1394_HCControl_postedWriteEnable);
         flush_writes(ohci);
 
-        if (!(ohci->quirks & QUIRK_PHY_LCTRL_TIMEOUT))
+        for (lps = 0, i = 0; !lps && i < 3; i++) {
                 msleep(50);
-
-        for (lps = 0, i = 0; !lps && i < 150; i++) {
-                msleep(1);
                 lps = reg_read(ohci, OHCI1394_HCControlSet) &
                       OHCI1394_HCControl_LPS;
         }
@@ -2363,7 +2356,7 @@ static int ohci_enable(struct fw_card *card,
         reg_write(ohci, OHCI1394_FairnessControl, 0);
         card->priority_budget_implemented = ohci->pri_req_max != 0;
 
-        reg_write(ohci, OHCI1394_PhyUpperBound, 0x00010000);
+        reg_write(ohci, OHCI1394_PhyUpperBound, FW_MAX_PHYSICAL_RANGE >> 16);
         reg_write(ohci, OHCI1394_IntEventClear, ~0);
         reg_write(ohci, OHCI1394_IntMaskClear, ~0);
 
@@ -2587,13 +2580,13 @@ static int ohci_cancel_packet(struct fw_card *card, struct fw_packet *packet)
 static int ohci_enable_phys_dma(struct fw_card *card,
                                 int node_id, int generation)
 {
-#ifdef CONFIG_FIREWIRE_OHCI_REMOTE_DMA
-        return 0;
-#else
         struct fw_ohci *ohci = fw_ohci(card);
         unsigned long flags;
         int n, ret = 0;
 
+        if (param_remote_dma)
+                return 0;
+
         /*
          * FIXME:  Make sure this bitmask is cleared when we clear the busReset
          * interrupt bit.  Clear physReqResourceAllBuses on bus reset.
@@ -2622,7 +2615,6 @@ static int ohci_enable_phys_dma(struct fw_card *card,
         spin_unlock_irqrestore(&ohci->lock, flags);
 
         return ret;
-#endif /* CONFIG_FIREWIRE_OHCI_REMOTE_DMA */
 }
 
 static u32 ohci_read_csr(struct fw_card *card, int csr_offset)
@@ -3720,9 +3712,11 @@ static int pci_probe(struct pci_dev *dev,
         version = reg_read(ohci, OHCI1394_Version) & 0x00ff00ff;
         ohci_notice(ohci,
                     "added OHCI v%x.%x device as card %d, "
-                    "%d IR + %d IT contexts, quirks 0x%x\n",
+                    "%d IR + %d IT contexts, quirks 0x%x%s\n",
                     version >> 16, version & 0xff, ohci->card.index,
-                    ohci->n_ir, ohci->n_it, ohci->quirks);
+                    ohci->n_ir, ohci->n_it, ohci->quirks,
+                    reg_read(ohci, OHCI1394_PhyUpperBound) ?
+                        ", >4 GB phys DMA" : "");
 
         return 0;